shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-08 20:07:46 +09:00
Code Issues Packages Projects Releases Wiki Activity

dt-bindings: rng: Document the Rockchip HW RNG bindings

Browse Source 
This adds documentation of device tree bindings for the Rockchip hardware
random number generator.

Change-Id: I4548f480d5e89499f527a1f37047404b910b6c88
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
This commit is contained in:
Lin Jinhan
2018-08-24 17:14:51 +08:00
committed by Tao Huang
parent 12d14b5959
commit 2a242a1602
1 changed files with 32 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

32
Documentation/devicetree/bindings/rng/rockchip,rng.txt Normal file
View File

@@ -0,0 +1,32 @@
Rockchip Hardware Random Number Generator
Required properties:
- compatible : should be one of the following.
"rockchip,cryptov2-rng" for crypto v2
- reg : Specifies base physical address and size of the registers map.
- clocks : Phandle to clock-controller plus clock-specifier pair.
- clock-names : "clk_crypto", "clk_crypto_apk", "aclk_crypto", "hclk_crypto" as a clock name.
- assigned-clocks: Main clock, should be <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>
- assigned-clock-rates : The rng core clk frequency, shall be: <150000000>, <150000000>,
<200000000>, <100000000>
- resets : Used for module reset
- reset-names : Reset names, should be "reset"
Example:
rng: rng@ff2f0000 {
compatible = "rockchip,cryptov2-rng";
reg = <0x0 0xff2f0000 0x0 0x4000>;
clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
clock-names = "clk_crypto", "clk_crypto_apk",
"aclk_crypto", "hclk_crypto";
assigned-clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
assigned-clock-rates = <150000000>, <150000000>,
<200000000>, <100000000>;
resets = <&cru SRST_CRYPTO>;
reset-names = "reset";
};