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Merge commit '67e4e92e23fb05a6c58403232914019f1b59ccf2'

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* commit '67e4e92e23fb05a6c58403232914019f1b59ccf2': (204 commits)
  net: wireless: rockchip_wlan: bcmdhd: enable WL_SCHED_SCAN
  drm/rockchip: vop2: update dsc_hsync and dly num config according IC suggest
  iommu/rockchip: rename rk_iommu_[un]mask_irq() to rockchip_iommu_[un]mask_irq()
  iommu/rockchip: fix rockchip private interface dependence
  drm/rockchip: dw_hdmi_qp: Support rk3588 switch HDMI/DVI mode
  ARM: dts: rockchip: rv1103g-rmsl311: remove meta node and use erofs
  drm/bridge: analogix_dp: Fix stream valid control
  media: i2c: SmartSens sensor driver fixed modify fps error
  arm64: dts: rockchip: rk3588s: Fix spi driver strength
  media: rockchip: isp: fix scl for unite mode
  drm/bridge: analogix_dp: Check link status in loader_protect()
  drm/rockchip: Add return value to .loader_protect()
  soc: rockchip: opp_select: dump current opp state when panic for cpu/ddr
  ARM: dts: rockchip: rk3288-evb: Change rgmii clock mode from input to output for gmac
  spi: rockchip: Support rkspi-devN misc devices
  mtd: spinand: foresee: Support new device
  media: i2c: sc200ai support get config from cmdline for thunderboot
  media: rockchip: isp: drop first output for fast case
  drm/bridge: dw-hdmi-qp-cec: fix receive message error
  media: i2c: ov13855: fix power on sequence to avoid i2c communication failed
  ...

Conflicts:
	Documentation/filesystems/erofs.rst
	fs/erofs/data.c
	fs/erofs/inode.c
	fs/erofs/internal.h
	fs/erofs/super.c

Change-Id: Ieb4b1eefc192e20548b7ce377fa9a06022e5f766
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
This commit is contained in:
Tao Huang
2022-10-11 10:38:23 +08:00
parent 7d03c601e8 67e4e92e23
commit 2ababf8daf
377 changed files with 10643 additions and 7262 deletions
Download Patch File Download Diff File Expand all files Collapse all files

25
Documentation/ABI/testing/sysfs-device-mali
View File

@@ -211,6 +211,31 @@ Description:
without forward progress to allow to elapse before terminating a
GPU command queue group.
What: /sys/class/misc/mali%u/device/mcu_shader_pwroff_timeout
Description:
This attribute is available only with mali platform
device-driver that supports a CSF GPU. The duration value unit
is in micro-seconds and is used for configuring MCU shader Core power-off
timer. The configured MCU shader Core power-off timer will only have
effect when the host driver has delegated the shader cores
power management to MCU. The supplied value will be
recorded internally without any change. But the actual field
value will be subject to core power-off timer source frequency
scaling and maximum value limiting. The default source will be
SYSTEM_TIMESTAMP counter. But in case the platform is not able
to supply it, the GPU CYCLE_COUNTER source will be used as an
alternative.
If we set the value to zero then MCU-controlled shader/tiler
power management will be disabled.
What: /sys/class/misc/mali%u/device/csg_scheduling_period
Description:
This attribute is available only with mali platform
device-driver that supports a CSF GPU. The duration value unit
is in milliseconds and is used for configuring csf scheduling
tick duration.
What: /sys/class/misc/mali%u/device/reset_timeout
Description:
This attribute is used to set the number of milliseconds to

5
Documentation/devicetree/bindings/hwmon/pwm-fan.txt
View File

@@ -17,6 +17,11 @@ Optional properties:
- pulses-per-revolution : define the tachometer pulses per fan revolution as
an integer (default is 2 interrupts per revolution).
The value must be greater than zero.
- rockchip,temp-trips : The property is an array of 2-tuples items, and
each item consists of temperature in millicelsius and
pwm cooling state. This depends on CONFIG_ROCKCHIP_SYSTEM_MONITOR.
If add the property the fan cooling state will be changed
by system monitor. Otherwise, use the default thermal governor.
Example:
fan0: pwm-fan {

3
Documentation/devicetree/bindings/net/can/rockchip_canfd.txt
View File

@@ -4,7 +4,8 @@ Rockchip CANFD controller Device Tree Bindings
Required properties:
- compatible : Should be:
- "rockchip,canfd-1.0" for CANFD controllers 1.0
- "rockchip,can-2.0" for CAN controllers 2.0
- "rockchip,can-2.0" for RK3588 CAN controllers 2.0
- "rockchip,rk3568-can-2.0" for RK3568 CAN controllers 2.0
- reg : Physical base address and size of the controller
registers map.
- interrupts : Property with a value describing the interrupt

3
arch/arm/boot/dts/Makefile
View File

@@ -1037,7 +1037,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-vyasa.dtb \
rk3308bs-evb-amic-v11-aarch32.dtb \
rk3308bs-evb-dmic-pdm-v11-aarch32.dtb \
rk3308bs-evb-mipi-display-v11-aarch32.dtb
rk3308bs-evb-mipi-display-v11-aarch32.dtb \
rk3308hs-voice-module-board-v10-aarch32.dtb
dtb-$(CONFIG_ARCH_S3C24XX) += \
s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_S3C64XX) += \

6
arch/arm/boot/dts/rk3036.dtsi
View File

@@ -18,6 +18,9 @@
aliases {
ethernet0 = &emac;
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@@ -701,6 +704,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x2007c000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
@@ -714,6 +718,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
@@ -727,6 +732,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO2>;
gpio-controller;

15
arch/arm/boot/dts/rk3066a.dtsi
View File

@@ -13,6 +13,15 @@
/ {
compatible = "rockchip,rk3066a";
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
gpio4 = &gpio4;
gpio6 = &gpio6;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -410,6 +419,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x20034000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
@@ -423,6 +433,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
@@ -436,6 +447,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x2003e000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
@@ -449,6 +461,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
@@ -462,6 +475,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO4>;
gpio-controller;
@@ -475,6 +489,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x2000a000 0x100>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO6>;
gpio-controller;

11
arch/arm/boot/dts/rk3188.dtsi
View File

@@ -13,6 +13,13 @@
/ {
compatible = "rockchip,rk3188";
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -251,6 +258,7 @@
compatible = "rockchip,rk3188-gpio-bank0";
reg = <0x2000a000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
@@ -264,6 +272,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
@@ -277,6 +286,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x2003e000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
@@ -290,6 +300,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO3>;
gpio-controller;

8
arch/arm/boot/dts/rk322x.dtsi
View File

@@ -15,6 +15,10 @@
aliases {
ethernet0 = &gmac;
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
@@ -833,6 +837,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x11110000 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
@@ -846,6 +851,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x11120000 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
@@ -859,6 +865,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x11130000 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
@@ -872,6 +879,7 @@
compatible = "rockchip,gpio-bank";
reg = <0x11140000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bus";
clocks = <&cru PCLK_GPIO3>;
gpio-controller;

7
arch/arm/boot/dts/rk3288-evb-rk1608.dts
View File

@@ -423,12 +423,13 @@
&gmac {
phy-supply = <&vccio_pmu>;
phy-mode = "rgmii";
clock_in_out = "input";
clock_in_out = "output";
assigned-clocks = <&cru SCLK_MAC>;
assigned-clock-parents = <&cru PLL_NPLL>;
assigned-clock-rates = <125000000>;
snps,reset-gpio = <&gpio4 7 0>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
assigned-clocks = <&cru SCLK_MAC>;
assigned-clock-parents = <&ext_gmac>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
tx_delay = <0x30>;

7
arch/arm/boot/dts/rk3288-evb.dtsi
View File

@@ -237,12 +237,13 @@
&gmac {
phy-supply = <&vcc_phy>;
phy-mode = "rgmii";
clock_in_out = "input";
clock_in_out = "output";
assigned-clocks = <&cru SCLK_MAC>;
assigned-clock-parents = <&cru PLL_NPLL>;
assigned-clock-rates = <125000000>;
snps,reset-gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
assigned-clocks = <&cru SCLK_MAC>;
assigned-clock-parents = <&ext_gmac>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
tx_delay = <0x30>;

9
arch/arm/boot/dts/rk3288.dtsi
View File

@@ -19,6 +19,15 @@
aliases {
ethernet0 = &gmac;
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
gpio4 = &gpio4;
gpio5 = &gpio5;
gpio6 = &gpio6;
gpio7 = &gpio7;
gpio8 = &gpio8;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;

34
arch/arm/boot/dts/rk3308hs-voice-module-board-v10-aarch32.dts Normal file
View File

@@ -0,0 +1,34 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd
*/
/dts-v1/;
#include "rk3308-voice-module-board-v11-aarch32.dts"
/ {
model = "Rockchip RK3308HS Voice Module Board V10 (AArch32)";
compatible = "rockchip,rk3308hs-voice-module-board-v10-aarch32", "rockchip,rk3308";
/delete-node/ vdd-1v0;
vdd_0v9: vdd-0v9 {
compatible = "regulator-fixed";
regulator-name = "vdd_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
};
};
&vcc_ddr {
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
};
&vdd_log {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
};

12
arch/arm/boot/dts/rv1103g-battery-ipc-v10.dts
View File

@@ -44,7 +44,7 @@
};
chosen {
bootargs = "loglevel=0 console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip storagemedia=mtd androidboot.storagemedia=mtd androidboot.mode=normal";
bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip storagemedia=mtd androidboot.storagemedia=mtd androidboot.mode=normal";
};
acodec_sound: acodec-sound {
@@ -190,11 +190,6 @@
reg = <0x00000000 0x04000000>;
};
&meta {
/* reserved meta partition 384KB */
reg = <0x01e00000 (384 * 0x400)>;
};
&mipi0_csi2 {
status = "okay";
@@ -267,11 +262,6 @@
status = "okay";
};
&rkisp_thunderboot {
/* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num) */
reg = <0x01e60000 0xa8c000>;
};
&rkisp_vir0 {
status = "okay";

7
arch/arm/boot/dts/rv1103g-rmsl311-dloc-sl-v10.dts
View File

@@ -13,7 +13,7 @@
compatible = "rockchip,rv1103g-rmsl311-dloc-v10", "rockchip,rv1103";
chosen {
bootargs = "loglevel=0 console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip";
bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip";
};
vcc_1v8: vcc-1v8 {
@@ -132,11 +132,6 @@
reg = <0x00000000 0x04000000>;
};
&meta {
/* reserved meta partition 384KB */
reg = <0x01e00000 (384 * 0x400)>;
};
&mipi0_csi2 {
status = "okay";

13
arch/arm/boot/dts/rv1106-evb-cam.dtsi
View File

@@ -3,16 +3,6 @@
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*
*/
/ {
cam_ircut0: cam_ircut {
status = "okay";
compatible = "rockchip,ircut";
ircut-open-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
ircut-close-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
};
};
&csi2_dphy_hw {
status = "okay";
@@ -90,7 +80,6 @@
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT2115-PC1";
rockchip,camera-module-lens-name = "30IRC-F16";
lens-focus = <&cam_ircut0>;
port {
sc530ai_out: endpoint {
remote-endpoint = <&csi_dphy_input0>;
@@ -113,7 +102,6 @@
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT2119-PC1";
rockchip,camera-module-lens-name = "30IRC-F16";
lens-focus = <&cam_ircut0>;
port {
sc3336_out: endpoint {
remote-endpoint = <&csi_dphy_input1>;
@@ -136,7 +124,6 @@
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "OT01";
rockchip,camera-module-lens-name = "40IRC_F16";
lens-focus = <&cam_ircut0>;
port {
sc4336_out: endpoint {
remote-endpoint = <&csi_dphy_input2>;

10
arch/arm/boot/dts/rv1106-ipc.dtsi
View File

@@ -22,15 +22,6 @@
};
};
cam_ircut0: cam_ircut {
status = "okay";
compatible = "rockchip,ircut";
ircut-open-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
ircut-close-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
};
vcc_1v8: vcc-1v8 {
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
@@ -156,7 +147,6 @@
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out0>;
lens-focus = <&cam_ircut0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "OT01";

5
arch/arm/boot/dts/rv1106-smd-cam.dtsi
View File

@@ -132,6 +132,11 @@
};
};
gt24c512: gt24c512@50 {
compatible = "atmel,24c512";
reg = <0x50>;
};
vcsel_rk803: vcsel_rk803@63 {
compatible = "rockchip,rk803";
status = "okay";

4
arch/arm/boot/dts/rv1106-thunder-boot-emmc.dtsi
View File

@@ -7,8 +7,8 @@
/ {
reserved-memory {
mmc_ecsd: mmc@3fe00 {
reg = <0x3fe00 0x00000800>;
mmc_ecsd: mmc@3f000 {
reg = <0x3f000 0x00001000>;
};
mmc_idmac: mmc@100000 {

30
arch/arm/boot/dts/rv1106-thunder-boot.dtsi
View File

@@ -19,25 +19,30 @@
#size-cells = <1>;
ranges;
rtos@40000 {
rtos: rtos@40000 {
reg = <0x40000 0x40000>;
};
ramdisk_r: ramdisk@a00000 {
reg = <0x00a00000 (10 * 0x00100000)>;
meta: meta@800000 {
/* reg's offset MUST match with RTOS */
reg = <0x00800000 0x60000>;
};
ramdisk_c: ramdisk@1900000 {
reg = <0x01900000 (5 * 0x00100000)>;
rkisp_thunderboot: rkisp@860000 {
/* reg's offset MUST match with RTOS */
/*
* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
* e.g. 1920x1080: 0xa8c000
*/
reg = <0x00860000 0xa8c000>;
};
meta: meta@1e00000 {
reg = <0x01e00000 0x0>;
ramdisk_r: ramdisk_r {
reg = <0x12ec000 (10 * 0x00100000)>;
};
rkisp_thunderboot: rkisp@1e60000 {
/* NV12 (w*h*1.5*2) w and h 16 align, eg:1920x1088 */
reg = <0x1e60000 0x0>;
ramdisk_c: ramdisk_c {
reg = <0x1cec000 (5 * 0x00100000)>;
};
};
@@ -73,6 +78,11 @@
compatible = "rockchip,thunder-boot-service";
mbox-names = "amp-rx";
mboxes = <&mailbox 1>;
resets = <&cru SRST_CORE_MCU>, <&cru SRST_CORE_MCU_PWRUP>,
<&cru SRST_CORE_MCU_CPU>, <&cru SRST_T_CORE_MCU_CPU>;
reset-names = "core_mcu", "core_mcu_pwrup",
"core_mcu_cpu", "t_core_mcu_cpu";
memory-region = <&rtos>;
status = "disabled";
};
};

47
arch/arm/boot/dts/rv1106g-evb2-v10.dts
View File

@@ -14,7 +14,7 @@
compatible = "rockchip,rv1106g-evb2-v10", "rockchip,rv1106";
chosen {
bootargs = "loglevel=0 console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip rk_dma_heap_cma=24M mtdparts=sfc_nor:64K(env),256K@64K(idblock),256K(uboot),64K(vnvm),8M(boot),3M(userdata)";
bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip";
};
vcc_1v8: vcc-1v8 {
@@ -54,7 +54,7 @@
csi_dphy_input0: endpoint@0 {
reg = <0>;
remote-endpoint = <&sc3336_out>;
remote-endpoint = <&sc3338_out>;
data-lanes = <1 2>;
};
};
@@ -83,22 +83,23 @@
};
&i2c4 {
sc3336: sc3336@30 {
compatible = "smartsens,sc3336";
rockchip,amp-shared;
sc3338: sc3338@30 {
compatible = "smartsens,sc3338";
status = "okay";
reg = <0x30>;
clocks = <&cru MCLK_REF_MIPI0>;
clock-names = "xvclk";
reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT2119-PC1";
rockchip,camera-module-name = "FKO1";
rockchip,camera-module-lens-name = "30IRC-F16";
port {
sc3336_out: endpoint {
sc3338_out: endpoint {
remote-endpoint = <&csi_dphy_input0>;
data-lanes = <1 2>;
};
@@ -137,13 +138,8 @@
};
};
&memory {
reg = <0x00000000 0x08000000>;
};
&meta {
/* reserved meta partition 384KB */
reg = <0x01e00000 (384 * 0x400)>;
&mailbox {
status = "okay";
};
&rkcif {
@@ -152,6 +148,7 @@
&rkcif_mipi_lvds {
status = "okay";
memory-region-thunderboot = <&rkisp_thunderboot>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_pins>;
@@ -188,9 +185,25 @@
};
};
&thunder_boot_service {
status = "okay";
};
&rkisp_thunderboot {
/* 9M for NV12 (w*h*1.5*2) w and h 16 align, 2304/1296 */
reg = <0x01e60000 (9 * 0x00100000)>;
/* reg's offset MUST match with RTOS */
/*
* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
* e.g. 2304x1296: 0xf30000
*/
reg = <0x00860000 0xf30000>;
};
&ramdisk_r {
reg = <0x1790000 (10 * 0x00100000)>;
};
&ramdisk_c {
reg = <0x2190000 (5 * 0x00100000)>;
};
&pwm10 {

7
arch/arm/boot/dts/rv1106g-smart-door-lock-rmsl-v10.dts
View File

@@ -15,7 +15,7 @@
compatible = "rockchip,rv1106g-smart-door-lock-rmsl-v10", "rockchip,rv1106";
chosen {
bootargs = "loglevel=0 console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip";
bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip";
};
acodec_sound: acodec-sound {
@@ -98,11 +98,6 @@
status = "disabled";
};
&meta {
/* reserved meta partition 384KB */
reg = <0x01e00000 (384 * 0x400)>;
};
&pinctrl {
mcu {
/omit-if-no-ref/

2
arch/arm/configs/rv1106-battery-ipc.config
View File

@@ -13,7 +13,7 @@ CONFIG_SND_SOC_ROCKCHIP=m
CONFIG_SND_SOC_ROCKCHIP_I2S_TDM=m
CONFIG_SPI=y
CONFIG_VIDEO_SC230AI=y
CONFIG_VIDEO_SC3336=y
CONFIG_VIDEO_SC3338=y
# CONFIG_AD2S1200 is not set
# CONFIG_AD2S1210 is not set
# CONFIG_AD2S90 is not set

2
arch/arm/configs/rv1106-smart-door.config
View File

@@ -1,8 +1,10 @@
CONFIG_CONFIGFS_FS=m
CONFIG_CRYPTO=y
CONFIG_EEPROM_AT24=y
CONFIG_EXTCON=m
CONFIG_JFFS2_FS=y
CONFIG_KEYS=y
CONFIG_NVMEM_SYSFS=y
CONFIG_RFKILL=y
CONFIG_RK803=y
CONFIG_ROCKCHIP_HW_DECOMPRESS_USER=y

110
arch/arm/configs/rv1106-tb.config
View File

@@ -1,7 +1,11 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_CRYPTO=y
CONFIG_DAX=y
CONFIG_EROFS_FS=y
# CONFIG_ETHERNET is not set
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_XZ is not set
CONFIG_LIBCRC32C=y
# CONFIG_MDIO_DEVICE is not set
CONFIG_MMC=y
CONFIG_MTD_BLOCK=y
@@ -14,11 +18,111 @@ CONFIG_ROCKCHIP_MULTI_RGA=y
CONFIG_ROCKCHIP_RAMDISK=y
CONFIG_ROCKCHIP_RGA_PROC_FS=y
CONFIG_ROCKCHIP_THUNDER_BOOT=y
CONFIG_ROMFS_FS=y
# CONFIG_SLUB_SYSFS is not set
CONFIG_SND_SOC_RV1106=m
CONFIG_VIDEO_ROCKCHIP_CIF=y
CONFIG_VIDEO_ROCKCHIP_ISP=y
# CONFIG_ARM_CRYPTO is not set
# CONFIG_CRYPTO_842 is not set
# CONFIG_CRYPTO_ADIANTUM is not set
# CONFIG_CRYPTO_AEGIS128 is not set
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_AES_TI is not set
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_BLAKE2B is not set
# CONFIG_CRYPTO_BLAKE2S is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_CBC is not set
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_CFB is not set
# CONFIG_CRYPTO_CHACHA20 is not set
# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
# CONFIG_CRYPTO_CMAC is not set
# CONFIG_CRYPTO_CRC32 is not set
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_CRCT10DIF is not set
# CONFIG_CRYPTO_CRYPTD is not set
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
# CONFIG_CRYPTO_CURVE25519 is not set
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_DH is not set
# CONFIG_CRYPTO_DRBG_MENU is not set
# CONFIG_CRYPTO_ECB is not set
# CONFIG_CRYPTO_ECDH is not set
# CONFIG_CRYPTO_ECHAINIV is not set
# CONFIG_CRYPTO_ECRDSA is not set
# CONFIG_CRYPTO_ESSIV is not set
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_GHASH is not set
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_HW is not set
# CONFIG_CRYPTO_JITTERENTROPY is not set
# CONFIG_CRYPTO_KEYWRAP is not set
# CONFIG_CRYPTO_LIB_BLAKE2S is not set
# CONFIG_CRYPTO_LIB_CHACHA is not set
# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set
# CONFIG_CRYPTO_LIB_CURVE25519 is not set
# CONFIG_CRYPTO_LIB_POLY1305 is not set
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_LZ4 is not set
# CONFIG_CRYPTO_LZ4HC is not set
# CONFIG_CRYPTO_LZO is not set
# CONFIG_CRYPTO_MANAGER is not set
CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_OFB is not set
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_POLY1305 is not set
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
# CONFIG_CRYPTO_RSA is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_SEQIV is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA3 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_SM2 is not set
# CONFIG_CRYPTO_SM3 is not set
# CONFIG_CRYPTO_SM4 is not set
# CONFIG_CRYPTO_STREEBOG is not set
# CONFIG_CRYPTO_TEST is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_USER is not set
# CONFIG_CRYPTO_USER_API_AEAD is not set
# CONFIG_CRYPTO_USER_API_HASH is not set
# CONFIG_CRYPTO_USER_API_RNG is not set
# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
# CONFIG_CRYPTO_VMAC is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_XTS is not set
# CONFIG_CRYPTO_XXHASH is not set
# CONFIG_CRYPTO_ZSTD is not set
# CONFIG_EROFS_FS_DEBUG is not set
# CONFIG_EROFS_FS_XATTR is not set
# CONFIG_EROFS_FS_ZIP is not set
CONFIG_FS_DAX=y
CONFIG_FS_IOMAP=y
# CONFIG_INITCALL_ASYNC is not set
# CONFIG_INITRAMFS_FORCE is not set
CONFIG_INITRAMFS_SOURCE=""
@@ -54,9 +158,5 @@ CONFIG_MTD_BLKDEVS=y
CONFIG_ROCKCHIP_RGA_DEBUGGER=y
CONFIG_ROCKCHIP_THUNDER_BOOT_MMC=y
CONFIG_ROCKCHIP_THUNDER_BOOT_SFC=y
CONFIG_ROMFS_BACKED_BY_BLOCK=y
# CONFIG_ROMFS_BACKED_BY_BOTH is not set
# CONFIG_ROMFS_BACKED_BY_MTD is not set
CONFIG_ROMFS_ON_BLOCK=y
# CONFIG_SDIO_UART is not set
CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP=y

5
arch/arm64/boot/dts/rockchip/Makefile
View File

@@ -3,8 +3,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-avb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v11.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v11-avb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-mini-evb-ddr3-v11.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-mini-evb-ddr3-v11-avb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v11-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr4-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb
@@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-lp3-v10-avb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-lp3-v10-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-lp3-v11.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-lp3-v11-avb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-evb-lp3-v12-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-863-lp3-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-863-lp3-v10-avb.dtb

1
arch/arm64/boot/dts/rockchip/px30-android.dtsi
View File

@@ -58,7 +58,6 @@
&display_subsystem {
status = "disabled";
ports = <&vopb_out>, <&vopl_out>;
logo-memory-region = <&drm_logo>;
route {

45
arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10-avb.dts
View File

@@ -4,33 +4,13 @@
*/
/dts-v1/;
#include "px30.dtsi"
#include "px30-android.dtsi"
#include "px30-evb-ddr3-v10.dtsi"
/ {
model = "Rockchip PX30 evb ddr3 board";
compatible = "rockchip,px30-evb-ddr3-v10-avb", "rockchip,px30";
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
io-channels = <&saradc 1>;
};
wireless-bluetooth {
compatible = "bluetooth-platdata";
clocks = <&rk809 1>;
clock-names = "ext_clock";
uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default","rts_gpio";
pinctrl-0 = <&uart1_rts>;
pinctrl-1 = <&uart1_rts_gpio>;
BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
&chosen {
@@ -295,24 +275,3 @@
};
};
};
&gmac {
phy-supply = <&vcc_phy>;
clock_in_out = "input";
assigned-clocks = <&cru SCLK_GMAC>;
assigned-clock-parents = <&gmac_clkin>;
pinctrl-names = "default";
pinctrl-0 = <&rmii_pins &mac_refclk>;
snps,reset-gpio = <&gpio2 13 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 50000 50000>;
status = "okay";
};
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};

1071
arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10-linux.dts
View File

File diff suppressed because it is too large Load Diff

15
arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts
View File

@@ -5,6 +5,8 @@
*/
/dts-v1/;
#include "px30.dtsi"
#include "px30-android.dtsi"
#include "px30-evb-ddr3-v10.dtsi"
/ {
@@ -125,16 +127,3 @@
};
};
};
&gmac {
phy-supply = <&vcc_phy>;
clock_in_out = "input";
assigned-clocks = <&cru SCLK_GMAC>;
assigned-clock-parents = <&gmac_clkin>;
pinctrl-names = "default";
pinctrl-0 = <&rmii_pins &mac_refclk>;
snps,reset-gpio = <&gpio2 13 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 50000 50000>;
status = "okay";
};

64
arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dtsi
View File

@@ -3,14 +3,11 @@
* Copyright (c) 2017-2019 Fuzhou Rockchip Electronics Co., Ltd
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/sensor-dev.h>
#include "px30.dtsi"
#include "px30-android.dtsi"
/ {
adc-keys {
@@ -99,25 +96,26 @@
status = "okay";
};
rk809-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,rk809-codec";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&i2s1_2ch>;
};
simple-audio-card,codec {
sound-dai = <&rk809_codec>;
};
};
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
rk809_sound: rk809-sound {
status = "okay";
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip-rk809";
hp-det-gpio = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
io-channels = <&saradc 1>;
io-channel-names = "adc-detect";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
rockchip,format = "i2s";
rockchip,mclk-fs = <256>;
rockchip,cpu = <&i2s1_2ch>;
rockchip,codec = <&rk809_codec>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
io-channels = <&saradc 1>;
play-pause-key {
label = "playpause";
linux,code = <KEY_PLAYPAUSE>;
press-threshold-microvolt = <2000>;
};
};
sdio_pwrseq: sdio-pwrseq {
@@ -163,7 +161,7 @@
status = "okay";
};
wireless-bluetooth {
wireless_bluetooth: wireless-bluetooth {
compatible = "bluetooth-platdata";
clocks = <&rk809 1>;
clock-names = "ext_clock";
@@ -171,8 +169,8 @@
pinctrl-names = "default","rts_gpio";
pinctrl-0 = <&uart1_rts>;
pinctrl-1 = <&uart1_rts_gpio>;
BT,reset_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
status = "okay";
};
@@ -227,7 +225,11 @@
&gmac {
phy-supply = <&vcc_phy>;
clock_in_out = "output";
clock_in_out = "input";
assigned-clocks = <&cru SCLK_GMAC>;
assigned-clock-parents = <&gmac_clkin>;
pinctrl-names = "default";
pinctrl-0 = <&rmii_pins &mac_refclk>;
snps,reset-gpio = <&gpio2 13 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 50000 50000>;
@@ -342,13 +344,13 @@
vcc_3v0: DCDC_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-initial-mode = <0x2>;
regulator-name = "vcc_3v0";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3000000>;
regulator-suspend-microvolt = <3300000>;
};
};
@@ -393,13 +395,13 @@
vcc3v0_pmu: LDO_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc3v0_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3000000>;
regulator-suspend-microvolt = <3300000>;
};
};
@@ -630,7 +632,7 @@
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
};
};

45
arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts
View File

@@ -4,34 +4,14 @@
*/
/dts-v1/;
#include "px30.dtsi"
#include "px30-android.dtsi"
#include "px30-evb-ddr3-v10.dtsi"
#include "px30-ddr4p416dd6-timing.dtsi"
/ {
model = "Rockchip PX30 evb ddr4 board";
compatible = "rockchip,px30-evb-ddr4-v10", "rockchip,px30";
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
io-channels = <&saradc 1>;
};
wireless-bluetooth {
compatible = "bluetooth-platdata";
clocks = <&rk809 1>;
clock-names = "ext_clock";
uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default","rts_gpio";
pinctrl-0 = <&uart1_rts>;
pinctrl-1 = <&uart1_rts_gpio>;
BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
&chosen {
@@ -296,24 +276,3 @@
};
};
};
&gmac {
phy-supply = <&vcc_phy>;
clock_in_out = "input";
assigned-clocks = <&cru SCLK_GMAC>;
assigned-clock-parents = <&gmac_clkin>;
pinctrl-names = "default";
pinctrl-0 = <&rmii_pins &mac_refclk>;
snps,reset-gpio = <&gpio2 13 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 50000 50000>;
status = "okay";
};
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};

1
arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618.dtsi
View File

@@ -7,6 +7,7 @@
#include <dt-bindings/clock/rk618-cru.h>
#include <dt-bindings/display/media-bus-format.h>
#include "px30-evb-ddr3-v10.dtsi"
#include "px30-android.dtsi"
&dsi {
status = "okay";

7
arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v11-avb.dts → arch/arm64/boot/dts/rockchip/px30-mini-evb-ddr3-v11-avb.dts
View File

@@ -4,11 +4,14 @@
*/
/dts-v1/;
#include "px30.dtsi"
#include "px30-android.dtsi"
#include "px30-evb-ddr3-v10.dtsi"
#include "px30-mini-evb-v11.dtsi"
/ {
model = "Rockchip PX30 evb ddr3 board";
compatible = "rockchip,px30-evb-ddr3-v11-avb", "rockchip,px30";
model = "Rockchip PX30 mini evb ddr3 board";
compatible = "rockchip,px30-mini-evb-ddr3-v11-avb", "rockchip,px30";
};
&chosen {

7
arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v11.dts → arch/arm64/boot/dts/rockchip/px30-mini-evb-ddr3-v11.dts
View File

@@ -4,11 +4,14 @@
*/
/dts-v1/;
#include "px30.dtsi"
#include "px30-android.dtsi"
#include "px30-evb-ddr3-v10.dtsi"
#include "px30-mini-evb-v11.dtsi"
/ {
model = "Rockchip PX30 evb ddr3 board";
compatible = "rockchip,px30-evb-ddr3-v11", "rockchip,px30";
model = "Rockchip PX30 mini evb ddr3 board";
compatible = "rockchip,px30-mini-evb-ddr3-v11", "rockchip,px30";
};
&dsi {

31
arch/arm64/boot/dts/rockchip/px30-mini-evb-v11.dtsi Normal file
View File

@@ -0,0 +1,31 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Fuzhou Rockchip Electronics Co., Ltd
*/
&gmac {
clock_in_out = "output";
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
pinctrl-names = "default";
pinctrl-0 = <&rmii_pins &mac_refclk_12ma>;
};
&rk809_sound {
hp-det-gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
};
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};
&wireless_bluetooth {
BT,reset_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
};

5
arch/arm64/boot/dts/rockchip/rk3308.dtsi
View File

@@ -23,6 +23,11 @@
aliases {
ethernet0 = &mac;
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
gpio4 = &gpio4;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;

4
arch/arm64/boot/dts/rockchip/rk3308k.dtsi
View File

@@ -41,10 +41,10 @@
k_i = <0>;
trips {
trip-point-0 {
trip-point@0 {
temperature = <55000>;
};
trip-point-1 {
trip-point@1 {
temperature = <90000>;
};
};

42
arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi
View File

@@ -83,29 +83,13 @@
};
rk817-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip-rk817-codec";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,widgets =
"Microphone", "Mic Jack",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"Mic Jack", "MICBIAS1",
"IN1P", "Mic Jack",
"Headphone Jack", "HPOL",
"Headphone Jack", "HPOR";
simple-audio-card,cpu {
sound-dai = <&i2s1_2ch>;
};
simple-audio-card,codec {
sound-dai = <&rk817_codec>;
};
};
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip-rk817";
hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
rockchip,format = "i2s";
rockchip,mclk-fs = <256>;
rockchip,cpu = <&i2s1_2ch>;
rockchip,codec = <&rk817_codec>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
};
@@ -245,10 +229,6 @@
status = "okay";
};
&dsi_in_vopl {
status = "disabled";
};
&route_dsi {
connect = <&vopb_out_dsi>;
status = "okay";
@@ -800,14 +780,6 @@
status = "okay";
};
&vopl {
status = "okay";
};
&vopl_mmu {
status = "okay";
};
&mpp_srv {
status = "okay";
};

3
arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-avb.dts
View File

@@ -4,7 +4,10 @@
*/
/dts-v1/;
#include "rk3326.dtsi"
#include "px30-android.dtsi"
#include "rk3326-evb-lp3-v10.dtsi"
#include "rk3326-863-cif-sensor.dtsi"
/ {
model = "Rockchip rk3326 evb board";

1060
arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-linux.dts
View File

File diff suppressed because it is too large Load Diff

3
arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts
View File

@@ -4,7 +4,10 @@
*/
/dts-v1/;
#include "rk3326.dtsi"
#include "px30-android.dtsi"
#include "rk3326-evb-lp3-v10.dtsi"
#include "rk3326-863-cif-sensor.dtsi"
/ {
model = "Rockchip rk3326 evb board";

48
arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dtsi
View File

@@ -3,15 +3,11 @@
* Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
*/
/dts-v1/;
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/sensor-dev.h>
#include "rk3326.dtsi"
#include "rk3326-863-cif-sensor.dtsi"
#include "px30-android.dtsi"
/ {
adc-keys {
@@ -92,24 +88,24 @@
};
rk817-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,rk817-codec";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&i2s1_2ch>;
};
simple-audio-card,codec {
sound-dai = <&rk817_codec>;
};
};
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip-rk817";
hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
io-channels = <&saradc 1>;
io-channel-names = "adc-detect";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
rockchip,format = "i2s";
rockchip,mclk-fs = <256>;
rockchip,cpu = <&i2s1_2ch>;
rockchip,codec = <&rk817_codec>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
io-channels = <&saradc 1>;
play-pause-key {
label = "playpause";
linux,code = <KEY_PLAYPAUSE>;
press-threshold-microvolt = <2000>;
};
};
sdio_pwrseq: sdio-pwrseq {
@@ -308,10 +304,6 @@
status = "okay";
};
&dsi_in_vopl {
status = "disabled";
};
&route_dsi {
connect = <&vopb_out_dsi>;
status = "okay";
@@ -850,14 +842,6 @@
status = "okay";
};
&vopl {
status = "okay";
};
&vopl_mmu {
status = "okay";
};
&mpp_srv {
status = "okay";
};

3
arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v11-avb.dts
View File

@@ -4,7 +4,10 @@
*/
/dts-v1/;
#include "rk3326.dtsi"
#include "px30-android.dtsi"
#include "rk3326-evb-lp3-v10.dtsi"
#include "rk3326-863-cif-sensor.dtsi"
/ {
model = "Rockchip rk3326 evb board";

3
arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v11.dts
View File

@@ -4,7 +4,10 @@
*/
/dts-v1/;
#include "rk3326.dtsi"
#include "px30-android.dtsi"
#include "rk3326-evb-lp3-v10.dtsi"
#include "rk3326-863-cif-sensor.dtsi"
/ {
model = "Rockchip rk3326 evb board";

273
arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v12-linux.dts Normal file
View File

@@ -0,0 +1,273 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd
*
*/
/dts-v1/;
#include "rk3326-evb-lp3-v10-linux.dts"
/ {
model = "Rockchip rk3326 evb lpddr3 v12 board for linux";
compatible = "rockchip,rk3326-evb-lp3-v12-linux", "rockchip,rk3326";
};
&dsi {
status = "okay";
panel@0 {
compatible = "sitronix,st7703", "simple-panel-dsi";
reg = <0>;
backlight = <&backlight>;
power-supply = <&vcc18_lcd_n>;
prepare-delay-ms = <0>;
reset-delay-ms = <0>;
init-delay-ms = <80>;
enable-delay-ms = <0>;
disable-delay-ms = <10>;
unprepare-delay-ms = <60>;
width-mm = <68>;
height-mm = <121>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
panel-init-sequence = [
39 00 04 ff 98 81 03
15 00 02 01 00
15 00 02 02 00
15 00 02 03 53
15 00 02 04 53
15 00 02 05 13
15 00 02 06 04
15 00 02 07 02
15 00 02 08 02
15 00 02 09 00
15 00 02 0a 00
15 00 02 0b 00
15 00 02 0c 00
15 00 02 0d 00
15 00 02 0e 00
15 00 02 0f 00
15 00 02 10 00
15 00 02 11 00
15 00 02 12 00
15 00 02 13 00
15 00 02 14 00
15 00 02 15 08
15 00 02 16 10
15 00 02 17 00
15 00 02 18 08
15 00 02 19 00
15 00 02 1a 00
15 00 02 1b 00
15 00 02 1c 00
15 00 02 1d 00
15 00 02 1e c0
15 00 02 1f 80
15 00 02 20 02
15 00 02 21 09
15 00 02 22 00
15 00 02 23 00
15 00 02 24 00
15 00 02 25 00
15 00 02 26 00
15 00 02 27 00
15 00 02 28 55
15 00 02 29 03
15 00 02 2a 00
15 00 02 2b 00
15 00 02 2c 00
15 00 02 2d 00
15 00 02 2e 00
15 00 02 2f 00
15 00 02 30 00
15 00 02 31 00
15 00 02 32 00
15 00 02 33 00
15 00 02 34 04
15 00 02 35 05
15 00 02 36 05
15 00 02 37 00
15 00 02 38 3c
15 00 02 39 35
15 00 02 3a 00
15 00 02 3b 40
15 00 02 3c 00
15 00 02 3d 00
15 00 02 3e 00
15 00 02 3f 00
15 00 02 40 00
15 00 02 41 88
15 00 02 42 00
15 00 02 43 00
15 00 02 44 1f
15 00 02 50 01
15 00 02 51 23
15 00 02 52 45
15 00 02 53 67
15 00 02 54 89
15 00 02 55 ab
15 00 02 56 01
15 00 02 57 23
15 00 02 58 45
15 00 02 59 67
15 00 02 5a 89
15 00 02 5b ab
15 00 02 5c cd
15 00 02 5d ef
15 00 02 5e 03
15 00 02 5f 14
15 00 02 60 15
15 00 02 61 0c
15 00 02 62 0d
15 00 02 63 0e
15 00 02 64 0f
15 00 02 65 10
15 00 02 66 11
15 00 02 67 08
15 00 02 68 02
15 00 02 69 0a
15 00 02 6a 02
15 00 02 6b 02
15 00 02 6c 02
15 00 02 6d 02
15 00 02 6e 02
15 00 02 6f 02
15 00 02 70 02
15 00 02 71 02
15 00 02 72 06
15 00 02 73 02
15 00 02 74 02
15 00 02 75 14
15 00 02 76 15
15 00 02 77 0f
15 00 02 78 0e
15 00 02 79 0d
15 00 02 7a 0c
15 00 02 7b 11
15 00 02 7c 10
15 00 02 7d 06
15 00 02 7e 02
15 00 02 7f 0a
15 00 02 80 02
15 00 02 81 02
15 00 02 82 02
15 00 02 83 02
15 00 02 84 02
15 00 02 85 02
15 00 02 86 02
15 00 02 87 02
15 00 02 88 08
15 00 02 89 02
15 00 02 8a 02
39 00 04 ff 98 81 04
15 00 02 00 80
15 00 02 70 00
15 00 02 71 00
15 00 02 66 fe
15 00 02 82 15
15 00 02 84 15
15 00 02 85 15
15 00 02 3a 24
15 00 02 32 ac
15 00 02 8c 80
15 00 02 3c f5
15 00 02 88 33
39 00 04 ff 98 81 01
15 00 02 22 0a
15 00 02 31 00
15 00 02 53 78
15 00 02 50 5b
15 00 02 51 5b
15 00 02 60 20
15 00 02 61 00
15 00 02 62 0d
15 00 02 63 00
15 00 02 a0 00
15 00 02 a1 10
15 00 02 a2 1c
15 00 02 a3 13
15 00 02 a4 15
15 00 02 a5 26
15 00 02 a6 1a
15 00 02 a7 1d
15 00 02 a8 67
15 00 02 a9 1c
15 00 02 aa 29
15 00 02 ab 5b
15 00 02 ac 26
15 00 02 ad 28
15 00 02 ae 5c
15 00 02 af 30
15 00 02 b0 31
15 00 02 b1 2e
15 00 02 b2 32
15 00 02 b3 00
15 00 02 c0 00
15 00 02 c1 10
15 00 02 c2 1c
15 00 02 c3 13
15 00 02 c4 15
15 00 02 c5 26
15 00 02 c6 1a
15 00 02 c7 1d
15 00 02 c8 67
15 00 02 c9 1c
15 00 02 ca 29
15 00 02 cb 5b
15 00 02 cc 26
15 00 02 cd 28
15 00 02 ce 5c
15 00 02 cf 30
15 00 02 d0 31
15 00 02 d1 2e
15 00 02 d2 32
15 00 02 d3 00
39 00 04 ff 98 81 00
05 00 01 11
05 01 01 29
];
panel-exit-sequence = [
05 00 01 28
05 00 01 10
];
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <66000000>;
hactive = <720>;
vactive = <1280>;
hfront-porch = <40>;
hsync-len = <10>;
hback-porch = <40>;
vfront-porch = <22>;
vsync-len = <4>;
vback-porch = <11>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
};
};

10
arch/arm64/boot/dts/rockchip/rk3326-linux.dtsi
View File

@@ -39,6 +39,15 @@
compatible = "rockchip,drm-logo";
reg = <0x0 0x0 0x0 0x0>;
};
ramoops: ramoops@110000 {
compatible = "ramoops";
reg = <0x0 0x110000 0x0 0xf0000>;
record-size = <0x20000>;
console-size = <0x80000>;
ftrace-size = <0x00000>;
pmsg-size = <0x50000>;
};
};
};
@@ -48,7 +57,6 @@
&display_subsystem {
status = "disabled";
ports = <&vopb_out>, <&vopl_out>;
logo-memory-region = <&drm_logo>;
route {

10
arch/arm64/boot/dts/rockchip/rk3326.dtsi
View File

@@ -10,6 +10,10 @@
assigned-clock-rates = <1040000000>;
};
&display_subsystem {
ports = <&vopb_out>;
};
&gpu_opp_table {
opp-520000000 {
opp-hz = /bits/ 64 <520000000>;
@@ -76,3 +80,9 @@
};
};
};
/delete-node/ &dsi_in_vopl;
/delete-node/ &lvds_vopl_in;
/delete-node/ &rgb_in_vopl;
/delete-node/ &vopl;
/delete-node/ &vopl_mmu;

4
arch/arm64/boot/dts/rockchip/rk3328.dtsi
View File

@@ -20,6 +20,10 @@
#size-cells = <2>;
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;

4
arch/arm64/boot/dts/rockchip/rk3368.dtsi
View File

@@ -19,6 +19,10 @@
aliases {
ethernet0 = &gmac;
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;

5
arch/arm64/boot/dts/rockchip/rk3399-evb-ind-lpddr4-linux.dts
View File

@@ -287,6 +287,11 @@
status = "okay";
};
&route_hdmi {
status = "okay";
connect = <&vopb_out_hdmi>;
};
/*
* if enable dp_sound, should disable spdif_sound and spdif_out
*/

5
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View File

@@ -27,6 +27,11 @@
dsi0 = &dsi;
dsi1 = &dsi1;
ethernet0 = &gmac;
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
gpio4 = &gpio4;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;

13
arch/arm64/boot/dts/rockchip/rk3566-evb1-ddr4-v10.dtsi
View File

@@ -25,13 +25,6 @@
vin-supply = <&dc_12v>;
};
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
};
vcc3v3_vga: vcc3v3-vga {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_vga";
@@ -457,12 +450,6 @@
};
};
headphone {
hp_det: hp-det {
rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
lcd0 {
lcd0_rst_gpio: lcd0-rst-gpio {
rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;

33
arch/arm64/boot/dts/rockchip/rk3566-evb2-lp4x-v10.dtsi
View File

@@ -16,13 +16,6 @@
model = "Rockchip RK3566 EVB2 LP4X V10 Board";
compatible = "rockchip,rk3566-evb2-lp4x-v10", "rockchip,rk3566";
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
};
vcc_camera: vcc-camera-regulator {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
@@ -78,6 +71,18 @@
remote-endpoint = <&gc8034_out>;
data-lanes = <1 2 3 4>;
};
mipi_in_ucam1: endpoint@2 {
reg = <2>;
remote-endpoint = <&ov5695_out>;
data-lanes = <1 2>;
};
mipi_in_ucam2: endpoint@3 {
reg = <3>;
remote-endpoint = <&gc5025_out>;
data-lanes = <1 2>;
};
};
port@1 {
@@ -112,7 +117,7 @@
dphy1_in: endpoint@1 {
reg = <1>;
remote-endpoint = <&ov5695_out>;
//remote-endpoint = <&ov5695_out>;
data-lanes = <1 2>;
};
};
@@ -149,7 +154,7 @@
dphy2_in: endpoint@1 {
reg = <1>;
remote-endpoint = <&gc5025_out>;
//remote-endpoint = <&gc5025_out>;
data-lanes = <1 2>;
};
};
@@ -263,7 +268,7 @@
rockchip,camera-module-lens-name = "CHT842-MD";
port {
ov5695_out: endpoint {
remote-endpoint = <&dphy1_in>;
remote-endpoint = <&mipi_in_ucam1>;
data-lanes = <1 2>;
};
};
@@ -288,7 +293,7 @@
rockchip,camera-module-lens-name = "CHT842-MD";
port {
gc5025_out: endpoint {
remote-endpoint = <&dphy2_in>;
remote-endpoint = <&mipi_in_ucam2>;
data-lanes = <1 2>;
};
};
@@ -430,12 +435,6 @@
};
};
headphone {
hp_det: hp-det {
rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;

20
arch/arm64/boot/dts/rockchip/rk3566-rk817-eink.dts
View File

@@ -75,17 +75,15 @@
};
rk817-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,rk817-codec";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&i2s1_8ch>;
};
simple-audio-card,codec {
sound-dai = <&rk817_codec>;
};
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip-rk817";
hp-det-gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>;
rockchip,format = "i2s";
rockchip,mclk-fs = <256>;
rockchip,cpu = <&i2s1_8ch>;
rockchip,codec = <&rk817_codec>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
};
sdio_pwrseq: sdio-pwrseq {

33
arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-v10.dts
View File

@@ -137,25 +137,24 @@
};
rk817-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,rk817-codec";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&i2s1_8ch>;
};
simple-audio-card,codec {
sound-dai = <&rk817_codec>;
};
};
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>;
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip-rk817";
hp-det-gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>;
io-channels = <&saradc 2>;
io-channel-names = "adc-detect";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
rockchip,format = "i2s";
rockchip,mclk-fs = <256>;
rockchip,cpu = <&i2s1_8ch>;
rockchip,codec = <&rk817_codec>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
io-channels = <&saradc 2>;
play-pause-key {
label = "playpause";
linux,code = <KEY_PLAYPAUSE>;
press-threshold-microvolt = <2000>;
};
};
sdio_pwrseq: sdio-pwrseq {

33
arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet.dts
View File

@@ -137,25 +137,24 @@
};
rk817-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,rk817-codec";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&i2s1_8ch>;
};
simple-audio-card,codec {
sound-dai = <&rk817_codec>;
};
};
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>;
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip-rk817";
hp-det-gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>;
io-channels = <&saradc 2>;
io-channel-names = "adc-detect";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
rockchip,format = "i2s";
rockchip,mclk-fs = <256>;
rockchip,cpu = <&i2s1_8ch>;
rockchip,codec = <&rk817_codec>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
io-channels = <&saradc 2>;
play-pause-key {
label = "playpause";
linux,code = <KEY_PLAYPAUSE>;
press-threshold-microvolt = <2000>;
};
};
sdio_pwrseq: sdio-pwrseq {

26
arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi
View File

@@ -193,17 +193,15 @@
rk809_sound: rk809-sound {
status = "okay";
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,rk809-codec";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&i2s1_8ch>;
};
simple-audio-card,codec {
sound-dai = <&rk809_codec 0>;
};
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip-rk809";
hp-det-gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
rockchip,format = "i2s";
rockchip,mclk-fs = <256>;
rockchip,cpu = <&i2s1_8ch>;
rockchip,codec = <&rk809_codec>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
};
spdif-sound {
@@ -1452,6 +1450,12 @@
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
mxc6655xa {
mxc6655xa_irq_gpio: mxc6655xa_irq_gpio {
rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;

16
arch/arm64/boot/dts/rockchip/rk3568-evb1-ddr4-v10.dtsi
View File

@@ -15,13 +15,6 @@
model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
};
vcc2v5_sys: vcc2v5-ddr {
compatible = "regulator-fixed";
regulator-name = "vcc2v5-sys";
@@ -398,6 +391,10 @@
};
};
&rk809_sound {
hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
};
&rkisp {
status = "okay";
};
@@ -425,6 +422,11 @@
connect = <&vp1_out_dsi0>;
};
&route_edp {
status = "okay";
connect = <&vp0_out_edp>;
};
&sata2 {
status = "okay";
};

6
arch/arm64/boot/dts/rockchip/rk3568.dtsi
View File

@@ -2892,7 +2892,7 @@
};
can0: can@fe570000 {
compatible = "rockchip,canfd-1.0";
compatible = "rockchip,rk3568-can-2.0";
reg = <0x0 0xfe570000 0x0 0x1000>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru CLK_CAN0>, <&cru PCLK_CAN0>;
@@ -2905,7 +2905,7 @@
};
can1: can@fe580000 {
compatible = "rockchip,canfd-1.0";
compatible = "rockchip,rk3568-can-2.0";
reg = <0x0 0xfe580000 0x0 0x1000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru CLK_CAN1>, <&cru PCLK_CAN1>;
@@ -2918,7 +2918,7 @@
};
can2: can@fe590000 {
compatible = "rockchip,canfd-1.0";
compatible = "rockchip,rk3568-can-2.0";
reg = <0x0 0xfe590000 0x0 0x1000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru CLK_CAN2>, <&cru PCLK_CAN2>;

21
arch/arm64/boot/dts/rockchip/rk3588-android.dtsi
View File

@@ -53,15 +53,6 @@
};
};
ramoops: ramoops@110000 {
compatible = "ramoops";
reg = <0x0 0x110000 0x0 0xf0000>;
record-size = <0x20000>;
console-size = <0x80000>;
ftrace-size = <0x00000>;
pmsg-size = <0x50000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
@@ -83,6 +74,18 @@
compatible = "rockchip,drm-cubic-lut";
reg = <0x0 0x0 0x0 0x0>;
};
ramoops: ramoops@110000 {
compatible = "ramoops";
/* 0x110000 to 0x1f0000 is for ramoops */
reg = <0x0 0x110000 0x0 0xe0000>;
boot-log-size = <0x8000>; /* do not change */
boot-log-count = <0x1>; /* do not change */
console-size = <0x80000>;
pmsg-size = <0x30000>;
ftrace-size = <0x00000>;
record-size = <0x14000>;
};
};
};

16
arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4-v10-ipc-6x-linux.dts
View File

@@ -67,18 +67,6 @@
status = "disabled";
};
&hdmi0 {
status = "disabled";
};
&hdmi0_in_vp0 {
status = "disabled";
};
&hdmi0_sound {
status = "disabled";
};
&hdmi1 {
status = "disabled";
};
@@ -91,10 +79,6 @@
status = "disabled";
};
&hdptxphy_hdmi0 {
status = "disabled";
};
&hdptxphy_hdmi1 {
status = "disabled";
};

21
arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4.dtsi
View File

@@ -62,6 +62,20 @@
};
};
fan: pwm-fan {
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm9 0 50000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = <
50000 1
55000 2
60000 3
65000 4
70000 5
>;
};
hdmiin_dc: hdmiin-dc {
compatible = "rockchip,dummy-codec";
#sound-dai-cells = <0>;
@@ -613,7 +627,7 @@
touch_gpio: touch-gpio {
rockchip,pins =
<0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>,
<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
@@ -666,6 +680,11 @@
status = "okay";
};
&pwm9 {
pinctrl-0 = <&pwm9m1_pins>;
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp3_out_dsi0>;

10
arch/arm64/boot/dts/rockchip/rk3588-evb2-lp4.dtsi
View File

@@ -67,6 +67,14 @@
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm9 0 50000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = <
50000 1
55000 2
60000 3
65000 4
70000 5
>;
};
pcie20_avdd0v85: pcie20-avdd0v85 {
@@ -411,7 +419,7 @@
touch_gpio: touch-gpio {
rockchip,pins =
<0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>,
<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};

8
arch/arm64/boot/dts/rockchip/rk3588-evb3-lp5.dtsi
View File

@@ -68,6 +68,14 @@
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm6 0 50000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = <
50000 1
55000 2
60000 3
65000 4
70000 5
>;
};
hall_sensor: hall-mh248 {

10
arch/arm64/boot/dts/rockchip/rk3588-evb4-lp4.dtsi
View File

@@ -14,6 +14,14 @@
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm14 0 50000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = <
50000 1
55000 2
60000 3
65000 4
70000 5
>;
};
pcie30_avdd1v8: pcie30-avdd1v8 {
@@ -373,7 +381,7 @@
touch_gpio: touch-gpio {
rockchip,pins =
<0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>,
<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};

8
arch/arm64/boot/dts/rockchip/rk3588-evb5-lp4.dtsi
View File

@@ -28,6 +28,14 @@
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm9 0 50000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = <
50000 1
55000 2
60000 3
65000 4
70000 5
>;
};
hdmiin_dc: hdmiin-dc {

2
arch/arm64/boot/dts/rockchip/rk3588-evb6-lp4.dtsi
View File

@@ -416,7 +416,7 @@
touch_gpio: touch-gpio {
rockchip,pins =
<0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>,
<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};

8
arch/arm64/boot/dts/rockchip/rk3588-evb7-lp4.dtsi
View File

@@ -66,6 +66,14 @@
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm3 0 50000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = <
50000 1
55000 2
60000 3
65000 4
70000 5
>;
};
hdmiin_dc: hdmiin-dc {

18
arch/arm64/boot/dts/rockchip/rk3588-linux.dtsi
View File

@@ -60,15 +60,6 @@
};
};
ramoops: ramoops@110000 {
compatible = "ramoops";
reg = <0x0 0x110000 0x0 0xf0000>;
record-size = <0x20000>;
console-size = <0x80000>;
ftrace-size = <0x00000>;
pmsg-size = <0x50000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
@@ -90,6 +81,15 @@
compatible = "rockchip,drm-cubic-lut";
reg = <0x0 0x0 0x0 0x0>;
};
ramoops: ramoops@110000 {
compatible = "ramoops";
reg = <0x0 0x110000 0x0 0xf0000>;
record-size = <0x20000>;
console-size = <0x80000>;
ftrace-size = <0x00000>;
pmsg-size = <0x50000>;
};
};
};

2
arch/arm64/boot/dts/rockchip/rk3588-toybrick-edp-x0.dtsi
View File

@@ -647,7 +647,7 @@
touch_gpio: touch-gpio {
rockchip,pins =
<0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>,
<0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
<0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};

2
arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dtsi
View File

@@ -613,7 +613,7 @@
touch_gpio: touch-gpio {
rockchip,pins =
<0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>,
<0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
<0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};

8
arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb.dtsi
View File

@@ -51,6 +51,14 @@
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm3 0 50000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = <
50000 1
55000 2
60000 3
65000 4
70000 5
>;
};

8
arch/arm64/boot/dts/rockchip/rk3588s-evb1-lp4x.dtsi
View File

@@ -115,6 +115,14 @@
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm11 0 50000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = <
50000 1
55000 2
60000 3
65000 4
70000 5
>;
};
hall_sensor: hall-mh248 {

2
arch/arm64/boot/dts/rockchip/rk3588s-evb2-lp5.dtsi
View File

@@ -890,7 +890,7 @@
touch_gpio: touch-gpio {
rockchip,pins =
<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
<4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
<4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};

10
arch/arm64/boot/dts/rockchip/rk3588s-evb3-lp4x.dtsi
View File

@@ -34,6 +34,14 @@
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm7 0 50000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = <
50000 1
55000 2
60000 3
65000 4
70000 5
>;
};
vcc3v3_lcd_n: vcc3v3-lcd0-n {
@@ -243,7 +251,7 @@
touch_gpio: touch-gpio {
rockchip,pins =
<1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};

10
arch/arm64/boot/dts/rockchip/rk3588s-evb4-lp4x.dtsi
View File

@@ -88,6 +88,14 @@
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm11 0 50000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = <
50000 1
55000 2
60000 3
65000 4
70000 5
>;
};
vbus5v0_typec: vbus5v0-typec {
@@ -678,7 +686,7 @@
touch_gpio: touch-gpio {
rockchip,pins =
<1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};

8
arch/arm64/boot/dts/rockchip/rk3588s-evb8-lp4x.dtsi
View File

@@ -88,6 +88,14 @@
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm11 0 50000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = <
50000 1
55000 2
60000 3
65000 4
70000 5
>;
};
panel-edp {

138
arch/arm64/boot/dts/rockchip/rk3588s-pinctrl.dtsi
View File

@@ -2527,97 +2527,97 @@
spi0m0_pins: spi0m0-pins {
rockchip,pins =
/* spi0_clk_m0 */
<0 RK_PC6 8 &pcfg_pull_up_drv_level_1>,
<0 RK_PC6 8 &pcfg_pull_up_drv_level_6>,
/* spi0_miso_m0 */
<0 RK_PC7 8 &pcfg_pull_up_drv_level_1>,
<0 RK_PC7 8 &pcfg_pull_up_drv_level_6>,
/* spi0_mosi_m0 */
<0 RK_PC0 8 &pcfg_pull_up_drv_level_1>;
<0 RK_PC0 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi0m0_cs0: spi0m0-cs0 {
rockchip,pins =
/* spi0_cs0_m0 */
<0 RK_PD1 8 &pcfg_pull_up_drv_level_1>;
<0 RK_PD1 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi0m0_cs1: spi0m0-cs1 {
rockchip,pins =
/* spi0_cs1_m0 */
<0 RK_PB7 8 &pcfg_pull_up_drv_level_1>;
<0 RK_PB7 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi0m1_pins: spi0m1-pins {
rockchip,pins =
/* spi0_clk_m1 */
<4 RK_PA2 8 &pcfg_pull_up_drv_level_1>,
<4 RK_PA2 8 &pcfg_pull_up_drv_level_6>,
/* spi0_miso_m1 */
<4 RK_PA0 8 &pcfg_pull_up_drv_level_1>,
<4 RK_PA0 8 &pcfg_pull_up_drv_level_6>,
/* spi0_mosi_m1 */
<4 RK_PA1 8 &pcfg_pull_up_drv_level_1>;
<4 RK_PA1 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi0m1_cs0: spi0m1-cs0 {
rockchip,pins =
/* spi0_cs0_m1 */
<4 RK_PB2 8 &pcfg_pull_up_drv_level_1>;
<4 RK_PB2 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi0m1_cs1: spi0m1-cs1 {
rockchip,pins =
/* spi0_cs1_m1 */
<4 RK_PB1 8 &pcfg_pull_up_drv_level_1>;
<4 RK_PB1 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi0m2_pins: spi0m2-pins {
rockchip,pins =
/* spi0_clk_m2 */
<1 RK_PB3 8 &pcfg_pull_up_drv_level_1>,
<1 RK_PB3 8 &pcfg_pull_up_drv_level_6>,
/* spi0_miso_m2 */
<1 RK_PB1 8 &pcfg_pull_up_drv_level_1>,
<1 RK_PB1 8 &pcfg_pull_up_drv_level_6>,
/* spi0_mosi_m2 */
<1 RK_PB2 8 &pcfg_pull_up_drv_level_1>;
<1 RK_PB2 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi0m2_cs0: spi0m2-cs0 {
rockchip,pins =
/* spi0_cs0_m2 */
<1 RK_PB4 8 &pcfg_pull_up_drv_level_1>;
<1 RK_PB4 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi0m2_cs1: spi0m2-cs1 {
rockchip,pins =
/* spi0_cs1_m2 */
<1 RK_PB5 8 &pcfg_pull_up_drv_level_1>;
<1 RK_PB5 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi0m3_pins: spi0m3-pins {
rockchip,pins =
/* spi0_clk_m3 */
<3 RK_PD3 8 &pcfg_pull_up_drv_level_1>,
<3 RK_PD3 8 &pcfg_pull_up_drv_level_6>,
/* spi0_miso_m3 */
<3 RK_PD1 8 &pcfg_pull_up_drv_level_1>,
<3 RK_PD1 8 &pcfg_pull_up_drv_level_6>,
/* spi0_mosi_m3 */
<3 RK_PD2 8 &pcfg_pull_up_drv_level_1>;
<3 RK_PD2 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi0m3_cs0: spi0m3-cs0 {
rockchip,pins =
/* spi0_cs0_m3 */
<3 RK_PD4 8 &pcfg_pull_up_drv_level_1>;
<3 RK_PD4 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi0m3_cs1: spi0m3-cs1 {
rockchip,pins =
/* spi0_cs1_m3 */
<3 RK_PD5 8 &pcfg_pull_up_drv_level_1>;
<3 RK_PD5 8 &pcfg_pull_up_drv_level_6>;
};
};
@@ -2626,50 +2626,50 @@
spi1m1_pins: spi1m1-pins {
rockchip,pins =
/* spi1_clk_m1 */
<3 RK_PC1 8 &pcfg_pull_up_drv_level_1>,
<3 RK_PC1 8 &pcfg_pull_up_drv_level_6>,
/* spi1_miso_m1 */
<3 RK_PC0 8 &pcfg_pull_up_drv_level_1>,
<3 RK_PC0 8 &pcfg_pull_up_drv_level_6>,
/* spi1_mosi_m1 */
<3 RK_PB7 8 &pcfg_pull_up_drv_level_1>;
<3 RK_PB7 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi1m1_cs0: spi1m1-cs0 {
rockchip,pins =
/* spi1_cs0_m1 */
<3 RK_PC2 8 &pcfg_pull_up_drv_level_1>;
<3 RK_PC2 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi1m1_cs1: spi1m1-cs1 {
rockchip,pins =
/* spi1_cs1_m1 */
<3 RK_PC3 8 &pcfg_pull_up_drv_level_1>;
<3 RK_PC3 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi1m2_pins: spi1m2-pins {
rockchip,pins =
/* spi1_clk_m2 */
<1 RK_PD2 8 &pcfg_pull_up_drv_level_1>,
<1 RK_PD2 8 &pcfg_pull_up_drv_level_6>,
/* spi1_miso_m2 */
<1 RK_PD0 8 &pcfg_pull_up_drv_level_1>,
<1 RK_PD0 8 &pcfg_pull_up_drv_level_6>,
/* spi1_mosi_m2 */
<1 RK_PD1 8 &pcfg_pull_up_drv_level_1>;
<1 RK_PD1 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi1m2_cs0: spi1m2-cs0 {
rockchip,pins =
/* spi1_cs0_m2 */
<1 RK_PD3 8 &pcfg_pull_up_drv_level_1>;
<1 RK_PD3 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi1m2_cs1: spi1m2-cs1 {
rockchip,pins =
/* spi1_cs1_m2 */
<1 RK_PD5 8 &pcfg_pull_up_drv_level_1>;
<1 RK_PD5 8 &pcfg_pull_up_drv_level_6>;
};
};
@@ -2678,50 +2678,50 @@
spi2m0_pins: spi2m0-pins {
rockchip,pins =
/* spi2_clk_m0 */
<1 RK_PA6 8 &pcfg_pull_up_drv_level_1>,
<1 RK_PA6 8 &pcfg_pull_up_drv_level_6>,
/* spi2_miso_m0 */
<1 RK_PA4 8 &pcfg_pull_up_drv_level_1>,
<1 RK_PA4 8 &pcfg_pull_up_drv_level_6>,
/* spi2_mosi_m0 */
<1 RK_PA5 8 &pcfg_pull_up_drv_level_1>;
<1 RK_PA5 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi2m0_cs0: spi2m0-cs0 {
rockchip,pins =
/* spi2_cs0_m0 */
<1 RK_PA7 8 &pcfg_pull_up_drv_level_1>;
<1 RK_PA7 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi2m0_cs1: spi2m0-cs1 {
rockchip,pins =
/* spi2_cs1_m0 */
<1 RK_PB0 8 &pcfg_pull_up_drv_level_1>;
<1 RK_PB0 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi2m1_pins: spi2m1-pins {
rockchip,pins =
/* spi2_clk_m1 */
<4 RK_PA6 8 &pcfg_pull_up_drv_level_1>,
<4 RK_PA6 8 &pcfg_pull_up_drv_level_6>,
/* spi2_miso_m1 */
<4 RK_PA4 8 &pcfg_pull_up_drv_level_1>,
<4 RK_PA4 8 &pcfg_pull_up_drv_level_6>,
/* spi2_mosi_m1 */
<4 RK_PA5 8 &pcfg_pull_up_drv_level_1>;
<4 RK_PA5 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi2m1_cs0: spi2m1-cs0 {
rockchip,pins =
/* spi2_cs0_m1 */
<4 RK_PA7 8 &pcfg_pull_up_drv_level_1>;
<4 RK_PA7 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi2m1_cs1: spi2m1-cs1 {
rockchip,pins =
/* spi2_cs1_m1 */
<4 RK_PB0 8 &pcfg_pull_up_drv_level_1>;
<4 RK_PB0 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
@@ -2755,75 +2755,75 @@
spi3m1_pins: spi3m1-pins {
rockchip,pins =
/* spi3_clk_m1 */
<4 RK_PB7 8 &pcfg_pull_up_drv_level_1>,
<4 RK_PB7 8 &pcfg_pull_up_drv_level_6>,
/* spi3_miso_m1 */
<4 RK_PB5 8 &pcfg_pull_up_drv_level_1>,
<4 RK_PB5 8 &pcfg_pull_up_drv_level_6>,
/* spi3_mosi_m1 */
<4 RK_PB6 8 &pcfg_pull_up_drv_level_1>;
<4 RK_PB6 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi3m1_cs0: spi3m1-cs0 {
rockchip,pins =
/* spi3_cs0_m1 */
<4 RK_PC0 8 &pcfg_pull_up_drv_level_1>;
<4 RK_PC0 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi3m1_cs1: spi3m1-cs1 {
rockchip,pins =
/* spi3_cs1_m1 */
<4 RK_PC1 8 &pcfg_pull_up_drv_level_1>;
<4 RK_PC1 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi3m2_pins: spi3m2-pins {
rockchip,pins =
/* spi3_clk_m2 */
<0 RK_PD3 8 &pcfg_pull_up_drv_level_1>,
<0 RK_PD3 8 &pcfg_pull_up_drv_level_6>,
/* spi3_miso_m2 */
<0 RK_PD0 8 &pcfg_pull_up_drv_level_1>,
<0 RK_PD0 8 &pcfg_pull_up_drv_level_6>,
/* spi3_mosi_m2 */
<0 RK_PD2 8 &pcfg_pull_up_drv_level_1>;
<0 RK_PD2 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi3m2_cs0: spi3m2-cs0 {
rockchip,pins =
/* spi3_cs0_m2 */
<0 RK_PD4 8 &pcfg_pull_up_drv_level_1>;
<0 RK_PD4 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi3m2_cs1: spi3m2-cs1 {
rockchip,pins =
/* spi3_cs1_m2 */
<0 RK_PD5 8 &pcfg_pull_up_drv_level_1>;
<0 RK_PD5 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi3m3_pins: spi3m3-pins {
rockchip,pins =
/* spi3_clk_m3 */
<3 RK_PD0 8 &pcfg_pull_up_drv_level_1>,
<3 RK_PD0 8 &pcfg_pull_up_drv_level_6>,
/* spi3_miso_m3 */
<3 RK_PC6 8 &pcfg_pull_up_drv_level_1>,
<3 RK_PC6 8 &pcfg_pull_up_drv_level_6>,
/* spi3_mosi_m3 */
<3 RK_PC7 8 &pcfg_pull_up_drv_level_1>;
<3 RK_PC7 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi3m3_cs0: spi3m3-cs0 {
rockchip,pins =
/* spi3_cs0_m3 */
<3 RK_PC4 8 &pcfg_pull_up_drv_level_1>;
<3 RK_PC4 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi3m3_cs1: spi3m3-cs1 {
rockchip,pins =
/* spi3_cs1_m3 */
<3 RK_PC5 8 &pcfg_pull_up_drv_level_1>;
<3 RK_PC5 8 &pcfg_pull_up_drv_level_6>;
};
};
@@ -2832,68 +2832,68 @@
spi4m0_pins: spi4m0-pins {
rockchip,pins =
/* spi4_clk_m0 */
<1 RK_PC2 8 &pcfg_pull_up_drv_level_1>,
<1 RK_PC2 8 &pcfg_pull_up_drv_level_6>,
/* spi4_miso_m0 */
<1 RK_PC0 8 &pcfg_pull_up_drv_level_1>,
<1 RK_PC0 8 &pcfg_pull_up_drv_level_6>,
/* spi4_mosi_m0 */
<1 RK_PC1 8 &pcfg_pull_up_drv_level_1>;
<1 RK_PC1 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi4m0_cs0: spi4m0-cs0 {
rockchip,pins =
/* spi4_cs0_m0 */
<1 RK_PC3 8 &pcfg_pull_up_drv_level_1>;
<1 RK_PC3 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi4m0_cs1: spi4m0-cs1 {
rockchip,pins =
/* spi4_cs1_m0 */
<1 RK_PC4 8 &pcfg_pull_up_drv_level_1>;
<1 RK_PC4 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi4m1_pins: spi4m1-pins {
rockchip,pins =
/* spi4_clk_m1 */
<3 RK_PA2 8 &pcfg_pull_up_drv_level_1>,
<3 RK_PA2 8 &pcfg_pull_up_drv_level_6>,
/* spi4_miso_m1 */
<3 RK_PA0 8 &pcfg_pull_up_drv_level_1>,
<3 RK_PA0 8 &pcfg_pull_up_drv_level_6>,
/* spi4_mosi_m1 */
<3 RK_PA1 8 &pcfg_pull_up_drv_level_1>;
<3 RK_PA1 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi4m1_cs0: spi4m1-cs0 {
rockchip,pins =
/* spi4_cs0_m1 */
<3 RK_PA3 8 &pcfg_pull_up_drv_level_1>;
<3 RK_PA3 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi4m1_cs1: spi4m1-cs1 {
rockchip,pins =
/* spi4_cs1_m1 */
<3 RK_PA4 8 &pcfg_pull_up_drv_level_1>;
<3 RK_PA4 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi4m2_pins: spi4m2-pins {
rockchip,pins =
/* spi4_clk_m2 */
<1 RK_PA2 8 &pcfg_pull_up_drv_level_1>,
<1 RK_PA2 8 &pcfg_pull_up_drv_level_6>,
/* spi4_miso_m2 */
<1 RK_PA0 8 &pcfg_pull_up_drv_level_1>,
<1 RK_PA0 8 &pcfg_pull_up_drv_level_6>,
/* spi4_mosi_m2 */
<1 RK_PA1 8 &pcfg_pull_up_drv_level_1>;
<1 RK_PA1 8 &pcfg_pull_up_drv_level_6>;
};
/omit-if-no-ref/
spi4m2_cs0: spi4m2-cs0 {
rockchip,pins =
/* spi4_cs0_m2 */
<1 RK_PA3 8 &pcfg_pull_up_drv_level_1>;
<1 RK_PA3 8 &pcfg_pull_up_drv_level_6>;
};
};

2
arch/arm64/boot/dts/rockchip/rk3588s-tablet-rk806-single.dtsi
View File

@@ -1457,7 +1457,7 @@
touch_gpio: touch-gpio {
rockchip,pins =
<1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};

2
arch/arm64/boot/dts/rockchip/rk3588s-tablet.dtsi
View File

@@ -920,7 +920,7 @@
touch_gpio: touch-gpio {
rockchip,pins =
<1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};

6
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
View File

@@ -1909,11 +1909,12 @@
};
usb_host0_ehci: usb@fc800000 {
compatible = "generic-ehci";
compatible = "rockchip,rk3588-ehci", "generic-ehci";
reg = <0x0 0xfc800000 0x0 0x40000>;
interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&u2phy2>;
clock-names = "usbhost", "arbiter", "utmi";
companion = <&usb_host0_ohci>;
phys = <&u2phy2_host>;
phy-names = "usb2-phy";
power-domains = <&power RK3588_PD_USB>;
@@ -1933,11 +1934,12 @@
};
usb_host1_ehci: usb@fc880000 {
compatible = "generic-ehci";
compatible = "rockchip,rk3588-ehci", "generic-ehci";
reg = <0x0 0xfc880000 0x0 0x40000>;
interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&u2phy3>;
clock-names = "usbhost", "arbiter", "utmi";
companion = <&usb_host1_ohci>;
phys = <&u2phy3_host>;
phy-names = "usb2-phy";
power-domains = <&power RK3588_PD_USB>;

5
arch/arm64/configs/px30_linux_defconfig
View File

@@ -38,6 +38,7 @@ CONFIG_PREEMPT_VOLUNTARY=y
CONFIG_HZ_1000=y
# CONFIG_COMPACTION is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
CONFIG_CMA=y
CONFIG_ZSMALLOC=y
CONFIG_SECCOMP=y
CONFIG_ARMV8_DEPRECATED=y
@@ -279,7 +280,6 @@ CONFIG_USB_VIDEO_CLASS=y
# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set
# CONFIG_USB_GSPCA is not set
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_VIDEO_ROCKCHIP_CIF=y
CONFIG_VIDEO_ROCKCHIP_RKISP1=y
CONFIG_V4L_MEM2MEM_DRIVERS=y
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
@@ -326,6 +326,8 @@ CONFIG_SND_DYNAMIC_MINORS=y
CONFIG_SND_USB_AUDIO=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_ROCKCHIP=y
CONFIG_SND_SOC_ROCKCHIP_MULTICODECS=y
CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS=y
CONFIG_SND_SOC_ROCKCHIP_I2S=y
CONFIG_SND_SOC_RK817=y
CONFIG_SND_SIMPLE_CARD=y
@@ -456,6 +458,7 @@ CONFIG_NLS_CODEPAGE_936=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=y
CONFIG_DMA_CMA=y
CONFIG_PRINTK_TIME=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_INFO=y

8
arch/arm64/configs/rk3326_linux.config Normal file
View File

@@ -0,0 +1,8 @@
# CONFIG_ETHERNET is not set
CONFIG_MD=y
CONFIG_PSTORE=y
CONFIG_PSTORE_CONSOLE=y
CONFIG_PSTORE_RAM=y
CONFIG_SND_SOC_ROCKCHIP_PDM=y
CONFIG_VIDEO_ROCKCHIP_CIF=y
CONFIG_VIDEO_GC2155=y

480
arch/arm64/configs/rk3326_linux_defconfig
View File

@@ -1,480 +0,0 @@
CONFIG_DEFAULT_HOSTNAME="localhost"
CONFIG_SYSVIPC=y
CONFIG_FHANDLE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_CGROUPS=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_SCHED=y
CONFIG_CFS_BANDWIDTH=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_DEFAULT_USE_ENERGY_AWARE=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_PROFILING=y
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_PCI=y
CONFIG_PCI_MSI=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCIEASPM_POWERSAVE=y
# CONFIG_ARM64_ERRATUM_826319 is not set
# CONFIG_ARM64_ERRATUM_827319 is not set
# CONFIG_ARM64_ERRATUM_824069 is not set
# CONFIG_ARM64_ERRATUM_819472 is not set
# CONFIG_ARM64_ERRATUM_832075 is not set
# CONFIG_CAVIUM_ERRATUM_22375 is not set
# CONFIG_CAVIUM_ERRATUM_23154 is not set
CONFIG_SCHED_MC=y
CONFIG_NR_CPUS=8
CONFIG_PREEMPT_VOLUNTARY=y
CONFIG_HZ_1000=y
# CONFIG_COMPACTION is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
CONFIG_ZSMALLOC=y
CONFIG_SECCOMP=y
CONFIG_ARMV8_DEPRECATED=y
CONFIG_SWP_EMULATION=y
CONFIG_CP15_BARRIER_EMULATION=y
CONFIG_SETEND_EMULATION=y
# CONFIG_EFI is not set
CONFIG_COMPAT=y
CONFIG_PM_DEBUG=y
CONFIG_PM_ADVANCED_DEBUG=y
CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
CONFIG_CPU_IDLE=y
CONFIG_ARM_CPUIDLE=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPUFREQ_DT=y
CONFIG_ARM_ROCKCHIP_CPUFREQ=y
CONFIG_ARM_SCMI_PROTOCOL=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MROUTE=y
CONFIG_SYN_COOKIES=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
# CONFIG_INET6_XFRM_MODE_BEET is not set
# CONFIG_IPV6_SIT is not set
# CONFIG_ANDROID_PARANOID_NETWORK is not set
CONFIG_BT=y
CONFIG_BT_RFCOMM=y
CONFIG_BT_HIDP=y
CONFIG_BT_HCIBTUSB=y
CONFIG_BT_HCIUART=y
CONFIG_BT_HCIUART_ATH3K=y
CONFIG_BT_HCIUART_LL=y
CONFIG_BT_HCIBFUSB=y
CONFIG_BT_HCIVHCI=y
CONFIG_BT_MRVL=y
CONFIG_BT_MRVL_SDIO=y
CONFIG_NL80211_TESTMODE=y
CONFIG_CFG80211_DEBUGFS=y
CONFIG_CFG80211_WEXT=y
CONFIG_MAC80211_LEDS=y
CONFIG_MAC80211_DEBUGFS=y
CONFIG_MAC80211_DEBUG_MENU=y
CONFIG_MAC80211_VERBOSE_DEBUG=y
CONFIG_RFKILL=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_DTC_SYMBOLS=y
CONFIG_DEBUG_DEVRES=y
CONFIG_CONNECTOR=y
CONFIG_ZRAM=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=1
CONFIG_BLK_DEV_NVME=y
CONFIG_ROCKCHIP_SCR=y
CONFIG_SRAM=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_SCSI_SPI_ATTRS=y
CONFIG_MD=y
CONFIG_NETDEVICES=y
# CONFIG_ETHERNET is not set
CONFIG_ROCKCHIP_PHY=y
CONFIG_USB_RTL8150=y
CONFIG_USB_RTL8152=y
CONFIG_USB_NET_CDC_MBIM=y
# CONFIG_USB_NET_NET1080 is not set
# CONFIG_USB_NET_CDC_SUBSET is not set
# CONFIG_USB_NET_ZAURUS is not set
CONFIG_LIBERTAS_THINFIRM=y
CONFIG_USB_NET_RNDIS_WLAN=y
CONFIG_WL_ROCKCHIP=y
CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP=y
CONFIG_AP6XXX=y
CONFIG_RTL8188EU=y
CONFIG_MWIFIEX=y
CONFIG_MWIFIEX_SDIO=y
CONFIG_INPUT_FF_MEMLESS=y
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_ADC=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_GPIO_POLLED=y
CONFIG_KEYBOARD_ROCKCHIP=y
CONFIG_KEYBOARD_CROS_EC=y
# CONFIG_MOUSE_PS2 is not set
CONFIG_MOUSE_CYAPA=y
CONFIG_MOUSE_ELAN_I2C=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=y
CONFIG_TOUCHSCREEN_GSLX680_VR=y
CONFIG_TOUCHSCREEN_GSL3673=y
CONFIG_TOUCHSCREEN_GT9XX=y
CONFIG_TOUCHSCREEN_ELAN=y
CONFIG_TOUCHSCREEN_USB_COMPOSITE=y
CONFIG_TOUCHSCREEN_GT1X=y
CONFIG_ROCKCHIP_REMOTECTL=y
CONFIG_ROCKCHIP_REMOTECTL_PWM=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_RK8XX_PWRKEY=y
CONFIG_INPUT_UINPUT=y
CONFIG_INPUT_GPIO=y
# CONFIG_SERIO is not set
CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVKMEM is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_PCI is not set
CONFIG_SERIAL_8250_NR_UARTS=5
CONFIG_SERIAL_8250_RUNTIME_UARTS=5
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_HW_RANDOM=y
CONFIG_TCG_TPM=y
CONFIG_TCG_TIS_I2C_INFINEON=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
CONFIG_I2C_RK3X=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_ROCKCHIP=y
CONFIG_SPI_SPIDEV=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GPIO_RK8XX=y
CONFIG_BATTERY_SBS=y
CONFIG_CHARGER_GPIO=y
CONFIG_CHARGER_BQ24735=y
CONFIG_BATTERY_RK817=y
CONFIG_CHARGER_RK817=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_POWER_RESET_GPIO_RESTART=y
CONFIG_SYSCON_REBOOT_MODE=y
CONFIG_POWER_AVS=y
CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_THERMAL=y
CONFIG_THERMAL_WRITABLE_TRIPS=y
CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR=y
CONFIG_THERMAL_GOV_FAIR_SHARE=y
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_CPU_THERMAL=y
CONFIG_DEVFREQ_THERMAL=y
CONFIG_ROCKCHIP_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_DW_WATCHDOG=y
CONFIG_MFD_CROS_EC=y
CONFIG_MFD_CROS_EC_SPI=y
CONFIG_MFD_RK808=y
CONFIG_MFD_TPS6586X=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_DEBUG=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_ACT8865=y
CONFIG_REGULATOR_FAN53555=y
CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_LP8752=y
CONFIG_REGULATOR_MP8865=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK808=y
CONFIG_REGULATOR_RK818=y
CONFIG_REGULATOR_TPS6586X=y
CONFIG_REGULATOR_XZ3216=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_RC_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
# CONFIG_IR_RC5_DECODER is not set
# CONFIG_IR_RC6_DECODER is not set
# CONFIG_IR_JVC_DECODER is not set
# CONFIG_IR_SONY_DECODER is not set
# CONFIG_IR_SANYO_DECODER is not set
# CONFIG_IR_SHARP_DECODER is not set
# CONFIG_IR_MCE_KBD_DECODER is not set
# CONFIG_IR_XMP_DECODER is not set
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=y
# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set
# CONFIG_USB_GSPCA is not set
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_SOC_CAMERA=y
CONFIG_VIDEO_ROCKCHIP_CIF=y
CONFIG_VIDEO_ROCKCHIP_ISP1=y
CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_VIDEO_ROCKCHIP_RGA=y
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
# CONFIG_VIDEO_IR_I2C is not set
CONFIG_VIDEO_OV5695=y
CONFIG_VIDEO_GC2155=y
# CONFIG_DVB_AU8522_V4L is not set
# CONFIG_DVB_TUNER_DIB0070 is not set
# CONFIG_DVB_TUNER_DIB0090 is not set
# CONFIG_VGA_ARB is not set
CONFIG_DRM=y
CONFIG_DRM_LOAD_EDID_FIRMWARE=y
CONFIG_DRM_DMA_SYNC=y
CONFIG_DRM_ROCKCHIP=y
CONFIG_ROCKCHIP_DW_MIPI_DSI=y
CONFIG_ROCKCHIP_ANALOGIX_DP=y
CONFIG_ROCKCHIP_LVDS=y
CONFIG_ROCKCHIP_DRM_TVE=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_MALI_PWRSOFT_765=y
CONFIG_MALI_BIFROST=y
CONFIG_MALI_BIFROST_DEVFREQ=y
CONFIG_MALI_PLATFORM_NAME="rk"
CONFIG_MALI_BIFROST_EXPERT=y
CONFIG_MALI_BIFROST_DEBUG=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_PWM=y
CONFIG_RK_VCODEC=y
CONFIG_ROCKCHIP_MPP_SERVICE=y
CONFIG_ROCKCHIP_MPP_DEVICE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SEQUENCER=y
CONFIG_SND_SEQ_DUMMY=y
CONFIG_SND_HRTIMER=y
CONFIG_SND_DYNAMIC_MINORS=y
# CONFIG_SND_SUPPORT_OLD_API is not set
# CONFIG_SND_PROC_FS is not set
# CONFIG_SND_PCI is not set
# CONFIG_SND_SPI is not set
CONFIG_SND_USB_AUDIO=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_ROCKCHIP=y
CONFIG_SND_SOC_ROCKCHIP_SPDIF=y
CONFIG_SND_SOC_ROCKCHIP_MAX98090=y
CONFIG_SND_SOC_ROCKCHIP_RT5645=y
CONFIG_SND_SOC_ES8316=y
CONFIG_SND_SOC_RK817=y
CONFIG_SND_SOC_RT5616=y
CONFIG_SND_SOC_RT5640=y
CONFIG_SND_SOC_RT5651=y
CONFIG_SND_SOC_SPDIF=y
CONFIG_SND_SIMPLE_CARD=y
CONFIG_HID_BATTERY_STRENGTH=y
CONFIG_HIDRAW=y
CONFIG_UHID=y
CONFIG_HID_KENSINGTON=y
CONFIG_HID_MULTITOUCH=y
CONFIG_USB_HIDDEV=y
CONFIG_I2C_HID=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
# CONFIG_USB_DEFAULT_PERSIST is not set
CONFIG_USB_OTG=y
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OHCI_HCD=y
# CONFIG_USB_OHCI_HCD_PCI is not set
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_ACM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_UAS=y
CONFIG_USB_DWC2=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_CP210X=y
CONFIG_USB_SERIAL_FTDI_SIO=y
CONFIG_USB_SERIAL_KEYSPAN=y
CONFIG_USB_SERIAL_PL2303=y
CONFIG_USB_SERIAL_OTI6858=y
CONFIG_USB_SERIAL_QUALCOMM=y
CONFIG_USB_SERIAL_SIERRAWIRELESS=y
CONFIG_USB_SERIAL_OPTION=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_GADGET_VBUS_DRAW=500
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_ACM=y
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_UEVENT=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_TEST=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_OF_ARASAN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_IS31FL32XX=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_HYM8563=y
CONFIG_RTC_DRV_RK808=y
CONFIG_DMADEVICES=y
CONFIG_PL330_DMA=y
CONFIG_STAGING=y
CONFIG_SENSORS_ISL29018=y
CONFIG_TSL2583=y
# CONFIG_ANDROID_TIMED_OUTPUT is not set
CONFIG_FIQ_DEBUGGER=y
CONFIG_FIQ_DEBUGGER_NO_SLEEP=y
CONFIG_FIQ_DEBUGGER_CONSOLE=y
CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y
CONFIG_COMMON_CLK_RK808=y
CONFIG_COMMON_CLK_SCMI=y
CONFIG_MAILBOX=y
CONFIG_ROCKCHIP_IOMMU=y
CONFIG_CPU_PX30=y
CONFIG_ROCKCHIP_CPUINFO=y
CONFIG_ROCKCHIP_GRF=y
CONFIG_ROCKCHIP_IPA=y
CONFIG_ROCKCHIP_OPP=y
CONFIG_ROCKCHIP_PM_DOMAINS=y
CONFIG_ROCKCHIP_PVTM=y
CONFIG_ROCKCHIP_SUSPEND_MODE=y
CONFIG_ROCKCHIP_SYSTEM_MONITOR=y
CONFIG_PM_DEVFREQ=y
CONFIG_DEVFREQ_GOV_PERFORMANCE=y
CONFIG_DEVFREQ_GOV_POWERSAVE=y
CONFIG_DEVFREQ_GOV_USERSPACE=y
CONFIG_ARM_ROCKCHIP_BUS_DEVFREQ=y
CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y
CONFIG_PM_DEVFREQ_EVENT=y
CONFIG_MEMORY=y
CONFIG_IIO=y
CONFIG_IIO_BUFFER=y
CONFIG_IIO_KFIFO_BUF=y
CONFIG_IIO_TRIGGER=y
CONFIG_ROCKCHIP_SARADC=y
CONFIG_SENSORS_TSL2563=y
CONFIG_IIO_SYSFS_TRIGGER=y
CONFIG_PWM=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_USB=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_EMMC=y
CONFIG_PHY_ROCKCHIP_DP=y
CONFIG_PHY_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
CONFIG_ANDROID=y
CONFIG_NVMEM=y
CONFIG_ROCKCHIP_OTP=y
CONFIG_ROCKCHIP_SIP=y
# CONFIG_ACPI is not set
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_XFS_FS=y
# CONFIG_DNOTIFY is not set
CONFIG_FUSE_FS=y
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=936
CONFIG_FAT_DEFAULT_IOCHARSET="utf8"
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_SQUASHFS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_NFS_SWAP=y
CONFIG_NLS_DEFAULT="utf8"
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_936=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=y
CONFIG_PRINTK_TIME=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_INFO=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0
CONFIG_LOCKUP_DETECTOR=y
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y
CONFIG_SCHEDSTATS=y
CONFIG_TIMER_STATS=y
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_CREDENTIALS=y
CONFIG_RCU_CPU_STALL_TIMEOUT=60
CONFIG_FUNCTION_TRACER=y
CONFIG_BLK_DEV_IO_TRACE=y
CONFIG_LKDTM=y
CONFIG_STRICT_DEVMEM=y
CONFIG_DEBUG_SET_MODULE_RONX=y
# CONFIG_CRYPTO_ECHAINIV is not set
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_USER_API_HASH=y
CONFIG_CRYPTO_USER_API_SKCIPHER=y
CONFIG_ASYMMETRIC_KEY_TYPE=y
CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
CONFIG_X509_CERTIFICATE_PARSER=y
CONFIG_PKCS7_MESSAGE_PARSER=y
CONFIG_SYSTEM_TRUSTED_KEYRING=y
CONFIG_ARM64_CRYPTO=y
CONFIG_CRYPTO_SHA1_ARM64_CE=y
CONFIG_CRYPTO_SHA2_ARM64_CE=y
CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
CONFIG_CRC_CCITT=y
CONFIG_CRC_T10DIF=y
CONFIG_CRC7=y
# CONFIG_XZ_DEC_X86 is not set
# CONFIG_XZ_DEC_POWERPC is not set
# CONFIG_XZ_DEC_IA64 is not set
# CONFIG_XZ_DEC_SPARC is not set

2
arch/arm64/configs/rk3358_linux.config Normal file
View File

@@ -0,0 +1,2 @@
CONFIG_LTE=y
CONFIG_LTE_RM310=y

3
arch/arm64/configs/rk3588_edge.config
View File

@@ -3,6 +3,9 @@ CONFIG_R8169=y
CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP=y
CONFIG_AP6XXX=y
# CONFIG_WIFI_BUILD_MODULE is not set
# CONFIG_BCMDHD_SDIO is not set
CONFIG_BCMDHD_PCIE=y
CONFIG_MALI_CSF_SUPPORT=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_USB_CONFIGFS_RNDIS=y
CONFIG_USB_CONFIGFS_F_UAC1=y

3
arch/arm64/configs/rk3588_linux.config Normal file
View File

@@ -0,0 +1,3 @@
# CONFIG_BCMDHD_SDIO=y is not set
CONFIG_BCMDHD_PCIE=y
CONFIG_MALI_CSF_SUPPORT=y

1
arch/arm64/configs/rk3588_nvr.config
View File

@@ -11,6 +11,7 @@ CONFIG_DRM_ITE_IT6161=y
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_MALI400 is not set
CONFIG_MALI_CSF_SUPPORT=y
# CONFIG_MALI_MIDGARD is not set
# CONFIG_MEDIA_CEC_SUPPORT is not set
# CONFIG_MEDIA_USB_SUPPORT is not set

1
arch/arm64/configs/rockchip_defconfig
View File

@@ -960,6 +960,7 @@ CONFIG_PSTORE=y
CONFIG_PSTORE_CONSOLE=y
CONFIG_PSTORE_PMSG=y
CONFIG_PSTORE_RAM=y
CONFIG_PSTORE_BOOT_LOG=y
CONFIG_CIFS=y
CONFIG_CIFS_XATTR=y
CONFIG_CIFS_POSIX=y

3
arch/arm64/configs/rockchip_linux_defconfig
View File

@@ -183,7 +183,6 @@ CONFIG_USB_RTL8152=y
CONFIG_WL_ROCKCHIP=y
CONFIG_WIFI_BUILD_MODULE=y
CONFIG_AP6XXX=m
CONFIG_BCMDHD_PCIE=y
CONFIG_INPUT_FF_MEMLESS=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_ADC=y
@@ -309,6 +308,7 @@ CONFIG_ROCKCHIP_DW_DP=y
CONFIG_ROCKCHIP_INNO_HDMI=y
CONFIG_ROCKCHIP_LVDS=y
CONFIG_ROCKCHIP_RGB=y
CONFIG_ROCKCHIP_DW_HDCP2=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_DISPLAY_CONNECTOR=y
CONFIG_DRM_SII902X=y
@@ -328,7 +328,6 @@ CONFIG_MALI_DEBUG=y
CONFIG_MALI_PWRSOFT_765=y
CONFIG_MALI_BIFROST=y
CONFIG_MALI_PLATFORM_NAME="rk"
CONFIG_MALI_CSF_SUPPORT=y
CONFIG_MALI_BIFROST_EXPERT=y
CONFIG_MALI_BIFROST_DEBUG=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y

51
drivers/base/arm/dma_buf_lock/src/dma_buf_lock.c
View File

@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
/*
*
* (C) COPYRIGHT 2012-2014, 2017-2018, 2020-2021 ARM Limited. All rights reserved.
* (C) COPYRIGHT 2012-2014, 2017-2018, 2020-2022 ARM Limited. All rights reserved.
*
* This program is free software and is provided to you under the terms of the
* GNU General Public License version 2 as published by the Free Software
@@ -20,6 +20,7 @@
*/
#include <linux/version.h>
#include <linux/version_compat_defs.h>
#include <linux/uaccess.h>
#include <linux/init.h>
#include <linux/module.h>
@@ -99,9 +100,6 @@ static const struct file_operations dma_buf_lock_fops = {
#if defined(HAVE_COMPAT_IOCTL) || ((KERNEL_VERSION(5, 9, 0) <= LINUX_VERSION_CODE))
.compat_ioctl = dma_buf_lock_ioctl,
#endif
#if !defined(HAVE_UNLOCKED_IOCTL) && !defined(HAVE_COMPAT_IOCTL) && ((KERNEL_VERSION(2, 6, 36) > LINUX_VERSION_CODE))
.ioctl = dma_buf_lock_ioctl,
#endif
};
struct dma_buf_lock_resource {
@@ -480,15 +478,18 @@ static int dma_buf_lock_handle_release(struct inode *inode, struct file *file)
return 0;
}
static unsigned int dma_buf_lock_handle_poll(
struct file *file,
struct poll_table_struct *wait)
static __poll_t dma_buf_lock_handle_poll(struct file *file, poll_table *wait)
{
struct dma_buf_lock_resource *resource;
unsigned int ret = 0;
if (!is_dma_buf_lock_file(file))
if (!is_dma_buf_lock_file(file)) {
#if (KERNEL_VERSION(4, 19, 0) > LINUX_VERSION_CODE)
return POLLERR;
#else
return EPOLLERR;
#endif
}
resource = file->private_data;
#if DMA_BUF_LOCK_DEBUG
@@ -496,9 +497,15 @@ static unsigned int dma_buf_lock_handle_poll(
#endif
if (atomic_read(&resource->locked) == 1) {
/* Resources have been locked */
#if (KERNEL_VERSION(4, 19, 0) > LINUX_VERSION_CODE)
ret = POLLIN | POLLRDNORM;
if (resource->exclusive)
ret |= POLLOUT | POLLWRNORM;
ret |= POLLOUT | POLLWRNORM;
#else
ret = EPOLLIN | EPOLLRDNORM;
if (resource->exclusive)
ret |= EPOLLOUT | EPOLLWRNORM;
#endif
} else {
if (!poll_does_not_wait(wait))
poll_wait(file, &resource->wait, wait);
@@ -533,10 +540,12 @@ static int dma_buf_lock_dolock(struct dma_buf_lock_k_request *request)
{
struct dma_buf_lock_resource *resource;
struct ww_acquire_ctx ww_ctx;
struct file *file;
int size;
int fd;
int i;
int ret;
int error;
if (request->list_of_dma_buf_fds == NULL)
return -EINVAL;
@@ -634,15 +643,21 @@ static int dma_buf_lock_dolock(struct dma_buf_lock_k_request *request)
kref_get(&resource->refcount);
/* Create file descriptor associated with lock request */
fd = anon_inode_getfd("dma_buf_lock", &dma_buf_lock_handle_fops,
(void *)resource, 0);
if (fd < 0) {
error = get_unused_fd_flags(0);
if (error < 0)
return error;
fd = error;
file = anon_inode_getfile("dma_buf_lock", &dma_buf_lock_handle_fops, (void *)resource, 0);
if (IS_ERR(file)) {
put_unused_fd(fd);
mutex_lock(&dma_buf_lock_mutex);
kref_put(&resource->refcount, dma_buf_lock_dounlock);
kref_put(&resource->refcount, dma_buf_lock_dounlock);
mutex_unlock(&dma_buf_lock_mutex);
return fd;
return PTR_ERR(file);
}
resource->exclusive = request->exclusive;
@@ -711,9 +726,7 @@ static int dma_buf_lock_dolock(struct dma_buf_lock_k_request *request)
dma_resv_add_shared_fence(resv, &resource->fence);
#endif
} else {
ret = dma_buf_lock_add_fence_reservation_callback(resource,
resv,
true);
ret = dma_buf_lock_add_fence_reservation_callback(resource, resv, true);
if (ret) {
#if DMA_BUF_LOCK_DEBUG
pr_debug("%s : Error %d adding reservation to callback.\n", __func__, ret);
@@ -758,6 +771,10 @@ static int dma_buf_lock_dolock(struct dma_buf_lock_k_request *request)
kref_put(&resource->refcount, dma_buf_lock_dounlock);
mutex_unlock(&dma_buf_lock_mutex);
/* Installing the fd is deferred to the very last operation before return
* to avoid allowing userspace to close it during the setup.
*/
fd_install(fd, file);
return fd;
}

60
drivers/base/arm/dma_buf_test_exporter/dma-buf-test-exporter.c
View File

@@ -30,9 +30,6 @@
#include <linux/atomic.h>
#include <linux/mm.h>
#include <linux/highmem.h>
#if (KERNEL_VERSION(4, 8, 0) > LINUX_VERSION_CODE)
#include <linux/dma-attrs.h>
#endif
#include <linux/dma-mapping.h>
/* Maximum size allowed in a single DMA_BUF_TE_ALLOC call */
@@ -211,20 +208,11 @@ static void dma_buf_te_release(struct dma_buf *buf)
/* no need for locking */
if (alloc->contiguous) {
#if (KERNEL_VERSION(4, 8, 0) <= LINUX_VERSION_CODE)
dma_free_attrs(te_device.this_device,
alloc->nr_pages * PAGE_SIZE,
alloc->contig_cpu_addr,
alloc->contig_dma_addr,
DMA_ATTR_WRITE_COMBINE);
#else
DEFINE_DMA_ATTRS(attrs);
dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
dma_free_attrs(te_device.this_device,
alloc->nr_pages * PAGE_SIZE,
alloc->contig_cpu_addr, alloc->contig_dma_addr, &attrs);
#endif
} else {
for (i = 0; i < alloc->nr_pages; i++)
__free_page(alloc->pages[i]);
@@ -269,32 +257,17 @@ static int dma_buf_te_sync(struct dma_buf *dmabuf,
return 0;
}
#if (KERNEL_VERSION(4, 6, 0) <= LINUX_VERSION_CODE)
static int dma_buf_te_begin_cpu_access(struct dma_buf *dmabuf,
enum dma_data_direction direction)
#else
static int dma_buf_te_begin_cpu_access(struct dma_buf *dmabuf, size_t start,
size_t len,
enum dma_data_direction direction)
#endif
{
return dma_buf_te_sync(dmabuf, direction, true);
}
#if (KERNEL_VERSION(4, 6, 0) <= LINUX_VERSION_CODE)
static int dma_buf_te_end_cpu_access(struct dma_buf *dmabuf,
enum dma_data_direction direction)
{
return dma_buf_te_sync(dmabuf, direction, false);
}
#else
static void dma_buf_te_end_cpu_access(struct dma_buf *dmabuf, size_t start,
size_t len,
enum dma_data_direction direction)
{
dma_buf_te_sync(dmabuf, direction, false);
}
#endif
static void dma_buf_te_mmap_open(struct vm_area_struct *vma)
{
@@ -521,21 +494,11 @@ static int do_dma_buf_te_ioctl_alloc(struct dma_buf_te_ioctl_alloc __user *buf,
if (contiguous) {
dma_addr_t dma_aux;
#if (KERNEL_VERSION(4, 8, 0) <= LINUX_VERSION_CODE)
alloc->contig_cpu_addr = dma_alloc_attrs(te_device.this_device,
alloc->nr_pages * PAGE_SIZE,
&alloc->contig_dma_addr,
GFP_KERNEL | __GFP_ZERO,
DMA_ATTR_WRITE_COMBINE);
#else
DEFINE_DMA_ATTRS(attrs);
dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
alloc->contig_cpu_addr = dma_alloc_attrs(te_device.this_device,
alloc->nr_pages * PAGE_SIZE,
&alloc->contig_dma_addr,
GFP_KERNEL | __GFP_ZERO, &attrs);
#endif
if (!alloc->contig_cpu_addr) {
dev_err(te_device.this_device, "%s: couldn't alloc contiguous buffer %zu pages",
__func__, alloc->nr_pages);
@@ -591,20 +554,11 @@ no_export:
/* i still valid */
no_page:
if (contiguous) {
#if (KERNEL_VERSION(4, 8, 0) <= LINUX_VERSION_CODE)
dma_free_attrs(te_device.this_device,
alloc->nr_pages * PAGE_SIZE,
alloc->contig_cpu_addr,
alloc->contig_dma_addr,
DMA_ATTR_WRITE_COMBINE);
#else
DEFINE_DMA_ATTRS(attrs);
dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
dma_free_attrs(te_device.this_device,
alloc->nr_pages * PAGE_SIZE,
alloc->contig_cpu_addr, alloc->contig_dma_addr, &attrs);
#endif
} else {
while (i-- > 0)
__free_page(alloc->pages[i]);
@@ -703,7 +657,6 @@ static u32 dma_te_buf_fill(struct dma_buf *dma_buf, unsigned int value)
struct sg_table *sgt;
struct scatterlist *sg;
unsigned int count;
unsigned int offset = 0;
int ret = 0;
size_t i;
@@ -717,11 +670,7 @@ static u32 dma_te_buf_fill(struct dma_buf *dma_buf, unsigned int value)
goto no_import;
}
ret = dma_buf_begin_cpu_access(dma_buf,
#if KERNEL_VERSION(4, 6, 0) > LINUX_VERSION_CODE
0, dma_buf->size,
#endif
DMA_BIDIRECTIONAL);
ret = dma_buf_begin_cpu_access(dma_buf, DMA_BIDIRECTIONAL);
if (ret)
goto no_cpu_access;
@@ -744,15 +693,10 @@ static u32 dma_te_buf_fill(struct dma_buf *dma_buf, unsigned int value)
dma_buf_kunmap(dma_buf, i >> PAGE_SHIFT, addr);
#endif
}
offset += sg_dma_len(sg);
}
no_kmap:
dma_buf_end_cpu_access(dma_buf,
#if KERNEL_VERSION(4, 6, 0) > LINUX_VERSION_CODE
0, dma_buf->size,
#endif
DMA_BIDIRECTIONAL);
dma_buf_end_cpu_access(dma_buf, DMA_BIDIRECTIONAL);
no_cpu_access:
dma_buf_unmap_attachment(attachment, sgt, DMA_BIDIRECTIONAL);
no_import:

36
drivers/base/arm/memory_group_manager/memory_group_manager.c
View File

@@ -42,18 +42,7 @@
static inline vm_fault_t vmf_insert_pfn_prot(struct vm_area_struct *vma,
unsigned long addr, unsigned long pfn, pgprot_t pgprot)
{
int err;
#if ((KERNEL_VERSION(4, 4, 147) >= LINUX_VERSION_CODE) || \
((KERNEL_VERSION(4, 6, 0) > LINUX_VERSION_CODE) && \
(KERNEL_VERSION(4, 5, 0) <= LINUX_VERSION_CODE)))
if (pgprot_val(pgprot) != pgprot_val(vma->vm_page_prot))
return VM_FAULT_SIGBUS;
err = vm_insert_pfn(vma, addr, pfn);
#else
err = vm_insert_pfn_prot(vma, addr, pfn, pgprot);
#endif
int err = vm_insert_pfn_prot(vma, addr, pfn, pgprot);
if (unlikely(err == -ENOMEM))
return VM_FAULT_OOM;
@@ -64,6 +53,10 @@ static inline vm_fault_t vmf_insert_pfn_prot(struct vm_area_struct *vma,
}
#endif
#define PTE_PBHA_SHIFT (59)
#define PTE_PBHA_MASK ((uint64_t)0xf << PTE_PBHA_SHIFT)
#define PTE_RES_BIT_MULTI_AS_SHIFT (63)
#define IMPORTED_MEMORY_ID (MEMORY_GROUP_MANAGER_NR_GROUPS - 1)
/**
@@ -335,8 +328,6 @@ static u64 example_mgm_update_gpu_pte(
int const mmu_level, u64 pte)
{
struct mgm_groups *const data = mgm_dev->data;
const u32 pbha_bit_pos = 59; /* bits 62:59 */
const u32 pbha_bit_mask = 0xf; /* 4-bit */
dev_dbg(data->dev,
"%s(mgm_dev=%p, group_id=%d, mmu_level=%d, pte=0x%llx)\n",
@@ -346,13 +337,27 @@ static u64 example_mgm_update_gpu_pte(
WARN_ON(group_id >= MEMORY_GROUP_MANAGER_NR_GROUPS))
return pte;
pte |= ((u64)group_id & pbha_bit_mask) << pbha_bit_pos;
pte |= ((u64)group_id << PTE_PBHA_SHIFT) & PTE_PBHA_MASK;
/* Address could be translated into a different bus address here */
pte |= ((u64)1 << PTE_RES_BIT_MULTI_AS_SHIFT);
data->groups[group_id].update_gpu_pte++;
return pte;
}
static u64 example_mgm_pte_to_original_pte(struct memory_group_manager_device *const mgm_dev,
int const group_id, int const mmu_level, u64 pte)
{
/* Undo the group ID modification */
pte &= ~PTE_PBHA_MASK;
/* Undo the bit set */
pte &= ~((u64)1 << PTE_RES_BIT_MULTI_AS_SHIFT);
return pte;
}
static vm_fault_t example_mgm_vmf_insert_pfn_prot(
struct memory_group_manager_device *const mgm_dev, int const group_id,
struct vm_area_struct *const vma, unsigned long const addr,
@@ -428,6 +433,7 @@ static int memory_group_manager_probe(struct platform_device *pdev)
example_mgm_get_import_memory_id;
mgm_dev->ops.mgm_vmf_insert_pfn_prot = example_mgm_vmf_insert_pfn_prot;
mgm_dev->ops.mgm_update_gpu_pte = example_mgm_update_gpu_pte;
mgm_dev->ops.mgm_pte_to_original_pte = example_mgm_pte_to_original_pte;
mgm_data = kzalloc(sizeof(*mgm_data), GFP_KERNEL);
if (!mgm_data) {

37
drivers/char/hw_random/rockchip-rng.c
View File

@@ -192,10 +192,12 @@ static int rk_crypto_v1_read(struct hwrng *rng, void *buf, size_t max, bool wait
rk_rng_writel(rk_rng, reg_ctrl, CRYPTO_V1_CTRL);
ret = readl_poll_timeout(rk_rng->mem + CRYPTO_V1_CTRL, reg_ctrl,
!(reg_ctrl & CRYPTO_V1_RNG_START),
ROCKCHIP_POLL_PERIOD_US,
ROCKCHIP_POLL_TIMEOUT_US);
ret = read_poll_timeout(rk_rng_readl, reg_ctrl,
!(reg_ctrl & CRYPTO_V1_RNG_START),
ROCKCHIP_POLL_PERIOD_US,
ROCKCHIP_POLL_TIMEOUT_US, false,
rk_rng, CRYPTO_V1_CTRL);
if (ret < 0)
goto out;
@@ -228,10 +230,11 @@ static int rk_crypto_v2_read(struct hwrng *rng, void *buf, size_t max, bool wait
rk_rng_writel(rk_rng, HIWORD_UPDATE(reg_ctrl, 0xffff, 0),
CRYPTO_V2_RNG_CTL);
ret = readl_poll_timeout(rk_rng->mem + CRYPTO_V2_RNG_CTL, reg_ctrl,
!(reg_ctrl & CRYPTO_V2_RNG_START),
ROCKCHIP_POLL_PERIOD_US,
ROCKCHIP_POLL_TIMEOUT_US);
ret = read_poll_timeout(rk_rng_readl, reg_ctrl,
!(reg_ctrl & CRYPTO_V2_RNG_START),
ROCKCHIP_POLL_PERIOD_US,
ROCKCHIP_POLL_TIMEOUT_US, false,
rk_rng, CRYPTO_V2_RNG_CTL);
if (ret < 0)
goto out;
@@ -281,10 +284,11 @@ static int rk_trng_v1_init(struct hwrng *rng)
udelay(10);
/* wait for GENERATING and RESEEDING flag to clear */
readl_poll_timeout(rk_rng->mem + TRNG_V1_STAT, reg_ctrl,
(reg_ctrl & mask) == TRNG_V1_STAT_SEEDED,
ROCKCHIP_POLL_PERIOD_US,
ROCKCHIP_POLL_TIMEOUT_US);
read_poll_timeout(rk_rng_readl, reg_ctrl,
(reg_ctrl & mask) == TRNG_V1_STAT_SEEDED,
ROCKCHIP_POLL_PERIOD_US,
ROCKCHIP_POLL_TIMEOUT_US, false,
rk_rng, TRNG_V1_STAT);
}
/* clear ISTAT flag because trng may auto reseeding when power on */
@@ -324,10 +328,11 @@ static int rk_trng_v1_read(struct hwrng *rng, void *buf, size_t max, bool wait)
reg_ctrl = rk_rng_readl(rk_rng, TRNG_V1_ISTAT);
if (!(reg_ctrl & TRNG_V1_ISTAT_RAND_RDY)) {
/* wait RAND_RDY triggered */
ret = readl_poll_timeout(rk_rng->mem + TRNG_V1_ISTAT, reg_ctrl,
(reg_ctrl & TRNG_V1_ISTAT_RAND_RDY),
ROCKCHIP_POLL_PERIOD_US,
ROCKCHIP_POLL_TIMEOUT_US);
ret = read_poll_timeout(rk_rng_readl, reg_ctrl,
(reg_ctrl & TRNG_V1_ISTAT_RAND_RDY),
ROCKCHIP_POLL_PERIOD_US,
ROCKCHIP_POLL_TIMEOUT_US, false,
rk_rng, TRNG_V1_ISTAT);
if (ret < 0)
goto out;
}

3
drivers/clk/rockchip/clk-rk3588.c
View File

@@ -1890,6 +1890,7 @@ static struct rockchip_clk_branch rk3588_clk_branches[] __initdata = {
COMPOSITE(ACLK_VOP_ROOT, "aclk_vop_root", gpll_cpll_dmyaupll_npll_spll_p, 0,
RK3588_CLKSEL_CON(110), 5, 3, MFLAGS, 0, 5, DFLAGS,
RK3588_CLKGATE_CON(52), 0, GFLAGS),
FACTOR(0, "aclk_vop_div2_src", "aclk_vop_root", 0, 1, 2),
COMPOSITE_NODIV(ACLK_VOP_LOW_ROOT, "aclk_vop_low_root", mux_400m_200m_100m_24m_p, 0,
RK3588_CLKSEL_CON(110), 8, 2, MFLAGS,
RK3588_CLKGATE_CON(52), 1, GFLAGS),
@@ -1905,7 +1906,7 @@ static struct rockchip_clk_branch rk3588_clk_branches[] __initdata = {
COMPOSITE_NODIV(HCLK_VO1USB_TOP_ROOT, "hclk_vo1usb_top_root", mux_200m_100m_50m_24m_p, CLK_IS_CRITICAL,
RK3588_CLKSEL_CON(170), 6, 2, MFLAGS,
RK3588_CLKGATE_CON(74), 2, GFLAGS),
MUX(ACLK_VOP_SUB_SRC, "aclk_vop_sub_src", aclk_vop_sub_src_p, CLK_SET_RATE_PARENT,
MUX(ACLK_VOP_SUB_SRC, "aclk_vop_sub_src", aclk_vop_sub_src_p, 0,
RK3588_CLKSEL_CON(115), 9, 1, MFLAGS),
GATE(PCLK_EDP0, "pclk_edp0", "pclk_vo1_root", 0,
RK3588_CLKGATE_CON(62), 0, GFLAGS),

21
drivers/cpufreq/rockchip-cpufreq.c
View File

@@ -899,6 +899,22 @@ static struct notifier_block rockchip_cpufreq_transition_notifier_block = {
.notifier_call = rockchip_cpufreq_transition_notifier,
};
static int rockchip_cpufreq_panic_notifier(struct notifier_block *nb,
unsigned long v, void *p)
{
struct cluster_info *ci;
list_for_each_entry(ci, &cluster_info_list, list_head) {
rockchip_opp_dump_cur_state(ci->opp_info.dev);
}
return 0;
}
static struct notifier_block rockchip_cpufreq_panic_notifier_block = {
.notifier_call = rockchip_cpufreq_panic_notifier,
};
static int __init rockchip_cpufreq_driver_init(void)
{
struct cluster_info *cluster, *pos;
@@ -948,6 +964,11 @@ static int __init rockchip_cpufreq_driver_init(void)
#endif
}
ret = atomic_notifier_chain_register(&panic_notifier_list,
&rockchip_cpufreq_panic_notifier_block);
if (ret)
pr_err("failed to register cpufreq panic notifier\n");
return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
-1, (void *)&pdata,
sizeof(struct cpufreq_dt_platform_data)));

3
drivers/crypto/rockchip/Makefile
View File

@@ -3,7 +3,8 @@ obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rk_crypto.o
rk_crypto-objs := rk_crypto_core.o \
rk_crypto_utils.o \
rk_crypto_ahash_utils.o \
rk_crypto_skcipher_utils.o
rk_crypto_skcipher_utils.o \
procfs.o
rk_crypto-$(CONFIG_CRYPTO_DEV_ROCKCHIP_V1) += \
rk_crypto_v1.o \

160
drivers/crypto/rockchip/procfs.c Normal file
View File

@@ -0,0 +1,160 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright (c) Rockchip Electronics Co., Ltd. */
#include <linux/clk.h>
#include <linux/proc_fs.h>
#include <linux/sem.h>
#include <linux/seq_file.h>
#include "procfs.h"
#ifdef CONFIG_PROC_FS
static const char *alg_type2name[ALG_TYPE_MAX] = {
[ALG_TYPE_HASH] = "HASH",
[ALG_TYPE_HMAC] = "HMAC",
[ALG_TYPE_CIPHER] = "CIPHER",
[ALG_TYPE_ASYM] = "ASYM",
[ALG_TYPE_AEAD] = "AEAD",
};
static void crypto_show_clock(struct seq_file *p, struct clk_bulk_data *clk_bulks, int clks_num)
{
int i;
seq_puts(p, "clock info:\n");
for (i = 0; i < clks_num; i++)
seq_printf(p, "\t%-10s %ld\n", clk_bulks[i].id, clk_get_rate(clk_bulks[i].clk));
seq_puts(p, "\n");
}
static void crypto_show_stat(struct seq_file *p, struct rk_crypto_stat *stat)
{
/* show statistic info */
seq_puts(p, "Statistic info:\n");
seq_printf(p, "\tbusy_cnt : %llu\n", stat->busy_cnt);
seq_printf(p, "\tequeue_cnt : %llu\n", stat->equeue_cnt);
seq_printf(p, "\tdequeue_cnt : %llu\n", stat->dequeue_cnt);
seq_printf(p, "\tdone_cnt : %llu\n", stat->done_cnt);
seq_printf(p, "\tcomplete_cnt : %llu\n", stat->complete_cnt);
seq_printf(p, "\tfake_cnt : %llu\n", stat->fake_cnt);
seq_printf(p, "\tirq_cnt : %llu\n", stat->irq_cnt);
seq_printf(p, "\ttimeout_cnt : %llu\n", stat->timeout_cnt);
seq_printf(p, "\terror_cnt : %llu\n", stat->error_cnt);
seq_printf(p, "\tlast_error : %d\n", stat->last_error);
seq_puts(p, "\n");
}
static void crypto_show_queue_info(struct seq_file *p, struct rk_crypto_dev *rk_dev)
{
bool busy;
unsigned long flags;
u32 qlen, max_qlen;
spin_lock_irqsave(&rk_dev->lock, flags);
qlen = rk_dev->queue.qlen;
max_qlen = rk_dev->queue.max_qlen;
busy = rk_dev->busy;
spin_unlock_irqrestore(&rk_dev->lock, flags);
seq_printf(p, "Crypto queue usage [%u/%u], ever_max = %llu, status: %s\n",
qlen, max_qlen, rk_dev->stat.ever_queue_max, busy ? "busy" : "idle");
seq_puts(p, "\n");
}
static void crypto_show_valid_algo_single(struct seq_file *p, enum alg_type type,
struct rk_crypto_algt **algs, u32 algs_num)
{
u32 i;
struct rk_crypto_algt *tmp_algs;
seq_printf(p, "\t%s:\n", alg_type2name[type]);
for (i = 0; i < algs_num; i++, algs++) {
tmp_algs = *algs;
if (!(tmp_algs->valid_flag) || tmp_algs->type != type)
continue;
seq_printf(p, "\t\t%s\n", tmp_algs->name);
}
seq_puts(p, "\n");
}
static void crypto_show_valid_algos(struct seq_file *p, struct rk_crypto_soc_data *soc_data)
{
u32 algs_num = 0;
struct rk_crypto_algt **algs;
seq_puts(p, "Valid algorithms:\n");
algs = soc_data->hw_get_algts(&algs_num);
if (!algs || algs_num == 0)
return;
crypto_show_valid_algo_single(p, ALG_TYPE_CIPHER, algs, algs_num);
crypto_show_valid_algo_single(p, ALG_TYPE_AEAD, algs, algs_num);
crypto_show_valid_algo_single(p, ALG_TYPE_HASH, algs, algs_num);
crypto_show_valid_algo_single(p, ALG_TYPE_HMAC, algs, algs_num);
crypto_show_valid_algo_single(p, ALG_TYPE_ASYM, algs, algs_num);
}
static int crypto_show_all(struct seq_file *p, void *v)
{
struct rk_crypto_dev *rk_dev = p->private;
struct rk_crypto_soc_data *soc_data = rk_dev->soc_data;
struct rk_crypto_stat *stat = &rk_dev->stat;
seq_printf(p, "Rockchip Crypto Version: %s\n\n",
soc_data->crypto_ver);
seq_printf(p, "use_soft_aes192 : %s\n\n", soc_data->use_soft_aes192 ? "true" : "false");
crypto_show_clock(p, rk_dev->clk_bulks, rk_dev->clks_num);
crypto_show_valid_algos(p, soc_data);
crypto_show_stat(p, stat);
crypto_show_queue_info(p, rk_dev);
return 0;
}
static int crypto_open(struct inode *inode, struct file *file)
{
struct rk_crypto_dev *data = PDE_DATA(inode);
return single_open(file, crypto_show_all, data);
}
static const struct proc_ops ops = {
.proc_open = crypto_open,
.proc_read = seq_read,
.proc_lseek = seq_lseek,
.proc_release = single_release,
};
int rkcrypto_proc_init(struct rk_crypto_dev *rk_dev)
{
rk_dev->procfs = proc_create_data(rk_dev->name, 0, NULL, &ops, rk_dev);
if (!rk_dev->procfs)
return -EINVAL;
return 0;
}
void rkcrypto_proc_cleanup(struct rk_crypto_dev *rk_dev)
{
if (rk_dev->procfs)
remove_proc_entry(rk_dev->name, NULL);
rk_dev->procfs = NULL;
}
#endif /* CONFIG_PROC_FS */

23
drivers/crypto/rockchip/procfs.h Normal file
View File

@@ -0,0 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (c) 2022 Rockchip Electronics Co., Ltd. */
#ifndef _RKCRYPTO_PROCFS_H
#define _RKCRYPTO_PROCFS_H
#include "rk_crypto_core.h"
#ifdef CONFIG_PROC_FS
int rkcrypto_proc_init(struct rk_crypto_dev *dev);
void rkcrypto_proc_cleanup(struct rk_crypto_dev *dev);
#else
static inline int rkcrypto_proc_init(struct rk_crypto_dev *dev)
{
return 0;
}
static inline void rkcrypto_proc_cleanup(struct rk_crypto_dev *dev)
{
}
#endif
#endif

43
drivers/crypto/rockchip/rk_crypto_core.c
View File

@@ -26,6 +26,9 @@
#include "rk_crypto_v2.h"
#include "rk_crypto_v3.h"
#include "cryptodev_linux/rk_cryptodev.h"
#include "procfs.h"
#define CRYPTO_NAME "rkcrypto"
static struct rk_alg_ctx *rk_alg_ctx_cast(struct crypto_async_request *async_req)
{
@@ -271,6 +274,7 @@ static void rk_crypto_irq_timer_handle(struct timer_list *t)
struct rk_crypto_dev *rk_dev = from_timer(rk_dev, t, timer);
rk_dev->err = -ETIMEDOUT;
rk_dev->stat.timeout_cnt++;
tasklet_schedule(&rk_dev->done_task);
}
@@ -281,6 +285,8 @@ static irqreturn_t rk_crypto_irq_handle(int irq, void *dev_id)
spin_lock(&rk_dev->lock);
rk_dev->stat.irq_cnt++;
if (alg_ctx->ops.irq_handle)
alg_ctx->ops.irq_handle(irq, dev_id);
@@ -310,6 +316,7 @@ static int rk_start_op(struct rk_crypto_dev *rk_dev)
/* fake calculations are used to trigger the Done Task */
if (alg_ctx->total == 0) {
CRYPTO_TRACE("fake done_task");
rk_dev->stat.fake_cnt++;
tasklet_schedule(&rk_dev->done_task);
}
@@ -333,13 +340,20 @@ static void rk_complete_op(struct rk_crypto_dev *rk_dev, int err)
disable_irq(rk_dev->irq);
del_timer(&rk_dev->timer);
rk_dev->stat.complete_cnt++;
if (err) {
rk_dev->stat.error_cnt++;
rk_dev->stat.last_error = err;
dev_err(rk_dev->dev, "complete_op err = %d\n", err);
}
if (!alg_ctx || !alg_ctx->ops.complete)
return;
alg_ctx->ops.complete(rk_dev->async_req, err);
if (err)
dev_err(rk_dev->dev, "complete_op err = %d\n", err);
rk_dev->async_req = NULL;
tasklet_schedule(&rk_dev->queue_task);
}
@@ -352,10 +366,17 @@ static int rk_crypto_enqueue(struct rk_crypto_dev *rk_dev,
spin_lock_irqsave(&rk_dev->lock, flags);
ret = crypto_enqueue_request(&rk_dev->queue, async_req);
if (rk_dev->queue.qlen > rk_dev->stat.ever_queue_max)
rk_dev->stat.ever_queue_max = rk_dev->queue.qlen;
if (rk_dev->busy) {
rk_dev->stat.busy_cnt++;
spin_unlock_irqrestore(&rk_dev->lock, flags);
return ret;
}
rk_dev->stat.equeue_cnt++;
rk_dev->busy = true;
spin_unlock_irqrestore(&rk_dev->lock, flags);
tasklet_schedule(&rk_dev->queue_task);
@@ -369,6 +390,11 @@ static void rk_crypto_queue_task_cb(unsigned long data)
struct crypto_async_request *async_req, *backlog;
unsigned long flags;
if (rk_dev->async_req) {
dev_err(rk_dev->dev, "%s: Unexpected crypto paths.\n", __func__);
return;
}
rk_dev->err = 0;
spin_lock_irqsave(&rk_dev->lock, flags);
backlog = crypto_get_backlog(&rk_dev->queue);
@@ -379,6 +405,7 @@ static void rk_crypto_queue_task_cb(unsigned long data)
spin_unlock_irqrestore(&rk_dev->lock, flags);
return;
}
rk_dev->stat.dequeue_cnt++;
spin_unlock_irqrestore(&rk_dev->lock, flags);
if (backlog) {
@@ -397,6 +424,8 @@ static void rk_crypto_done_task_cb(unsigned long data)
struct rk_crypto_dev *rk_dev = (struct rk_crypto_dev *)data;
struct rk_alg_ctx *alg_ctx = rk_alg_ctx_cast(rk_dev->async_req);
rk_dev->stat.done_cnt++;
if (rk_dev->err)
goto exit;
@@ -500,6 +529,8 @@ static int rk_crypto_register(struct rk_crypto_dev *rk_dev)
if (err)
goto err_cipher_algs;
tmp_algs->valid_flag = true;
CRYPTO_TRACE("%s register OK!!!\n", *algs_name);
}
@@ -579,7 +610,7 @@ static void rk_crypto_action(void *data)
}
static char *crypto_no_sm_algs_name[] = {
"ecb(aes)", "cbc(aes)", "cfb(aes)", "ofb(aes)", "ctr(aes)",
"ecb(aes)", "cbc(aes)", "cfb(aes)", "ofb(aes)", "ctr(aes)", "gcm(aes)",
"ecb(des)", "cbc(des)", "cfb(des)", "ofb(des)",
"ecb(des3_ede)", "cbc(des3_ede)", "cfb(des3_ede)", "ofb(des3_ede)",
"sha1", "sha224", "sha256", "sha384", "sha512", "md5",
@@ -691,6 +722,8 @@ static int rk_crypto_probe(struct platform_device *pdev)
goto err_crypto;
}
rk_dev->name = CRYPTO_NAME;
match = of_match_node(crypto_of_id_table, np);
soc_data = (struct rk_crypto_soc_data *)match->data;
rk_dev->soc_data = soc_data;
@@ -818,6 +851,8 @@ static int rk_crypto_probe(struct platform_device *pdev)
rk_cryptodev_register_dev(rk_dev->dev, soc_data->crypto_ver);
rkcrypto_proc_init(rk_dev);
dev_info(dev, "%s Accelerator successfully registered\n", soc_data->crypto_ver);
return 0;
@@ -832,6 +867,8 @@ static int rk_crypto_remove(struct platform_device *pdev)
{
struct rk_crypto_dev *rk_dev = platform_get_drvdata(pdev);
rkcrypto_proc_cleanup(rk_dev);
rk_cryptodev_unregister_dev(rk_dev->dev);
del_timer_sync(&rk_dev->timer);

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