ASoC: rockchip: sai: Fix mclk check

Before:
rockchip-sai ff810000,sai: mismatch mclk: 12287999, expected 0 (+/- 5Hz)

After:
rockchip-sai ff810000,sai: mismatch mclk: 12287999, at least 24576000

Fixes: 1831ca1cdc ("ASoC: rockchip: sai: Fix mclk rate check")

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I7addcf70104515c50463a42fc9fd7fe46a9456fd
This commit is contained in:
Sugar Zhang
2024-09-12 15:00:01 +08:00
committed by Tao Huang
parent f4e6d5530a
commit 2b6899e2d0

View File

@@ -620,7 +620,14 @@ static int rockchip_sai_hw_params(struct snd_pcm_substream *substream,
bclk_rate = sai->fw_ratio * slot_width * ch_per_lane * params_rate(params);
if (sai->is_clk_auto)
clk_set_rate(sai->mclk, bclk_rate);
mclk_rate = clk_get_rate(sai->mclk);
if (mclk_rate < bclk_rate) {
dev_err(sai->dev, "Mismatch mclk: %u, at least %u\n",
mclk_rate, bclk_rate);
return -EINVAL;
}
div_bclk = DIV_ROUND_CLOSEST(mclk_rate, bclk_rate);
mclk_req_rate = bclk_rate * div_bclk;