FROMLIST: usb: dwc2: Disable clock gating feature on Rockchip SoCs

The DWC2 IP on the Rockchip SoCs doesn't support clock gating.
When a clock gating is enabled, system hangs.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Jianwei Zheng <jianwei.zheng@rock-chips.com>
Link: https://lore.kernel.org/all/1703575199-23638-1-git-send-email-william.wu@rock-chips.com/
Change-Id: I8548b3c1f2e68fada7cbfc28a4d302607a22645e
This commit is contained in:
William Wu
2023-12-26 15:07:02 +08:00
committed by Tao Huang
parent 4041c1759e
commit 2f6e7d9700

View File

@@ -118,6 +118,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
p->lpm_clock_gating = false;
p->besl = false;
p->hird_threshold_en = false;
p->no_clock_gating = true;
}
static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)