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arm64: dts: rockchip: rk3576: add bus opp-table for A72
Raise the voltage of bus(vdd_loigc) when A72 is at high frequency. Change-Id: I4444eab3a4d97c28c42702624c65d57713b39577 Signed-off-by: Liang Chen <cl@rock-chips.com>
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@@ -721,6 +721,48 @@
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};
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};
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bus_a72: bus-a72 {
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compatible = "rockchip,rk3576-bus";
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rockchip,busfreq-policy = "clkfreq";
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clocks = <&scmi_clk ARMCLK_B>;
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clock-names = "bus";
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operating-points-v2 = <&bus_a72_opp_table>;
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status = "disabled";
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};
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bus_a72_opp_table: bus-a72-opp-table {
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compatible = "operating-points-v2";
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opp-shared;
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nvmem-cells = <&log_leakage>;
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nvmem-cell-names = "leakage";
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rockchip,leakage-voltage-sel = <
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1 10 0
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11 20 1
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21 254 2
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>;
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opp-1800000000 {
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opp-hz = /bits/ 64 <1800000000>;
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opp-microvolt = <750000 750000 800000>;
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opp-microvolt-L1 = <725000 725000 800000>;
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opp-microvolt-L2 = <712500 712500 800000>;
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};
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opp-2016000000 {
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opp-hz = /bits/ 64 <2016000000>;
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opp-microvolt = <775000 775000 800000>;
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opp-microvolt-L1 = <750000 750000 800000>;
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opp-microvolt-L2 = <712500 712500 800000>;
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};
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opp-2208000000 {
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opp-hz = /bits/ 64 <2208000000>;
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opp-microvolt = <800000 800000 800000>;
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opp-microvolt-L1 = <775000 775000 800000>;
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opp-microvolt-L2 = <737500 737500 800000>;
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};
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};
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cpuinfo {
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compatible = "rockchip,cpuinfo";
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nvmem-cells = <&otp_id>, <&otp_cpu_version>, <&cpu_code>;
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