shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-07 03:15:31 +09:00
Code Issues Packages Projects Releases Wiki Activity

phy: rockchip: naneng-combophy: adjust ssc ppm parameter for sata

Browse Source 
Set the PLL SCC ppm adjust signal to 3500ppm for better compatibility.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I80aca9cd53aa08944bb929156dc9474118679b47
This commit is contained in:
Yifeng Zhao
2022-07-18 09:50:03 +08:00
committed by Tao Huang
parent edb64ec7a5
commit 347d284ff8
1 changed files with 6 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
View File

@@ -802,6 +802,12 @@ static int rk3588_combphy_cfg(struct rockchip_combphy_priv *priv)
val &= ~GENMASK(7, 4);
val |= 0x50;
writel(val, priv->mmio + (0x1f << 2));
/* ssc ppm adjust to 3500ppm */
val = readl(priv->mmio + (0x9 << 2));
val &= ~GENMASK(3, 0);
val |= 0x7;
writel(val, priv->mmio + (0x9 << 2));
}
break;
default: