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UPSTREAM: ARM: dts: rockchip: fix missing usbphy unit-names

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The usbphy subnodes do have a reg property but no unitname, add them.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
Change-Id: I5b48e289b332397ab7c383b839b875aeefa9f114
 (cherry picked from commit a8f0fa2764)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
This commit is contained in:
Jacob Chen
2016-12-09 14:41:36 +08:00
committed by Huang, Tao
parent f5feba517b
commit 36fe783695
3 changed files with 11 additions and 8 deletions
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4
arch/arm/boot/dts/rk3066a.dtsi
View File

@@ -176,14 +176,14 @@
#size-cells = <0>;
status = "disabled";
usbphy0: usb-phy0 {
usbphy0: usb-phy@17c {
#phy-cells = <0>;
reg = <0x17c>;
clocks = <&cru SCLK_OTGPHY0>;
clock-names = "phyclk";
};
usbphy1: usb-phy1 {
usbphy1: usb-phy@188 {
#phy-cells = <0>;
reg = <0x188>;
clocks = <&cru SCLK_OTGPHY1>;

4
arch/arm/boot/dts/rk3188.dtsi
View File

@@ -151,14 +151,14 @@
#size-cells = <0>;
status = "disabled";
usbphy0: usb-phy0 {
usbphy0: usb-phy@10c {
#phy-cells = <0>;
reg = <0x10c>;
clocks = <&cru SCLK_OTGPHY0>;
clock-names = "phyclk";
};
usbphy1: usb-phy1 {
usbphy1: usb-phy@11c {
#phy-cells = <0>;
reg = <0x11c>;
clocks = <&cru SCLK_OTGPHY1>;

11
arch/arm/boot/dts/rk3288.dtsi
View File

@@ -862,33 +862,36 @@
status = "disabled";
};
usbphy: phy {
usbphy: usbphy {
compatible = "rockchip,rk3288-usb-phy";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
usbphy0: usb-phy0 {
usbphy0: usb-phy@320 {
#phy-cells = <0>;
reg = <0x320>;
clocks = <&cru SCLK_OTGPHY0>;
clock-names = "phyclk";
#clock-cells = <0>;
resets = <&cru SRST_USBOTG_PHY>;
reset-names = "phy-reset";
};
usbphy1: usb-phy1 {
usbphy1: usb-phy@334 {
#phy-cells = <0>;
reg = <0x334>;
clocks = <&cru SCLK_OTGPHY1>;
clock-names = "phyclk";
#clock-cells = <0>;
};
usbphy2: usb-phy2 {
usbphy2: usb-phy@348 {
#phy-cells = <0>;
reg = <0x348>;
clocks = <&cru SCLK_OTGPHY2>;
clock-names = "phyclk";
#clock-cells = <0>;
resets = <&cru SRST_USBHOST1_PHY>;
reset-names = "phy-reset";
};