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drm/rockchip: vop2: afbc_tile_num should align up to 16 pixel and divide 16

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Change-Id: Ied67749759268e9ff4acb0322a6517f8ed099c9d
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
This commit is contained in:
Sandy Huang
2020-12-31 10:59:57 +08:00
committed by Tao Huang
parent 06656c4794
commit 37b5bec67d
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
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@@ -1991,7 +1991,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane, struct drm_plane_s
if (vpstate->afbc_en) {
/* the afbc superblock is 16 x 16 */
afbc_format = vop2_convert_afbc_format(fb->format->format);
afbc_tile_num = actual_w >> 4;
afbc_tile_num = ALIGN(actual_w, 16) >> 4;
/* AFBC pic_vir_width is count by pixel, this is different
* with WIN_VIR_STRIDE.
*/