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clk: rockchip: rk3368: Add clock id for tsp
Change-Id: I79a423f93f991aab43922e58ce34eac1754304e2 Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
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@@ -433,10 +433,10 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
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GATE(SCLK_I2S_2CH, "sclk_i2s_2ch", "i2s_2ch_pre", CLK_SET_RATE_PARENT,
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RK3368_CLKGATE_CON(5), 15, GFLAGS),
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COMPOSITE(0, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0,
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COMPOSITE(SCLK_TSP, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0,
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RK3368_CLKSEL_CON(46), 6, 2, MFLAGS, 0, 5, DFLAGS,
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RK3368_CLKGATE_CON(6), 12, GFLAGS),
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GATE(0, "sclk_hsadc_tsp", "ext_hsadc_tsp", 0,
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GATE(SCLK_HSADC_TSP, "sclk_hsadc_tsp", "ext_hsadc_tsp", 0,
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RK3368_CLKGATE_CON(13), 7, GFLAGS),
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MUX(0, "uart_src", mux_pll_src_cpll_gpll_p, 0,
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@@ -92,6 +92,8 @@
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#define SCLK_TIMER14 137
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#define SCLK_TIMER15 138
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#define SCLK_DDRCLK 139
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#define SCLK_TSP 140
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#define SCLK_HSADC_TSP 141
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#define DCLK_VOP 190
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#define MCLK_CRYPTO 191
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