clk: rockchip: rk3576: add CLK_SET_RATE_NO_REPARENT for ebc

Change-Id: If6f10948f96156b9a26cb10c7bf8f7edac6038bb
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Elaine Zhang
2024-03-14 10:44:41 +08:00
committed by Tao Huang
parent 0948d9e34a
commit 46edc7c867

View File

@@ -1294,13 +1294,13 @@ static struct rockchip_clk_branch rk3576_clk_branches[] __initdata = {
MUX(0, "dclk_ebc_frac_src_p", gpll_cpll_vpll_aupll_24m_p, 0,
RK3576_CLKSEL_CON(123), 0, 3, MFLAGS),
COMPOSITE_FRAC(DCLK_EBC_FRAC_SRC, "dclk_ebc_frac_src", "dclk_ebc_frac_src_p", 0,
RK3576_CLKSEL_CON(122), 0,
RK3576_CLKSEL_CON(122), CLK_FRAC_DIVIDER_NO_LIMIT,
RK3576_CLKGATE_CON(50), 9, GFLAGS),
GATE(ACLK_EBC, "aclk_ebc", "aclk_vpu_low_root", 0,
RK3576_CLKGATE_CON(50), 11, GFLAGS),
GATE(HCLK_EBC, "hclk_ebc", "hclk_vpu_root", 0,
RK3576_CLKGATE_CON(50), 10, GFLAGS),
COMPOSITE(DCLK_EBC, "dclk_ebc", dclk_ebc_p, 0,
COMPOSITE(DCLK_EBC, "dclk_ebc", dclk_ebc_p, CLK_SET_RATE_NO_REPARENT,
RK3576_CLKSEL_CON(123), 12, 3, MFLAGS, 3, 9, DFLAGS,
RK3576_CLKGATE_CON(50), 12, GFLAGS),