shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-07 19:30:30 +09:00
Code Issues Packages Projects Releases Wiki Activity

clk: rockchip: px30: fix gpu clk

Browse Source 
Remove clk_gpu_divnp5.
Fix gpu frequency overflowing.

Change-Id: I67f47f5fdd7873c22b1349e3aeb80b7157c7844c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Finley Xiao
2018-02-09 15:13:26 +08:00
committed by Tao Huang
parent 1497e5c949
commit 488ffe507e
1 changed files with 3 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
drivers/clk/rockchip/clk-px30.c
View File

@@ -305,17 +305,10 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
PX30_CLKGATE_CON(17), 4, GFLAGS),
/* PD_GPU */
COMPOSITE_NODIV(0, "clk_gpu_src", mux_4plls_p, 0,
PX30_CLKSEL_CON(1), 6, 2, MFLAGS,
COMPOSITE(0, "clk_gpu_src", mux_4plls_p, 0,
PX30_CLKSEL_CON(1), 6, 2, MFLAGS, 0, 4, DFLAGS,
PX30_CLKGATE_CON(0), 8, GFLAGS),
COMPOSITE_NOMUX(0, "clk_gpu_div", "clk_gpu_src", 0,
PX30_CLKSEL_CON(1), 0, 4, DFLAGS,
PX30_CLKGATE_CON(0), 12, GFLAGS),
COMPOSITE_NOMUX_HALFDIV(0, "clk_gpu_np5", "clk_gpu_src", 0,
PX30_CLKSEL_CON(1), 8, 4, DFLAGS,
PX30_CLKGATE_CON(0), 9, GFLAGS),
COMPOSITE_NODIV(SCLK_GPU, "clk_gpu", mux_gpu_p, CLK_SET_RATE_PARENT,
PX30_CLKSEL_CON(1), 15, 1, MFLAGS,
GATE(ACLK_GPU, "clk_gpu", "clk_gpu_src", 0,
PX30_CLKGATE_CON(0), 10, GFLAGS),
COMPOSITE_NOMUX(0, "aclk_gpu", "clk_gpu", CLK_IGNORE_UNUSED,
PX30_CLKSEL_CON(1), 13, 2, DFLAGS,