shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-06 19:08:57 +09:00
Code Issues Packages Projects Releases Wiki Activity

clk: meson: axg: fix the od shift of the sys_pll

Browse Source 
PD#159137: clk: meson: axg: fix the od shift of the sys_pll

According to datasheet, the od shift of sys_pll is 16,
fix the typo which introduced at previous commit.

Change-Id: I8d7e36b1178c0ab7f89791964fe4bb216c551d6d
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
This commit is contained in:
Yixun Lan
2018-01-19 09:47:01 +08:00
parent ee8657ab98
commit 48fe27347d
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/amlogic/clk/axg/axg.c
View File

@@ -88,7 +88,7 @@ static struct meson_clk_pll axg_sys_pll = {
},
.od = {
.reg_off = HHI_SYS_PLL_CNTL,
.shift = 10,
.shift = 16,
.width = 2,
},
.rate_table = sys_pll_rate_table,