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Revert "Revert "FROMLIST: scsi: ufs: Add dev ref clock gating wait time support""

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This reverts commit 8326ceb4bc which was
commit 1ddc9771d5.  It was fixed up by
hand due to the scsi upstream merge.

Bug: 143632303
Link: https://lore.kernel.org/patchwork/patch/1149892/
Cc: Can Guo <cang@codeaurora.org>
Cc: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I69900cab82eb84a384db3b30c5a6311964ec9d91
This commit is contained in:
Greg Kroah-Hartman
2020-02-03 16:05:36 +00:00
parent bf01359e5f
commit 52ced52490
2 changed files with 48 additions and 0 deletions
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3
drivers/scsi/ufs/ufs.h
View File

@@ -167,6 +167,7 @@ enum attr_idn {
QUERY_ATTR_IDN_FFU_STATUS = 0x14,
QUERY_ATTR_IDN_PSA_STATE = 0x15,
QUERY_ATTR_IDN_PSA_DATA_SIZE = 0x16,
QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17,
};
/* Descriptor idn for Query requests */
@@ -534,6 +535,8 @@ struct ufs_dev_info {
u16 wmanufacturerid;
/*UFS device Product Name */
u8 *model;
u16 spec_version;
u32 clk_gating_wait_us;
};
/**

45
drivers/scsi/ufs/ufshcd.c
View File

@@ -92,6 +92,9 @@
/* default delay of autosuspend: 2000 ms */
#define RPM_AUTOSUSPEND_DELAY_MS 2000
/* Default value of wait time before gating device ref clock */
#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
({ \
int _ret; \
@@ -3338,6 +3341,37 @@ static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
param_offset, param_read_buf, param_size);
}
static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
{
int err = 0;
u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
if (hba->dev_info.spec_version >= 0x300) {
err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
&gating_wait);
if (err)
dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
err, gating_wait);
if (gating_wait == 0) {
gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
gating_wait);
}
/*
* bRefClkGatingWaitTime defines the minimum time for which the
* reference clock is required by device during transition from
* HS-MODE to LS-MODE or HIBERN8 state. Give it more time to be
* on the safe side.
*/
hba->dev_info.clk_gating_wait_us = gating_wait + 50;
}
return err;
}
/**
* ufshcd_memory_alloc - allocate memory for host memory space data structures
* @hba: per adapter instance
@@ -6694,6 +6728,10 @@ static int ufs_get_device_desc(struct ufs_hba *hba)
dev_info->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
/* getting Specification Version in big endian format */
hba->dev_info.spec_version = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
err = ufshcd_read_string_desc(hba, model_index,
&dev_info->model, SD_ASCII_STD);
@@ -7073,6 +7111,8 @@ static int ufshcd_device_params_init(struct ufs_hba *hba)
ufs_fixup_device_setup(hba);
ufshcd_get_ref_clk_gating_wait(hba);
if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
hba->dev_info.f_power_on_wp_en = flag;
@@ -7469,12 +7509,17 @@ static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
struct ufs_clk_info *clki;
struct list_head *head = &hba->clk_list_head;
unsigned long flags;
unsigned long gating_wait;
ktime_t start = ktime_get();
bool clk_state_changed = false;
if (list_empty(head))
goto out;
gating_wait = (unsigned long)hba->dev_info.clk_gating_wait_us;
if (!on && !skip_ref_clk && !!gating_wait)
usleep_range(gating_wait, gating_wait + 10);
ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
if (ret)
return ret;