shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-07 11:26:02 +09:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: rockchip: rk3568: Add edp phy grf node

Browse Source 
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I0ee522627cc057bd5b0be2c862e56f020dae57a2
This commit is contained in:
Wyon Bi
2022-02-08 17:42:05 +08:00
committed by Tao Huang
parent 3cdcfb1a52
commit 54f2fcc787
1 changed files with 12 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

21
arch/arm64/boot/dts/rockchip/rk3568.dtsi
View File

@@ -787,15 +787,18 @@
reg = <0x0 0xfdca8000 0x0 0x8000>;
};
edp_phy: edp-phy@fdcb0000 {
compatible = "rockchip,rk3568-edp-phy";
reg = <0x0 0xfdcb0000 0x0 0x8000>;
clocks = <&pmucru XIN_OSC0_EDPPHY_G>, <&cru PCLK_EDPPHY_GRF>;
clock-names = "refclk", "pclk";
resets = <&cru SRST_P_EDPPHY_GRF>;
reset-names = "apb";
#phy-cells = <0>;
status = "disabled";
edp_phy_grf: syscon@fdcb0000 {
compatible = "rockchip,rk3568-edp-phy-grf", "syscon", "simple-mfd";
reg = <0x0 0xfdcb0000 0x0 0x100>;
clocks = <&cru PCLK_EDPPHY_GRF>;
edp_phy: edp-phy {
compatible = "rockchip,rk3568-edp-phy";
clocks = <&pmucru XIN_OSC0_EDPPHY_G>;
clock-names = "refclk";
#phy-cells = <0>;
status = "disabled";
};
};
pcie30_phy_grf: syscon@fdcb8000 {