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Merge commit '2a9c1e1a64a7ed33719b5fc0efba19e4d6b2af29'

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* commit '2a9c1e1a64a7ed33719b5fc0efba19e4d6b2af29':
  UPSTREAM: sched/fair: Use all little CPUs for CPU-bound workloads
  drm/rockchip: vop2: remove ARGB2101010 support from VOP2
  arm64: dts: rockchip: px30: Change the init sequence of cru and pmucru
  drm/rockchip: vop: update vop afbc format define
  drm/rockchip: vop2: hdisplay must roundup 2/4 when calc pre_scan_dly
  media: rockchip: vicap get_channel_info add param of field to cover value from get_fmt
  media: i2c: rk628: add hdmirxphy debugfs
  media: rockchip: vicap increase wake up cnt for rv1126/rk3568 monitor mode
  media: i2c: maxim: remote: record the status of the serializer
  misc: rk628: Fix `warning: `rk628_pin_iomux_groups` defined but not used`
  misc: rk628: Fix the NULL in .suspend/.resume helper when working on hdmi tx mode.
  arm64: dts: rockchip: add pd_perihp support for rk3399 usb2

Change-Id: I602dc68a0dd151299536a0c8b9c8cd6aaaa41d0c
This commit is contained in:
Tao Huang
2024-01-25 20:35:08 +08:00
parent f65077b203 2a9c1e1a64
commit 56177f3f2c
19 changed files with 322 additions and 189 deletions
Download Patch File Download Diff File Expand all files Collapse all files

30
arch/arm64/boot/dts/rockchip/px30.dtsi
View File

@@ -1230,17 +1230,6 @@
};
};
cru: clock-controller@ff2b0000 {
compatible = "rockchip,px30-cru";
reg = <0x0 0xff2b0000 0x0 0x1000>;
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks = <&cru PLL_NPLL>;
assigned-clock-rates = <1188000000>;
};
pmucru: clock-controller@ff2bc000 {
compatible = "rockchip,px30-pmucru";
reg = <0x0 0xff2bc000 0x0 0x1000>;
@@ -1250,13 +1239,26 @@
assigned-clocks =
<&pmucru PLL_GPLL>, <&pmucru PCLK_PMU_PRE>,
<&pmucru SCLK_WIFI_PMU>, <&cru ARMCLK>,
<&pmucru SCLK_WIFI_PMU>;
assigned-clock-rates =
<1200000000>, <100000000>,
<26000000>;
};
cru: clock-controller@ff2b0000 {
compatible = "rockchip,px30-cru";
reg = <0x0 0xff2b0000 0x0 0x1000>;
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks =
<&cru PLL_NPLL>, <&cru ARMCLK>,
<&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
<&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
<&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>;
assigned-clock-rates =
<1200000000>, <100000000>,
<26000000>, <600000000>,
<1188000000>, <600000000>,
<200000000>, <200000000>,
<150000000>, <150000000>,
<100000000>, <200000000>;

4
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View File

@@ -378,6 +378,7 @@
<&u2phy0>;
phys = <&u2phy0_host>;
phy-names = "usb";
power-domains = <&power RK3399_PD_PERIHP>;
status = "disabled";
};
@@ -389,6 +390,7 @@
<&u2phy0>;
phys = <&u2phy0_host>;
phy-names = "usb";
power-domains = <&power RK3399_PD_PERIHP>;
status = "disabled";
};
@@ -400,6 +402,7 @@
<&u2phy1>;
phys = <&u2phy1_host>;
phy-names = "usb";
power-domains = <&power RK3399_PD_PERIHP>;
status = "disabled";
};
@@ -411,6 +414,7 @@
<&u2phy1>;
phys = <&u2phy1_host>;
phy-names = "usb";
power-domains = <&power RK3399_PD_PERIHP>;
status = "disabled";
};

32
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
View File

@@ -154,6 +154,7 @@
#define to_vop_win(x) container_of(x, struct vop_win, base)
#define to_vop_plane_state(x) container_of(x, struct vop_plane_state, base)
#define AFBC_Y2R_COLOR_TRANSFORM (1 << 4)
enum vop_pending {
VOP_PENDING_FB_UNREF,
@@ -2021,7 +2022,7 @@ static void vop_plane_setup_color_key(struct drm_plane *plane)
}
static void vop_plane_atomic_update(struct drm_plane *plane,
struct drm_atomic_state *state)
struct drm_atomic_state *state)
{
struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
plane);
@@ -2044,9 +2045,9 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
uint32_t val;
bool rb_swap, global_alpha_en, uv_swap;
int is_yuv = fb->format->is_yuv;
bool afbc_en = false;
#if defined(CONFIG_ROCKCHIP_DRM_DEBUG)
bool AFBC_flag = false;
struct vop_dump_list *planlist;
unsigned long num_pages;
struct page **pages;
@@ -2061,10 +2062,6 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
num_pages = rk_obj->num_pages;
pages = rk_obj->pages;
}
if (fb->modifier == DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16))
AFBC_flag = true;
else
AFBC_flag = false;
#endif
/*
@@ -2215,11 +2212,14 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
VOP_WIN_SET(vop, win, gate, 1);
spin_unlock(&vop->reg_lock);
if (rockchip_afbc(plane, fb->modifier))
afbc_en = true;
rockchip_drm_dbg(vop->dev, VOP_DEBUG_PLANE,
"update win%d-area%d [%dx%d->%dx%d@(%d, %d)] zpos:%d fmt[%p4cc%s] addr[%pad] by %s\n",
win->win_id, win->area_id, actual_w, actual_h,
dsp_w, dsp_h, dsp_stx, dsp_sty, vop_plane_state->zpos, &fb->format->format,
fb->modifier ? "[AFBC]" : "", &vop_plane_state->yrgb_mst, current->comm);
afbc_en ? "[AFBC]" : "",
&vop_plane_state->yrgb_mst, current->comm);
/*
* spi interface(vop_plane_state->yrgb_kvaddr, fb->pixel_format,
* actual_w, actual_h)
@@ -2231,7 +2231,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
planlist = kmalloc(sizeof(*planlist), GFP_KERNEL);
if (planlist) {
planlist->dump_info.AFBC_flag = AFBC_flag;
planlist->dump_info.AFBC_flag = afbc_en;
planlist->dump_info.area_id = win->area_id;
planlist->dump_info.win_id = win->win_id;
planlist->dump_info.yuv_format =
@@ -2727,8 +2727,6 @@ static int vop_plane_info_dump(struct seq_file *s, struct drm_plane *plane)
struct drm_gem_object *obj;
struct rockchip_gem_object *rk_obj;
dma_addr_t fb_addr;
u64 afbdc_format =
DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16);
DEBUG_PRINT(" win%d-%d: %s\n", win->win_id, win->area_id,
state->crtc ? "ACTIVE" : "DISABLED");
@@ -2740,7 +2738,7 @@ static int vop_plane_info_dump(struct seq_file *s, struct drm_plane *plane)
DEBUG_PRINT("\tformat: %p4cc%s%s[%d] color_space[%d]\n",
&fb->format->format,
fb->modifier == afbdc_format ? "[AFBC]" : "",
rockchip_afbc(plane, state->fb->modifier) ? "[AFBC]" : "",
pstate->eotf ? " HDR" : " SDR", pstate->eotf,
pstate->color_space);
DEBUG_PRINT("\tcsc: y2r[%d] r2r[%d] r2y[%d] csc mode[%d]\n",
@@ -3670,8 +3668,8 @@ static int vop_afbdc_atomic_check(struct drm_crtc *crtc,
if (pstate->crtc != crtc || !fb)
continue;
if (fb->modifier !=
DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16))
if (!rockchip_afbc(plane, fb->modifier))
continue;
if (!VOP_CTRL_SUPPORT(vop, afbdc_en)) {
@@ -3724,6 +3722,9 @@ static int vop_afbdc_atomic_check(struct drm_crtc *crtc,
fb_addr = rk_obj->dma_addr + fb->offsets[0];
s->afbdc_win_format = afbdc_format;
/* Enable color transform for YTR */
if (fb->modifier & AFBC_FORMAT_MOD_YTR)
s->afbdc_win_format |= AFBC_Y2R_COLOR_TRANSFORM;
s->afbdc_win_id = win->win_id;
s->afbdc_win_ptr = fb_addr;
s->afbdc_win_vir_width = fb->width;
@@ -3760,6 +3761,9 @@ static int vop_afbdc_atomic_check(struct drm_crtc *crtc,
return -EINVAL;
}
s->afbdc_win_format = afbdc_format;
/* Enable color transform for YTR */
if (fb->modifier & AFBC_FORMAT_MOD_YTR)
s->afbdc_win_format |= AFBC_Y2R_COLOR_TRANSFORM;
s->afbdc_win_width = fb->width - 1;
s->afbdc_win_height = (drm_rect_height(src) >> 16) - 1;
s->afbdc_win_id = win->win_id;
@@ -4121,7 +4125,7 @@ static void vop_cfg_update(struct drm_crtc *crtc,
if (s->afbdc_en) {
u32 pic_size, pic_offset;
VOP_CTRL_SET(vop, afbdc_format, s->afbdc_win_format | 1 << 4);
VOP_CTRL_SET(vop, afbdc_format, s->afbdc_win_format);
VOP_CTRL_SET(vop, afbdc_hreg_block_split, 0);
VOP_CTRL_SET(vop, afbdc_sel, s->afbdc_win_id);
VOP_CTRL_SET(vop, afbdc_hdr_ptr, s->afbdc_win_ptr);

20
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
View File

@@ -4883,6 +4883,15 @@ static int vop2_plane_atomic_check(struct drm_plane *plane, struct drm_atomic_st
}
}
if (vp->vop2->version == VOP_VERSION_RK3588) {
if (!vpstate->afbc_en &&
(fb->format->format == DRM_FORMAT_XRGB2101010 ||
fb->format->format == DRM_FORMAT_XBGR2101010)) {
DRM_ERROR("RK3588 unsupported linear XRGB2101010 at %s\n", win->name);
return -EINVAL;
}
}
if (vp->vop2->version > VOP_VERSION_RK3568) {
if (vop2_cluster_window(win) && !vpstate->afbc_en && fb->format->is_yuv && !is_vop3(vop2)) {
DRM_ERROR("Unsupported linear yuv format at %s\n", win->name);
@@ -7737,7 +7746,8 @@ static void vop3_setup_pipe_dly(struct vop2_video_port *vp, const struct vop2_zp
sdr_win_dly = 0;
}
pre_scan_dly = bg_dly + (hdisplay >> 1) - 1;
/* hdisplay must roundup as 2 pixel */
pre_scan_dly = bg_dly + (roundup(hdisplay, 2) >> 1) - 1;
pre_scan_dly = (pre_scan_dly << 16) | hsync_len;
VOP_MODULE_SET(vop2, vp, bg_dly, bg_dly);
VOP_MODULE_SET(vop2, vp, pre_scan_htiming, pre_scan_dly);
@@ -9305,10 +9315,14 @@ static void vop2_setup_dly_for_vp(struct vop2_video_port *vp)
hdisplay = adjusted_mode->crtc_hdisplay;
}
/*
* splice mode: hdisplay must roundup as 4 pixel,
* no splice mode: hdisplay must roundup as 2 pixel.
*/
if (vcstate->splice_mode)
pre_scan_dly = bg_dly + (hdisplay >> 2) - 1;
pre_scan_dly = bg_dly + (roundup(hdisplay, 4) >> 2) - 1;
else
pre_scan_dly = bg_dly + (hdisplay >> 1) - 1;
pre_scan_dly = bg_dly + (roundup(hdisplay, 2) >> 1) - 1;
if (vop2->version == VOP_VERSION_RK3588 && hsync_len < 8)
hsync_len = 8;

2
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
View File

@@ -32,9 +32,7 @@
static const uint32_t formats_for_cluster[] = {
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_ARGB2101010,
DRM_FORMAT_XBGR2101010,
DRM_FORMAT_ABGR2101010,
DRM_FORMAT_XRGB8888,
DRM_FORMAT_ARGB8888,
DRM_FORMAT_XBGR8888,

1
drivers/gpu/drm/rockchip/rockchip_vop_reg.c
View File

@@ -1648,6 +1648,7 @@ static const struct vop_win_data px30_vop_big_win_data[] = {
.type = DRM_PLANE_TYPE_OVERLAY },
{ .base = 0x00, .phy = &rk3366_lit_win1_data,
.type = DRM_PLANE_TYPE_PRIMARY,
.format_modifiers = format_modifiers_afbc,
.feature = WIN_FEATURE_AFBDC },
{ .base = 0xe0, .phy = &px30_win23_data,
.type = DRM_PLANE_TYPE_CURSOR,

9
drivers/media/i2c/maxim/remote/max9295.c
View File

@@ -18,7 +18,7 @@
#define DRIVER_VERSION KERNEL_VERSION(3, 0x01, 0x00)
#define MAX9295_NAME "max9295"
#define MAX9295_NAME "maxim-max9295"
#define MAX9295_I2C_ADDR_DEF 0x40
@@ -456,6 +456,8 @@ static int max9295_module_init(maxim_remote_ser_t *max9295)
return ret;
}
max9295->ser_state = MAXIM_REMOTE_SER_INIT;
return 0;
}
@@ -468,6 +470,8 @@ static int max9295_module_deinit(maxim_remote_ser_t *max9295)
#endif
ret |= max9295_soft_power_down(max9295);
max9295->ser_state = MAXIM_REMOTE_SER_DEINIT;
return ret;
}
@@ -515,6 +519,7 @@ static int max9295_probe(struct i2c_client *client,
max9295->client = client;
max9295->ser_i2c_addr_map = client->addr;
max9295->ser_ops = &max9295_ser_ops;
max9295->ser_state = MAXIM_REMOTE_SER_DEINIT;
i2c_set_clientdata(client, max9295);
@@ -537,6 +542,8 @@ static void max9295_remove(struct i2c_client *client)
mutex_destroy(&max9295->mutex);
max9295->ser_state = MAXIM_REMOTE_SER_DEINIT;
#if KERNEL_VERSION(6, 1, 0) > LINUX_VERSION_CODE
return 0;
#endif

9
drivers/media/i2c/maxim/remote/max96715.c
View File

@@ -18,7 +18,7 @@
#define DRIVER_VERSION KERNEL_VERSION(3, 0x01, 0x00)
#define MAX96715_NAME "max96715"
#define MAX96715_NAME "maxim-max96715"
#define MAX96715_I2C_ADDR_DEF 0x40
@@ -457,6 +457,8 @@ static int max96715_module_init(maxim_remote_ser_t *max96715)
return ret;
#endif
max96715->ser_state = MAXIM_REMOTE_SER_INIT;
return 0;
}
@@ -469,6 +471,8 @@ static int max96715_module_deinit(maxim_remote_ser_t *max96715)
#endif
ret |= max96715_soft_power_down(max96715);
max96715->ser_state = MAXIM_REMOTE_SER_DEINIT;
return ret;
}
@@ -516,6 +520,7 @@ static int max96715_probe(struct i2c_client *client,
max96715->client = client;
max96715->ser_i2c_addr_map = client->addr;
max96715->ser_ops = &max96715_ser_ops;
max96715->ser_state = MAXIM_REMOTE_SER_DEINIT;
i2c_set_clientdata(client, max96715);
@@ -538,6 +543,8 @@ static void max96715_remove(struct i2c_client *client)
mutex_destroy(&max96715->mutex);
max96715->ser_state = MAXIM_REMOTE_SER_DEINIT;
#if KERNEL_VERSION(6, 1, 0) > LINUX_VERSION_CODE
return 0;
#endif

7
drivers/media/i2c/maxim/remote/max96717.c
View File

@@ -409,6 +409,8 @@ static int max96717_module_init(maxim_remote_ser_t *max96717)
return ret;
}
max96717->ser_state = MAXIM_REMOTE_SER_INIT;
return 0;
}
@@ -418,6 +420,8 @@ static int max96717_module_deinit(maxim_remote_ser_t *max96717)
ret |= max96717_i2c_addr_def(max96717);
max96717->ser_state = MAXIM_REMOTE_SER_DEINIT;
return ret;
}
@@ -465,6 +469,7 @@ static int max96717_probe(struct i2c_client *client,
max96717->client = client;
max96717->ser_i2c_addr_map = client->addr;
max96717->ser_ops = &max96717_ser_ops;
max96717->ser_state = MAXIM_REMOTE_SER_DEINIT;
i2c_set_clientdata(client, max96717);
@@ -487,6 +492,8 @@ static void max96717_remove(struct i2c_client *client)
mutex_destroy(&max96717->mutex);
max96717->ser_state = MAXIM_REMOTE_SER_DEINIT;
#if KERNEL_VERSION(6, 1, 0) > LINUX_VERSION_CODE
return 0;
#endif

12
drivers/media/i2c/maxim/remote/maxim_remote.h
View File

@@ -25,6 +25,10 @@ enum rkmodule_pad_type {
#endif
#endif /* LINUX_VERSION_CODE */
/* Serializer State */
#define MAXIM_REMOTE_SER_DEINIT 0
#define MAXIM_REMOTE_SER_INIT 1
/* I2C Device ID */
enum {
MAXIM_REMOTE_I2C_SER_DEF, /* Serializer I2C address: Default */
@@ -76,6 +80,7 @@ typedef struct maxim_remote_ser {
u8 cam_i2c_addr_def;
u8 cam_i2c_addr_map;
u32 ser_state;
struct maxim_remote_init_seq ser_init_seq;
const struct maxim_remote_ser_ops *ser_ops;
} maxim_remote_ser_t;
@@ -325,4 +330,11 @@ static inline struct maxim_remote_ser *maxim_remote_cam_bind_ser(struct device *
}
}
static inline bool maxim_remote_ser_is_inited(maxim_remote_ser_t *remote_ser)
{
if (remote_ser && (remote_ser->ser_state == MAXIM_REMOTE_SER_INIT))
return true;
return false;
}
#endif /* __MAXIM_REMOTE_H__ */

1
drivers/media/i2c/rk628/rk628.c
View File

@@ -426,6 +426,7 @@ static void rk628_debugfs_register_create(struct rk628 *rk628)
continue;
debugfs_create_file(reg->name, 0600, dir, rk628, &rk628_reg_fops);
}
rk628_hdmirx_phy_debugfs_register_create(rk628, dir);
}
void rk628_debugfs_create(struct rk628 *rk628)

68
drivers/media/i2c/rk628/rk628_hdmirx.c
View File

@@ -1518,3 +1518,71 @@ bool rk628_hdmirx_is_signal_change_ists(struct rk628 *rk628)
return false;
}
EXPORT_SYMBOL(rk628_hdmirx_is_signal_change_ists);
static int rk628_hdmirx_phy_reg_show(struct seq_file *s, void *v)
{
struct rk628 *rk628 = s->private;
unsigned int i;
seq_printf(s, "rk628_%s:\n", file_dentry(s->file)->d_iname);
for (i = 0; i <= 0xb7; i++)
seq_printf(s, "0x%02x: %08x\n", i, hdmirxphy_read(rk628, i));
return 0;
}
static ssize_t rk628_hdmirx_phy_reg_write(struct file *file, const char __user *buf,
size_t count, loff_t *ppos)
{
struct rk628 *rk628 = file->f_path.dentry->d_inode->i_private;
u32 addr;
u32 val;
char kbuf[25];
int ret;
if (count >= sizeof(kbuf))
return -ENOSPC;
if (copy_from_user(kbuf, buf, count))
return -EFAULT;
kbuf[count] = '\0';
ret = sscanf(kbuf, "%x%x", &addr, &val);
if (ret != 2)
return -EINVAL;
if (addr > 0xb7)
return -EINVAL;
hdmirxphy_write(rk628, addr, val);
return count;
}
static int rk628_hdmirx_phy_reg_open(struct inode *inode, struct file *file)
{
struct rk628 *rk628 = inode->i_private;
return single_open(file, rk628_hdmirx_phy_reg_show, rk628);
}
static const struct file_operations rk628_hdmirx_phy_reg_fops = {
.owner = THIS_MODULE,
.open = rk628_hdmirx_phy_reg_open,
.read = seq_read,
.write = rk628_hdmirx_phy_reg_write,
.llseek = seq_lseek,
.release = single_release,
};
void rk628_hdmirx_phy_debugfs_register_create(struct rk628 *rk628, struct dentry *dir)
{
if (rk628->version < RK628F_VERSION)
return;
if (IS_ERR(dir))
return;
debugfs_create_file("hdmirxphy", 0600, dir, rk628, &rk628_hdmirx_phy_reg_fops);
}
EXPORT_SYMBOL(rk628_hdmirx_phy_debugfs_register_create);

1
drivers/media/i2c/rk628/rk628_hdmirx.h
View File

@@ -523,4 +523,5 @@ void rk628_hdmirx_cec_unregister(struct rk628_hdmirx_cec *cec);
void rk628_hdmirx_cec_hpd(struct rk628_hdmirx_cec *cec, bool en);
void rk628_hdmirx_cec_state_reconfiguration(struct rk628 *rk628,
struct rk628_hdmirx_cec *cec);
void rk628_hdmirx_phy_debugfs_register_create(struct rk628 *rk628, struct dentry *dir);
#endif

8
drivers/media/platform/rockchip/cif/capture.c
View File

@@ -893,6 +893,10 @@ cif_input_fmt *rkcif_get_input_fmt(struct rkcif_device *dev, struct v4l2_rect *r
if (ch_info.data_bit > 0)
csi_info->data_bit = ch_info.data_bit;
}
if (ch_info.field == 0)
fmt.format.field = V4L2_FIELD_NONE;
else
fmt.format.field = ch_info.field;
} else {
csi_info->vc = 0xff;
}
@@ -11357,6 +11361,7 @@ void rkcif_irq_pingpong(struct rkcif_device *cif_dev)
wake_up(&stream->wq_stopped);
continue;
}
stream->buf_wake_up_cnt++;
if (stream->state != RKCIF_STATE_STREAMING)
continue;
@@ -11501,6 +11506,7 @@ void rkcif_irq_pingpong(struct rkcif_device *cif_dev)
wake_up(&stream->wq_stopped);
return;
}
stream->buf_wake_up_cnt++;
frmid = CIF_GET_FRAME_ID(cif_frmst);
if ((cif_frmst == 0xfffd0002) || (cif_frmst == 0xfffe0002)) {
@@ -11570,6 +11576,7 @@ void rkcif_irq_pingpong(struct rkcif_device *cif_dev)
wake_up(&stream->wq_stopped);
continue;
}
stream->buf_wake_up_cnt++;
if (stream->state != RKCIF_STATE_STREAMING)
continue;
@@ -11678,6 +11685,7 @@ void rkcif_irq_lite_lvds(struct rkcif_device *cif_dev)
if (stream->state != RKCIF_STATE_STREAMING)
continue;
stream->buf_wake_up_cnt++;
switch (mipi_id) {
case RKCIF_STREAM_MIPI_ID0:
stream->frame_phase = SW_FRM_END_ID0(intstat);

149
drivers/misc/rk628/rk628_gpio.h
View File

@@ -144,153 +144,4 @@ enum {
PIN_MUX,
};
struct rk628_pin_iomux_group {
unsigned int pins;
int bank;
int mux;
int iomux_base;
int gpio_base;
int pull_reg;
};
#define PINCTRL_GROUP(a, b, c, d, e, f) \
{.pins = a, .bank = b, .mux = c, .iomux_base = d, .gpio_base = e, .pull_reg = f}
static const struct rk628_pin_iomux_group rk628_pin_iomux_groups[] = {
PINCTRL_GROUP(GPIO0_A0, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON,
RK628_GPIO0_BASE, GRF_GPIO0A_P_CON),
PINCTRL_GROUP(GPIO0_A1, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON,
RK628_GPIO0_BASE, GRF_GPIO0A_P_CON),
PINCTRL_GROUP(GPIO0_A2, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON, RK628_GPIO0_BASE, 0),
PINCTRL_GROUP(GPIO0_A3, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON,
RK628_GPIO0_BASE, GRF_GPIO0A_P_CON),
PINCTRL_GROUP(GPIO0_A4, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON,
RK628_GPIO0_BASE, GRF_GPIO0A_P_CON),
PINCTRL_GROUP(GPIO0_A5, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON,
RK628_GPIO0_BASE, GRF_GPIO0A_P_CON),
PINCTRL_GROUP(GPIO0_A6, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON,
RK628_GPIO0_BASE, GRF_GPIO0A_P_CON),
PINCTRL_GROUP(GPIO0_A7, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON,
RK628_GPIO0_BASE, GRF_GPIO0A_P_CON),
PINCTRL_GROUP(GPIO0_B0, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON, RK628_GPIO0_BASE, 0),
PINCTRL_GROUP(GPIO0_B1, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON, RK628_GPIO0_BASE, 0),
PINCTRL_GROUP(GPIO0_B2, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON, RK628_GPIO0_BASE, 0),
PINCTRL_GROUP(GPIO0_B3, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON, RK628_GPIO0_BASE, 0),
PINCTRL_GROUP(GPIO1_A0, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_A1, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_A2, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_A3, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_A4, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_A5, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_A6, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_A7, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_B0, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON, RK628_GPIO1_BASE, 0),
PINCTRL_GROUP(GPIO1_B1, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON, RK628_GPIO1_BASE, 0),
PINCTRL_GROUP(GPIO1_B2, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON, RK628_GPIO1_BASE, 0),
PINCTRL_GROUP(GPIO1_B3, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON, RK628_GPIO1_BASE, 0),
PINCTRL_GROUP(GPIO1_B4, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON, RK628_GPIO1_BASE, 0),
PINCTRL_GROUP(GPIO1_B5, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON, RK628_GPIO1_BASE, 0),
PINCTRL_GROUP(GPIO2_A0, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_A1, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_A2, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_A3, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_A4, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_A5, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_A6, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_A7, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_B0, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_B1, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_B2, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_B3, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_B4, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_B5, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_B6, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_B7, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_C0, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO2_C1, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO2_C2, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO2_C3, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO2_C4, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO2_C5, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO2_C6, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO2_C7, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO3_A0, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3A_P_CON),
PINCTRL_GROUP(GPIO3_A1, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3A_P_CON),
PINCTRL_GROUP(GPIO3_A2, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3A_P_CON),
PINCTRL_GROUP(GPIO3_A3, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3A_P_CON),
PINCTRL_GROUP(GPIO3_A4, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, 0),
PINCTRL_GROUP(GPIO3_A5, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, 0),
PINCTRL_GROUP(GPIO3_A6, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, 0),
PINCTRL_GROUP(GPIO3_A7, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, 0),
PINCTRL_GROUP(GPIO3_B0, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3B_P_CON),
PINCTRL_GROUP(GPIO3_B1, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3B_P_CON),
PINCTRL_GROUP(GPIO3_B2, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3B_P_CON),
PINCTRL_GROUP(GPIO3_B3, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3B_P_CON),
PINCTRL_GROUP(GPIO3_B4, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3B_P_CON),
PINCTRL_GROUP(PIN_I2SM_SCK, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_I2SM_D, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_I2SM_LR, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_RXDDC_SCL, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_RXDDC_SDA, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_HDMIRX_CE, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_JTAG_EN, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_UART_SEL, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_UART_RTS_EN, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_UART_CTS_EN, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
};
#endif // RK628_GPIO_H

10
drivers/misc/rk628/rk628_hdmitx.c
View File

@@ -840,7 +840,8 @@ static int rk628_hdmi_audio_hw_params(struct device *dev, void *d,
struct hdmi_codec_daifmt *daifmt,
struct hdmi_codec_params *params)
{
struct rk628_hdmi *hdmi = dev_get_drvdata(dev);
struct rk628 *rk628 = dev_get_drvdata(dev);
struct rk628_hdmi *hdmi = rk628->hdmitx;
struct audio_info audio = {
.sample_width = params->sample_width,
.sample_rate = params->sample_rate,
@@ -874,7 +875,8 @@ static void rk628_hdmi_audio_shutdown(struct device *dev, void *d)
static int rk628_hdmi_audio_mute(struct device *dev, void *d, bool mute,
int direction)
{
struct rk628_hdmi *hdmi = dev_get_drvdata(dev);
struct rk628 *rk628 = dev_get_drvdata(dev);
struct rk628_hdmi *hdmi = rk628->hdmitx;
if (!hdmi->hdmi_data.sink_has_audio) {
dev_err(hdmi->dev, "Sink do not support audio!\n");
@@ -896,7 +898,8 @@ static int rk628_hdmi_audio_mute(struct device *dev, void *d, bool mute,
static int rk628_hdmi_audio_get_eld(struct device *dev, void *d,
u8 *buf, size_t len)
{
struct rk628_hdmi *hdmi = dev_get_drvdata(dev);
struct rk628 *rk628 = dev_get_drvdata(dev);
struct rk628_hdmi *hdmi = rk628->hdmitx;
struct drm_mode_config *config = &hdmi->bridge.dev->mode_config;
struct drm_connector *connector;
int ret = -ENODEV;
@@ -1231,7 +1234,6 @@ int rk628_hdmitx_enable(struct rk628 *rk628)
irq = rk628->client->irq;
if (irq < 0)
return irq;
dev_set_drvdata(dev, hdmi);
rk628_hdmi_reset(hdmi);

145
drivers/misc/rk628/rk628_pinctrl.c
View File

@@ -8,6 +8,151 @@
#include "rk628.h"
#include "rk628_gpio.h"
struct rk628_pin_iomux_group {
unsigned int pins;
int bank;
int mux;
int iomux_base;
int gpio_base;
int pull_reg;
};
#define PINCTRL_GROUP(a, b, c, d, e, f) \
{.pins = a, .bank = b, .mux = c, .iomux_base = d, .gpio_base = e, .pull_reg = f}
static const struct rk628_pin_iomux_group rk628_pin_iomux_groups[] = {
PINCTRL_GROUP(GPIO0_A0, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON,
RK628_GPIO0_BASE, GRF_GPIO0A_P_CON),
PINCTRL_GROUP(GPIO0_A1, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON,
RK628_GPIO0_BASE, GRF_GPIO0A_P_CON),
PINCTRL_GROUP(GPIO0_A2, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON, RK628_GPIO0_BASE, 0),
PINCTRL_GROUP(GPIO0_A3, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON,
RK628_GPIO0_BASE, GRF_GPIO0A_P_CON),
PINCTRL_GROUP(GPIO0_A4, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON,
RK628_GPIO0_BASE, GRF_GPIO0A_P_CON),
PINCTRL_GROUP(GPIO0_A5, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON,
RK628_GPIO0_BASE, GRF_GPIO0A_P_CON),
PINCTRL_GROUP(GPIO0_A6, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON,
RK628_GPIO0_BASE, GRF_GPIO0A_P_CON),
PINCTRL_GROUP(GPIO0_A7, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON,
RK628_GPIO0_BASE, GRF_GPIO0A_P_CON),
PINCTRL_GROUP(GPIO0_B0, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON, RK628_GPIO0_BASE, 0),
PINCTRL_GROUP(GPIO0_B1, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON, RK628_GPIO0_BASE, 0),
PINCTRL_GROUP(GPIO0_B2, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON, RK628_GPIO0_BASE, 0),
PINCTRL_GROUP(GPIO0_B3, GPIO_BANK0, 1, GRF_GPIO0AB_SEL_CON, RK628_GPIO0_BASE, 0),
PINCTRL_GROUP(GPIO1_A0, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_A1, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_A2, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_A3, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_A4, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_A5, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_A6, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_A7, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON,
RK628_GPIO1_BASE, GRF_GPIO1A_P_CON),
PINCTRL_GROUP(GPIO1_B0, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON, RK628_GPIO1_BASE, 0),
PINCTRL_GROUP(GPIO1_B1, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON, RK628_GPIO1_BASE, 0),
PINCTRL_GROUP(GPIO1_B2, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON, RK628_GPIO1_BASE, 0),
PINCTRL_GROUP(GPIO1_B3, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON, RK628_GPIO1_BASE, 0),
PINCTRL_GROUP(GPIO1_B4, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON, RK628_GPIO1_BASE, 0),
PINCTRL_GROUP(GPIO1_B5, GPIO_BANK1, 1, GRF_GPIO1AB_SEL_CON, RK628_GPIO1_BASE, 0),
PINCTRL_GROUP(GPIO2_A0, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_A1, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_A2, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_A3, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_A4, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_A5, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_A6, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_A7, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2A_P_CON),
PINCTRL_GROUP(GPIO2_B0, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_B1, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_B2, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_B3, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_B4, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_B5, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_B6, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_B7, GPIO_BANK2, 1, GRF_GPIO2AB_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2B_P_CON),
PINCTRL_GROUP(GPIO2_C0, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO2_C1, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO2_C2, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO2_C3, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO2_C4, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO2_C5, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO2_C6, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO2_C7, GPIO_BANK2, 1, GRF_GPIO2C_SEL_CON,
RK628_GPIO2_BASE, GRF_GPIO2C_P_CON),
PINCTRL_GROUP(GPIO3_A0, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3A_P_CON),
PINCTRL_GROUP(GPIO3_A1, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3A_P_CON),
PINCTRL_GROUP(GPIO3_A2, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3A_P_CON),
PINCTRL_GROUP(GPIO3_A3, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3A_P_CON),
PINCTRL_GROUP(GPIO3_A4, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, 0),
PINCTRL_GROUP(GPIO3_A5, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, 0),
PINCTRL_GROUP(GPIO3_A6, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, 0),
PINCTRL_GROUP(GPIO3_A7, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, 0),
PINCTRL_GROUP(GPIO3_B0, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3B_P_CON),
PINCTRL_GROUP(GPIO3_B1, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3B_P_CON),
PINCTRL_GROUP(GPIO3_B2, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3B_P_CON),
PINCTRL_GROUP(GPIO3_B3, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3B_P_CON),
PINCTRL_GROUP(GPIO3_B4, GPIO_BANK3, 1, GRF_GPIO3AB_SEL_CON,
RK628_GPIO3_BASE, GRF_GPIO3B_P_CON),
PINCTRL_GROUP(PIN_I2SM_SCK, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_I2SM_D, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_I2SM_LR, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_RXDDC_SCL, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_RXDDC_SDA, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_HDMIRX_CE, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_JTAG_EN, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_UART_SEL, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_UART_RTS_EN, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
PINCTRL_GROUP(PIN_UART_CTS_EN, GPIO_BANKX, 1, GRF_SYSTEM_CON3, 0, 0),
};
static int rk628_calc_mux_offset(struct rk628 *rk628, int mux, int reg, int offset)
{
int val = 0, orig;

1
include/uapi/linux/rk-camera-module.h
View File

@@ -669,6 +669,7 @@ struct rkmodule_channel_info {
__u32 bus_fmt;
__u32 data_type;
__u32 data_bit;
__u32 field;
} __attribute__ ((packed));
/*

2
kernel/sched/fair.c
View File

@@ -8633,7 +8633,7 @@ static int detach_tasks(struct lb_env *env)
case migrate_util:
util = task_util_est(p);
if (util > env->imbalance)
if (shr_bound(util, env->sd->nr_balance_failed) > env->imbalance)
goto next;
env->imbalance -= util;