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arm64: dts: rockchip: rk1808: assigned-clock-parents for clk_32k_ioe

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set 32k as input mode:
  assigned-clocks = <&cru SCLK_32K_IOE>;
  assigned-clock-parents = <&xin32k>;
set 32k as output mode:
  assigned-clocks = <&cru SCLK_32K_IOE>;
  assigned-clock-parents = <&cru SCLK_RTC32K_PMU>;

Change-Id: Iaebd0a8b8b882c42b800dd3fba9ff5a597c966ae
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Elaine Zhang
2019-03-07 14:57:43 +08:00
committed by Tao Huang
parent 8d550430b6
commit 5684cddad9
1 changed files with 6 additions and 2 deletions
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8
arch/arm64/boot/dts/rockchip/rk1808.dtsi
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@@ -632,16 +632,20 @@
compatible = "rockchip,rk1808-cru";
reg = <0x0 0xff350000 0x0 0x5000>;
rockchip,grf = <&grf>;
rockchip,pmugrf = <&pmugrf>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks =
<&cru SCLK_32K_IOE>,
<&cru PLL_GPLL>, <&cru PLL_CPLL>,
<&cru PLL_PPLL>, <&cru ARMCLK>,
<&cru MSCLK_PERI>, <&cru LSCLK_PERI>,
<&cru HSCLK_BUS_PRE>, <&cru MSCLK_BUS_PRE>,
<&cru LSCLK_BUS_PRE>;
assigned-clock-parents = <&xin32k>;
assigned-clock-rates =
<32768>,
<1188000000>, <1000000000>,
<100000000>, <816000000>,
<200000000>, <100000000>,
@@ -2965,12 +2969,12 @@
xin32k {
clkin_32k: clkin-32k {
rockchip,pins =
<0 RK_PC2 1 &pcfg_input_smt>;
<0 RK_PC2 1 &pcfg_pull_none>;
};
clkout_32k: clkout-32k {
rockchip,pins =
<0 RK_PC2 1 &pcfg_output_high>;
<0 RK_PC2 1 &pcfg_pull_none>;
};
};
};