shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-06 02:50:49 +09:00
Code Issues Packages Projects Releases Wiki Activity

phy: rockchip: naneng-combphy: Tuning usb3 Tx for rv1126b

Browse Source 
This patch tuning rv1126b usb3 Tx signal for compliance
far end test.

1. Set Tx Full Txswing and Txmargin 1200mV.
2. Set Tx De-emphasis -6dB.

Change-Id: I641e806a7dfc6f3f7d3b280543950c19410f733e
Signed-off-by: William Wu <william.wu@rock-chips.com>
This commit is contained in:
William Wu
2025-06-25 09:20:36 +08:00
committed by Tao Huang
parent 1f92ff4692
commit 59200fb8bf
1 changed files with 4 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
View File

@@ -1487,6 +1487,10 @@ static int rv1126b_combphy_cfg(struct rockchip_combphy_priv *priv)
/* Set Rx squelch input filler bandwidth */
writel(0x0e, priv->mmio + (0x14 << 2));
/* Set Full Txswing and Txmargin 1200mV and -6dB De-emphasis */
regmap_write(priv->phy_grf, 0x1800c, GENMASK(18, 16) | 0x0007);
regmap_write(priv->phy_grf, 0x18004, GENMASK(26, 21) | 0x0100);
rockchip_combphy_param_write(priv->phy_grf, &cfg->pipe_sel_usb, true);
rockchip_combphy_param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false);
rockchip_combphy_param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false);