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arm64: dts: rockchip: rk3566-box: fix combphy1 ref-clk to 100MHz

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Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: I2808f908d087843aba7c4c0fd769b7c80518c022
This commit is contained in:
Ren Jianing
2021-03-16 18:10:19 +08:00
committed by Tao Huang
parent 365de1ccfa
commit 5bdeec86b6
1 changed files with 2 additions and 0 deletions
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arch/arm64/boot/dts/rockchip/rk3566-box-demo-v10.dtsi
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@@ -125,6 +125,8 @@
};
&combphy1_usq {
assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;
assigned-clock-rates = <100000000>;
status = "okay";
};