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Merge commit '927ec427493fb894ed3ca7a17174cb7ddcbc7dba'

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* commit '927ec427493fb894ed3ca7a17174cb7ddcbc7dba':
  pwm: rockchip: Add &rockchip_pwm_chip.oneshot_valid to indicate validity of configurations
  pwm: rockchip: Add comments for why to add delay before disabling the dclk for PWM v4
  input: touchscreen: hyn: reduce logs
  input: touchscreen: gt1x: disable async probe for multi-TP
  drm/rockchip: dw-dp: config traninig done flag when enable uboot logo
  media: rockchip: isp: support unite mode for isp35
  arm64: dts: rockchip: rk3576: Modify the pinctrl configuration of pmic_pins
  ARM: dts: rockchip: add rv1126b-evb1-v11-dual-4k.dts
  arm64: dts: rockchip: add rv1126b-evb1-v11-dual-4k.dts
  ARM: dts: rockchip: add rv1126b-evb1-v11.dts
  arm64: dts: rockchip: add rv1126b-evb1-v11.dts
  arm64: dts: rockchip: Add rv1126b-evb1-v12.dtsi
  ARM: configs: rv1126b: Enable CONFIG_ROCKCHIP_OPP default
  ARM: configs: rv1126b-aov.config: disabled ethernet
  ARM: configs: rockchip: rename rv1126b-wakeup.config to rv1126b-aov.config
  media: i2c: ov50c40: set 4k@15 for debug when cphy mode

Change-Id: If4735a7724e108de19e1299f8c338c219084a980
This commit is contained in:
Tao Huang
2025-07-03 15:55:37 +08:00
parent b5148371b7 927ec42749
commit 5bec73b422
29 changed files with 361 additions and 91 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/Makefile
View File

@@ -1183,6 +1183,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rv1126b-evb1-v10-fastboot-spi-nand.dtb \
rv1126b-evb1-v10-fastboot-spi-nor.dtb \
rv1126b-evb1-v10-spi-nor.dtb \
rv1126b-evb1-v11.dtb \
rv1126b-evb1-v11-dual-4k.dtb \
rv1126b-evb2-v10.dtb \
rv1126b-evb2-v10-mcu-k350c4516t.dtb \
rv1126b-evb2-v10-rgb-Q7050ITH2641AA1T.dtb \

6
arch/arm/boot/dts/rv1126b-evb1-v11-dual-4k.dts Normal file
View File

@@ -0,0 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2025 Rockchip Electronics Co., Ltd.
*/
#include "arm64/rockchip/rv1126b-evb1-v11-dual-4k.dts"

6
arch/arm/boot/dts/rv1126b-evb1-v11.dts Normal file
View File

@@ -0,0 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2025 Rockchip Electronics Co., Ltd.
*/
#include "arm64/rockchip/rv1126b-evb1-v11.dts"

3
arch/arm/configs/rv1126b-wakeup.config → arch/arm/configs/rv1126b-aov.config
View File

@@ -1,5 +1,8 @@
# CONFIG_ETHERNET is not set
CONFIG_EXTCON=y
CONFIG_INPUT=y
# CONFIG_MDIO_DEVICE is not set
# CONFIG_PHYLIB is not set
CONFIG_SND_SOC_RK_DSM=y
CONFIG_VIDEO_CAM_SLEEP_WAKEUP=y
# CONFIG_CHARGER_BQ24190 is not set

2
arch/arm/configs/rv1126b-cvr-fastboot.config
View File

@@ -28,7 +28,6 @@ CONFIG_RK_DMABUF_PROCFS=y
CONFIG_ROCKCHIP_DVBM=y
CONFIG_ROCKCHIP_HW_DECOMPRESS=y
CONFIG_ROCKCHIP_MULTI_RGA=y
CONFIG_ROCKCHIP_OPP=y
CONFIG_ROCKCHIP_RAMDISK=y
CONFIG_ROCKCHIP_RGA_PROC_FS=y
CONFIG_ROCKCHIP_THUNDER_BOOT=y
@@ -921,6 +920,7 @@ CONFIG_TOUCHSCREEN_GT1X=y
# CONFIG_TOUCHSCREEN_HIDEEP is not set
# CONFIG_TOUCHSCREEN_HIMAX_CHIPSET is not set
# CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set
# CONFIG_TOUCHSCREEN_HYN is not set
# CONFIG_TOUCHSCREEN_ILI210X is not set
# CONFIG_TOUCHSCREEN_ILITEK is not set
# CONFIG_TOUCHSCREEN_IMAGIS is not set

1
arch/arm/configs/rv1126b-cvr.config
View File

@@ -31,7 +31,6 @@ CONFIG_RK_CMA_PROCFS=y
CONFIG_RK_DMABUF_PROCFS=y
CONFIG_RK_MEMBLOCK_PROCFS=y
CONFIG_ROCKCHIP_DEBUG=y
CONFIG_ROCKCHIP_OPP=y
CONFIG_ROCKCHIP_RGA_PROC_FS=y
CONFIG_ROCKCHIP_VENDOR_STORAGE=y
CONFIG_SND_SOC_DUMMY_CODEC=y

2
arch/arm/configs/rv1126b-evb.config
View File

@@ -31,7 +31,6 @@ CONFIG_RK_CMA_PROCFS=y
CONFIG_RK_DMABUF_PROCFS=y
CONFIG_RK_MEMBLOCK_PROCFS=y
CONFIG_ROCKCHIP_DEBUG=y
CONFIG_ROCKCHIP_OPP=y
CONFIG_ROCKCHIP_RGA_PROC_FS=y
CONFIG_ROCKCHIP_VENDOR_STORAGE=y
CONFIG_SND_SOC_DUMMY_CODEC=y
@@ -843,6 +842,7 @@ CONFIG_TOUCHSCREEN_GT1X=y
# CONFIG_TOUCHSCREEN_HIDEEP is not set
# CONFIG_TOUCHSCREEN_HIMAX_CHIPSET is not set
# CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set
# CONFIG_TOUCHSCREEN_HYN is not set
# CONFIG_TOUCHSCREEN_ILI210X is not set
# CONFIG_TOUCHSCREEN_ILITEK is not set
# CONFIG_TOUCHSCREEN_IMAGIS is not set

1
arch/arm/configs/rv1126b-fastboot.config
View File

@@ -22,7 +22,6 @@ CONFIG_RK_DMABUF_PROCFS=y
CONFIG_ROCKCHIP_DVBM=y
CONFIG_ROCKCHIP_HW_DECOMPRESS=y
CONFIG_ROCKCHIP_MULTI_RGA=y
CONFIG_ROCKCHIP_OPP=y
CONFIG_ROCKCHIP_RAMDISK=y
CONFIG_ROCKCHIP_RGA_PROC_FS=y
CONFIG_ROCKCHIP_THUNDER_BOOT=y

1
arch/arm/configs/rv1126b-ipc.config
View File

@@ -4,7 +4,6 @@ CONFIG_MSDOS_PARTITION=y
CONFIG_MTD_BLOCK=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_ROCKCHIP_OPP=y
CONFIG_ROCKCHIP_RGA_PROC_FS=y
CONFIG_SPI=y
CONFIG_VFAT_FS=y

1
arch/arm/configs/rv1126b_defconfig
View File

@@ -175,6 +175,7 @@ CONFIG_ROCKCHIP_IOMMU=y
CONFIG_CPU_RV1126B=y
CONFIG_ROCKCHIP_AMP=y
CONFIG_ROCKCHIP_CPUINFO=y
CONFIG_ROCKCHIP_OPP=y
CONFIG_ROCKCHIP_PM_DOMAINS=y
CONFIG_ROCKCHIP_SYSTEM_MONITOR=y
CONFIG_FIQ_DEBUGGER=y

2
arch/arm64/boot/dts/rockchip/Makefile
View File

@@ -384,6 +384,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v10-fastboot-emmc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v10-fastboot-spi-nand.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v10-fastboot-spi-nor.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v10-spi-nor.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v11.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb1-v11-dual-4k.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb2-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb2-v10-aov-dual-cam.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb2-v10-mcu-k350c4516t.dtb

2
arch/arm64/boot/dts/rockchip/rk3576-pinctrl.dtsi
View File

@@ -5482,7 +5482,7 @@
pmic_pins: pmic-pins {
rockchip,pins =
/* pmic_int */
<0 RK_PA6 9 &pcfg_pull_up>,
<0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
/* pmic_sleep */
<0 RK_PA4 9 &pcfg_pull_none>;
};

12
arch/arm64/boot/dts/rockchip/rv1126b-evb1-v11-dual-4k.dts Normal file
View File

@@ -0,0 +1,12 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2025 Rockchip Electronics Co., Ltd.
*/
#include "rv1126b-evb1-v10-dual-4k.dts"
#include "rv1126b-evb1-v11.dtsi"
/ {
model = "Rockchip RV1126B EVB1 V11 DUAL 4K Board";
compatible = "rockchip,rv1126b-evb1-v11-dual-4k", "rockchip,rv1126b";
};

12
arch/arm64/boot/dts/rockchip/rv1126b-evb1-v11.dts Normal file
View File

@@ -0,0 +1,12 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2025 Rockchip Electronics Co., Ltd.
*/
#include "rv1126b-evb1-v10.dts"
#include "rv1126b-evb1-v11.dtsi"
/ {
model = "Rockchip RV1126B EVB1 V11 Board";
compatible = "rockchip,rv1126b-evb1-v11", "rockchip,rv1126b";
};

143
arch/arm64/boot/dts/rockchip/rv1126b-evb1-v12.dtsi Normal file
View File

@@ -0,0 +1,143 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2025 Rockchip Electronics Co., Ltd.
*
*/
#include "rv1126b-evb1-v11.dtsi"
/delete-node/ &vccio_sd;
/delete-node/ &vdd_npu;
/delete-node/ &rk801;
/ {
model = "Rockchip RV1126B EVB1 V12 Board";
compatible = "rockchip,rv1126b-evb1-v12", "rockchip,rv1126b";
vdd_cpu: vdd-cpu {
compatible = "pwm-regulator";
pwms = <&pwm0_8ch_0 0 25000 1>;
regulator-name = "vdd_cpu";
regulator-init-microvolt = <950000>;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-boot-on;
pwm-supply = <&vcc5v0_sys>;
};
};
&i2c0 {
status = "okay";
rk801: rk801@27 {
compatible = "rockchip,rk801";
status = "okay";
reg = <0x27>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PC0 IRQ_TYPE_LEVEL_LOW>;
pwrctrl-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default", "pmic-reset";
pinctrl-0 = <&pmic_int>;
pinctrl-1 = <&soc_pwrctrl_reset>;
rockchip,system-power-controller;
wakeup-source;
vcc1-supply = <&vcc12v_dcin>;
vcc2-supply = <&vcc12v_dcin>;
vcc3-supply = <&vcc5v0_sys>;
vcc4-supply = <&vcc5v0_sys>;
vcc5-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
regulators {
vdd_npu: DCDC_REG1 {
regulator-name = "vdd_npu";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1500000>;
regulator-initial-mode = <0x1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-mode = <0x2>;
regulator-off-in-suspend;
regulator-suspend-microvolt = <950000>;
};
};
vcc3v3_sys: DCDC_REG2 {
regulator-name = "vcc3v3_sys";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-initial-mode = <0x1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-mode = <0x2>;
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-mode = <0x2>;
regulator-on-in-suspend;
};
};
vdd_logic: DCDC_REG4 {
regulator-name = "vdd_logic";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1500000>;
regulator-initial-mode = <0x1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-mode = <0x2>;
regulator-off-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vccio_sd: LDO_REG1 {
regulator-name = "vccio_sd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcc_1v8: LDO_REG2 {
regulator-name = "vcc_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcc_3v3: SWITCH_REG {
regulator-name = "vcc_3v3";
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
};
};
};

2
drivers/gpu/drm/rockchip/dw-dp.c
View File

@@ -3294,6 +3294,8 @@ static void _dw_dp_loader_protect(struct dw_dp *dp, bool on)
extcon_set_state_sync(dp->audio->extcon, EXTCON_DISP_DP, true);
dw_dp_audio_handle_plugged_change(dp->audio, true);
phy_power_on(dp->phy);
link->train.clock_recovered = true;
link->train.channel_equalized = true;
} else {
phy_power_off(dp->phy);
extcon_set_state_sync(dp->audio->extcon, EXTCON_DISP_DP, false);

2
drivers/input/touchscreen/gt1x/gt1x.c
View File

@@ -795,7 +795,9 @@ static struct i2c_driver gt1x_ts_driver = {
#if !defined(CONFIG_FB) && !defined(CONFIG_HAS_EARLYSUSPEND) && defined(CONFIG_PM)
.pm = &gt1x_ts_pm_ops,
#endif
#if !IS_REACHABLE(CONFIG_TOUCHSCREEN_HYN)
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
#endif
},
};

17
drivers/input/touchscreen/hyn/hyn_core.c
View File

@@ -17,6 +17,7 @@
#include "hyn_core.h"
#define HYN_DRIVER_NAME "hyn_ts"
u8 hyn_log_level;
static struct hyn_ts_data *hyn_data = NULL;
static const struct hyn_ts_fuc* hyn_fun = NULL;
static const struct of_device_id hyn_of_match_table[] = {
@@ -88,14 +89,14 @@ static int hyn_parse_dt(struct hyn_ts_data *ts_data)
if (IS_ERR(dt->reset_gpio)) {
ret = PTR_ERR(dt->reset_gpio);
HYN_ERROR("failed to request reset GPIO: %d\n", ret);
return -EPROBE_DEFER;
return ret;
}
dt->irq_gpio = devm_gpiod_get(dev, "irq", GPIOD_ASIS);
if (IS_ERR(dt->irq_gpio)) {
ret = PTR_ERR(dt->irq_gpio);
HYN_ERROR("failed to request irq GPIO: %d\n", ret);
return -EPROBE_DEFER;
return ret;
}
//pin_ctl
ret =-1;
@@ -680,7 +681,7 @@ static int hyn_ts_probe(struct spi_device *client)
ts_data->bus_type = bus_type;
ts_data->rp_buf.key_id = 0xFF;
ts_data->work_mode = NOMAL_MODE;
ts_data->log_level = 0;
hyn_log_level = 0;
hyn_data = ts_data;
ts_data->client = client;
@@ -869,7 +870,7 @@ static int hyn_ts_remove(struct spi_device *client)
hyn_esdcheck_switch(ts_data,DISABLE);
destroy_workqueue(ts_data->hyn_workqueue);
}
HYN_INFO("ts_remove1");
HYN_INFO2("ts_remove1");
#if (HYN_APK_DEBUG_EN)
hyn_tool_fs_exit();
#endif
@@ -878,11 +879,11 @@ static int hyn_ts_remove(struct spi_device *client)
hyn_gesture_exit(ts_data);
#endif
hyn_release_sysfs(ts_data);
HYN_INFO("ts_remove2");
HYN_INFO2("ts_remove2");
if (!IS_ERR_OR_NULL(ts_data->input_dev)) {
input_unregister_device(ts_data->input_dev);
}
HYN_INFO("ts_remove3");
HYN_INFO2("ts_remove3");
#if 0
#if defined(CONFIG_FB)
fb_unregister_client(&ts_data->fb_notif);
@@ -904,7 +905,7 @@ static int hyn_ts_remove(struct spi_device *client)
if (!IS_ERR_OR_NULL(ts_data->plat_data.vdd_i2c)) {
regulator_put(ts_data->plat_data.vdd_i2c);
}
HYN_INFO("ts_remove4");
HYN_INFO2("ts_remove4");
#if (I2C_USE_DMA==2)
if (!IS_ERR_OR_NULL(ts_data->dma_buff_va)) {
dma_free_coherent(NULL, 2048, ts_data->dma_buff_va, ts_data->dma_buff_pa);
@@ -912,7 +913,7 @@ static int hyn_ts_remove(struct spi_device *client)
#endif
kfree(ts_data);
hyn_data = NULL;
HYN_INFO("ts_remove5");
HYN_INFO2("ts_remove5");
}
#if KERNEL_VERSION(6, 1, 0) > LINUX_VERSION_CODE
return 0;

11
drivers/input/touchscreen/hyn/hyn_core.h
View File

@@ -87,12 +87,13 @@
// #define __noscs __attribute__((__no_sanitize__("shadow-call-stack")))
extern u8 hyn_log_level;
#define HYN_INFO(fmt, args...) printk(KERN_INFO "[HYN]"fmt"\n", ##args)
#define HYN_INFO2(fmt, args...) if(hyn_data->log_level > 0)printk(KERN_INFO "[HYN]"fmt"\n", ##args)
#define HYN_INFO3(fmt, args...) if(hyn_data->log_level > 1)printk(KERN_INFO "[HYN]"fmt"\n", ##args)
#define HYN_INFO4(fmt, args...) if(hyn_data->log_level > 2)printk(KERN_INFO "[HYN]"fmt"\n", ##args)
#define HYN_ERROR(fmt, args...) printk(KERN_ERR "[HYN][Error]%s:"fmt"\n",__func__,##args)
#define HYN_ENTER() printk(KERN_ERR "[HYN][enter]%s\n",__func__)
#define HYN_INFO2(fmt, args...) if (hyn_log_level > 0) printk(KERN_INFO "[HYN]"fmt"\n", ##args)
#define HYN_INFO3(fmt, args...) if (hyn_log_level > 1) printk(KERN_INFO "[HYN]"fmt"\n", ##args)
#define HYN_INFO4(fmt, args...) if (hyn_log_level > 2) printk(KERN_INFO "[HYN]"fmt"\n", ##args)
#define HYN_ERROR(fmt, args...) printk(KERN_ERR "[HYN][Error]%s:"fmt"\n", __func__, ##args)
#define HYN_ENTER() HYN_INFO2("[enter]%s\n", __func__)
#if HYN_GKI_VER
// MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver);

2
drivers/input/touchscreen/hyn/hyn_lib/hyn_fs_node.c
View File

@@ -160,7 +160,7 @@ static ssize_t hyn_dbg_store(struct device *dev,struct device_attribute *attr,c
}
else if(0 == strcmp(str,"log")){
hyn_get_word(&next_ptr,str);
hyn_fs_data->log_level = (u8)(str[0]-'0');
hyn_log_level = (u8)(str[0]-'0');
}
else if(0 == strcmp(str,"workmode")){
ret = hyn_get_word(&next_ptr,str);

4
drivers/media/i2c/ov50c40.c
View File

@@ -3914,6 +3914,7 @@ static const struct regval ov50c40_10bit_8192x6144_dphy_12fps_regs[] = {
{REG_NULL, 0x00},
};
#ifdef DEBUG
static const struct regval ov50c40_10bit_4096x3072_cphy_regs[] = {
{0x0103, 0x01},
{0x0301, 0xc0},
@@ -4504,6 +4505,7 @@ static const struct regval ov50c40_10bit_4096x3072_cphy_regs[] = {
{0x5d45, 0x05},
{REG_NULL, 0x00},
};
#endif
static const struct regval ov50c40_10bit_4096x3072_cphy_30fps_regs[] = {
{0x0103, 0x01},
@@ -5828,6 +5830,7 @@ static const struct ov50c40_mode supported_modes_dphy[] = {
};
static const struct ov50c40_mode supported_modes_cphy[] = {
#ifdef DEBUG
{
.bus_fmt = MEDIA_BUS_FMT_SGBRG10_1X10,
.width = 4096,
@@ -5846,6 +5849,7 @@ static const struct ov50c40_mode supported_modes_cphy[] = {
.spd = &ov50c40_spd,
.vc[PAD0] = 0,
},
#endif
{
.bus_fmt = MEDIA_BUS_FMT_SGBRG10_1X10,
.width = 4096,

28
drivers/media/platform/rockchip/isp/capture.c
View File

@@ -744,11 +744,12 @@ struct capture_fmt *find_fmt(struct rkisp_stream *stream, const u32 pixelfmt)
}
static void restrict_rsz_resolution(struct rkisp_stream *stream,
const struct stream_config *cfg,
u32 dest_w, u32 dest_h,
struct v4l2_rect *max_rsz)
{
struct rkisp_device *dev = stream->ispdev;
struct v4l2_rect *input_win = rkisp_get_isp_sd_win(&dev->isp_sdev);
const struct stream_config *cfg = stream->config;
if (stream->id == RKISP_STREAM_VIR ||
stream->id == RKISP_STREAM_LDC ||
@@ -769,14 +770,24 @@ static void restrict_rsz_resolution(struct rkisp_stream *stream,
max_rsz->width = ALIGN(DIV_ROUND_UP(input_win->width, div), 4);
max_rsz->height = DIV_ROUND_UP(input_win->height, div);
} else if (dev->hw_dev->unite) {
} else if (dev->unite_div > ISP_UNITE_DIV1) {
/* scale down only for unite mode */
max_rsz->width = min_t(int, input_win->width, cfg->max_rsz_width);
max_rsz->height = min_t(int, input_win->height, cfg->max_rsz_height);
if (dest_w == input_win->width && dest_h == input_win->height) {
max_rsz->width = dest_w;
max_rsz->height = dest_h;
} else {
max_rsz->width = min_t(int, input_win->width, cfg->max_rsz_width);
max_rsz->height = min_t(int, input_win->height, cfg->max_rsz_height);
}
} else {
/* scale up/down */
max_rsz->width = cfg->max_rsz_width;
max_rsz->height = cfg->max_rsz_height;
if (dest_w == input_win->width && dest_h == input_win->height) {
max_rsz->width = dest_w;
max_rsz->height = dest_h;
} else {
max_rsz->width = cfg->max_rsz_width;
max_rsz->height = cfg->max_rsz_height;
}
}
}
@@ -817,7 +828,7 @@ static int rkisp_set_fmt(struct rkisp_stream *stream,
}
/* do checks on resolution */
restrict_rsz_resolution(stream, config, &max_rsz);
restrict_rsz_resolution(stream, pixm->width, pixm->height, &max_rsz);
if (stream->id == RKISP_STREAM_MP ||
stream->id == RKISP_STREAM_SP ||
(stream->id == RKISP_STREAM_BP && dev->isp_ver != ISP_V30)) {
@@ -1087,7 +1098,6 @@ static int rkisp_enum_framesizes(struct file *file, void *prov,
struct v4l2_frmsizeenum *fsize)
{
struct rkisp_stream *stream = video_drvdata(file);
const struct stream_config *config = stream->config;
struct v4l2_frmsize_stepwise *s = &fsize->stepwise;
struct v4l2_frmsize_discrete *d = &fsize->discrete;
struct rkisp_device *dev = stream->ispdev;
@@ -1100,7 +1110,7 @@ static int rkisp_enum_framesizes(struct file *file, void *prov,
if (!find_fmt(stream, fsize->pixel_format))
return -EINVAL;
restrict_rsz_resolution(stream, config, &max_rsz);
restrict_rsz_resolution(stream, 0, 0, &max_rsz);
if (stream->out_isp_fmt.fmt_type == FMT_BAYER ||
stream->id == RKISP_STREAM_FBC ||

32
drivers/media/platform/rockchip/isp/capture_v35.c
View File

@@ -760,6 +760,32 @@ static void update_mi(struct rkisp_stream *stream)
rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT, false);
}
if (dev->unite_div == ISP_UNITE_DIV4) {
/* left bottom of image */
reg = stream->config->mi.y_base_ad_init;
val = stream->next_buf->buff_addr[RKISP_PLANE_Y];
val += (out_fmt->plane_fmt[0].bytesperline * out_fmt->height / 2);
rkisp_idx_write(dev, reg, val, ISP_UNITE_LEFT_B, false);
reg = stream->config->mi.cb_base_ad_init;
val = stream->next_buf->buff_addr[RKISP_PLANE_CB];
val += (out_fmt->plane_fmt[1].sizeimage / 2);
rkisp_idx_write(dev, reg, val, ISP_UNITE_LEFT_B, false);
/* right bottom of image */
reg = stream->config->mi.y_base_ad_init;
val = stream->next_buf->buff_addr[RKISP_PLANE_Y];
val += (out_fmt->plane_fmt[0].bytesperline * out_fmt->height / 2) +
((out_fmt->width / div) & ~0xf);
rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT_B, false);
reg = stream->config->mi.cb_base_ad_init;
val = stream->next_buf->buff_addr[RKISP_PLANE_CB];
val += (out_fmt->plane_fmt[1].sizeimage / 2) +
((out_fmt->width / div) & ~0xf);
rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT_B, false);
}
if (stream->is_pause) {
/* single sensor mode with pingpong buffer:
* if mi on, addr will auto update at frame end
@@ -1618,6 +1644,8 @@ static int rkisp_stream_init(struct rkisp_device *dev, u32 id)
strscpy(vdev->name, SP_VDEV_NAME, sizeof(vdev->name));
stream->ops = &rkisp_sp_streams_ops;
stream->config = &rkisp_sp_stream_cfg;
if (dev->hw_dev->unite)
stream->config->max_rsz_width *= 2;
break;
case RKISP_STREAM_VIR:
strscpy(vdev->name, VIR_VDEV_NAME, sizeof(vdev->name));
@@ -1629,6 +1657,10 @@ static int rkisp_stream_init(struct rkisp_device *dev, u32 id)
strscpy(vdev->name, MP_VDEV_NAME, sizeof(vdev->name));
stream->ops = &rkisp_mp_streams_ops;
stream->config = &rkisp_mp_stream_cfg;
if (dev->hw_dev->unite) {
stream->config->max_rsz_width = CIF_ISP_INPUT_W_MAX_V35_UNITE;
stream->config->max_rsz_height = CIF_ISP_INPUT_H_MAX_V35_UNITE;
}
}
rockit_isp_ops.rkisp_stream_start = rkisp_stream_start;

5
drivers/media/platform/rockchip/isp/isp_sditf.c
View File

@@ -184,10 +184,7 @@ static long rkisp_sditf_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *ar
rkisp_check_idle(sditf->isp, ISP_FRAME_VPSS);
break;
case RKISP_VPSS_GET_UNITE_MODE:
if (sditf->isp->unite_div == ISP_UNITE_DIV2)
*(unsigned int *)arg = sditf->isp->unite_div;
else
*(unsigned int *)arg = 0;
*(unsigned int *)arg = sditf->isp->unite_div - 1;
break;
case RKISP_VPSS_GET_ISP_WORKING:
*(int *)arg = sditf->isp->hw_dev->is_runing;

18
drivers/media/platform/rockchip/isp/isp_stats_v35.c
View File

@@ -629,17 +629,17 @@ rkisp_stats_send_meas(struct rkisp_isp_stats_vdev *stats_vdev)
cur_stat_buf = cur_buf->vaddr[0];
}
/* buffer done when frame of right handle */
if (dev->unite_div > ISP_UNITE_DIV1) {
if (dev->unite_index == ISP_UNITE_LEFT) {
cur_buf = NULL;
is_dummy = false;
} else if (cur_stat_buf) {
cur_stat_buf = (void *)cur_stat_buf + size / 2;
}
if (dev->unite_index > ISP_UNITE_LEFT && cur_stat_buf)
cur_stat_buf = (void *)cur_stat_buf + size / dev->unite_div * dev->unite_index;
if ((dev->unite_div == ISP_UNITE_DIV2 && dev->unite_index != ISP_UNITE_RIGHT) ||
(dev->unite_div == ISP_UNITE_DIV4 && dev->unite_index != ISP_UNITE_RIGHT_B)) {
cur_buf = NULL;
is_dummy = false;
}
if (dev->unite_div < ISP_UNITE_DIV2 || dev->unite_index == ISP_UNITE_RIGHT) {
if (dev->unite_div < ISP_UNITE_DIV2 ||
(dev->unite_div == ISP_UNITE_DIV2 && dev->unite_index == ISP_UNITE_RIGHT) ||
(dev->unite_div == ISP_UNITE_DIV4 && dev->unite_index == ISP_UNITE_RIGHT_B)) {
/* config buf for next frame */
stats_vdev->cur_buf = NULL;
if (stats_vdev->nxt_buf) {

10
drivers/media/platform/rockchip/isp/procfs.c
View File

@@ -1377,14 +1377,16 @@ static int isp_show(struct seq_file *p, void *v)
info, sdev->dbg.frameloss,
dev->rdbk_cnt, dev->rdbk_cnt_x1, dev->rdbk_cnt_x2, dev->rdbk_cnt_x3,
rkisp_stream_buf_cnt(stream));
seq_printf(p, "\t hw link:%d idle:%d vir(mode:%d index:%d)\n",
seq_printf(p, "\t hw link:%d idle:%d vir(mode:%d index:%d) div:%d extend:%d\n",
dev->hw_dev->dev_link_num, dev->hw_dev->is_idle,
dev->multi_mode, dev->multi_index);
dev->multi_mode, dev->multi_index, dev->unite_div,
dev->hw_dev->unite_extend_pixel);
} else {
seq_printf(p, "%-10s frame:%d state:%s %s v-blank:%dus\n",
seq_printf(p, "%-10s frame:%d state:%s %s v-blank:%dus div:%d extend:%d\n",
"Isp online", sdev->dbg.id,
(dev->isp_state & ISP_FRAME_END) ? "idle" : "working",
info, sdev->dbg.delay / 1000);
info, sdev->dbg.delay / 1000,
dev->unite_div, dev->hw_dev->unite_extend_pixel);
}
if (dev->br_dev.en)
seq_printf(p, "%-10s rkispp%d Format:%s%s Size:%dx%d (frame:%d rate:%dms frameloss:%d)\n",

99
drivers/media/platform/rockchip/isp/rkisp.c
View File

@@ -241,8 +241,10 @@ int rkisp_align_sensor_resolution(struct rkisp_device *dev,
CIF_ISP_INPUT_H_MAX_V33_UNITE : CIF_ISP_INPUT_H_MAX_V33;
break;
case ISP_V35:
max_w = CIF_ISP_INPUT_W_MAX_V35;
max_h = CIF_ISP_INPUT_H_MAX_V35;
max_w = dev->hw_dev->unite ?
CIF_ISP_INPUT_W_MAX_V35_UNITE : CIF_ISP_INPUT_W_MAX_V35;
max_h = dev->hw_dev->unite ?
CIF_ISP_INPUT_H_MAX_V35_UNITE : CIF_ISP_INPUT_H_MAX_V35;
break;
default:
max_w = CIF_ISP_INPUT_W_MAX;
@@ -2980,6 +2982,58 @@ err:
return -EINVAL;
}
static int rkisp_unite_div(struct rkisp_device *dev, u32 w, u32 h)
{
struct rkisp_hw_dev *hw = dev->hw_dev;
u32 max_size, max_w, max_h;
dev->unite_div = ISP_UNITE_DIV1;
if (hw->unite == ISP_UNITE_TWO && hw->isp_ver == ISP_V30) {
dev->unite_div = ISP_UNITE_DIV2;
return 0;
}
switch (dev->isp_ver) {
case ISP_V30:
max_size = CIF_ISP_INPUT_W_MAX_V30 * CIF_ISP_INPUT_H_MAX_V30;
max_w = CIF_ISP_INPUT_W_MAX_V30;
max_h = max_size / w;
break;
case ISP_V32:
max_size = CIF_ISP_INPUT_W_MAX_V32 * CIF_ISP_INPUT_H_MAX_V32;
max_w = CIF_ISP_INPUT_W_MAX_V32;
max_h = max_size / w;
break;
case ISP_V32_L:
max_size = CIF_ISP_INPUT_W_MAX_V32_L * CIF_ISP_INPUT_H_MAX_V32_L;
max_w = CIF_ISP_INPUT_W_MAX_V32_L;
max_h = max_size / w;
break;
case ISP_V33:
max_size = CIF_ISP_INPUT_W_MAX_V33 * CIF_ISP_INPUT_H_MAX_V33;
max_w = CIF_ISP_INPUT_W_MAX_V33;
max_h = max_size / w;
break;
case ISP_V35:
max_size = CIF_ISP_INPUT_W_MAX_V35 * CIF_ISP_INPUT_H_MAX_V35;
max_w = CIF_ISP_INPUT_W_MAX_V35;
max_h = CIF_ISP_INPUT_H_MAX_V35;
break;
case ISP_V39:
max_size = CIF_ISP_INPUT_W_MAX_V39_UNITE / 2 * CIF_ISP_INPUT_H_MAX_V39_UNITE;
max_w = CIF_ISP_INPUT_W_MAX_V39;
max_h = max_size / w;
break;
default:
return -EINVAL;
}
if (w * h > max_size * 2 || h > max_h)
dev->unite_div = ISP_UNITE_DIV4;
else if (w * h > max_size || w > max_w)
dev->unite_div = ISP_UNITE_DIV2;
return 0;
}
static void rkisp_isp_sd_try_crop(struct v4l2_subdev *sd,
struct v4l2_rect *crop,
u32 pad)
@@ -2987,8 +3041,6 @@ static void rkisp_isp_sd_try_crop(struct v4l2_subdev *sd,
struct rkisp_isp_subdev *isp_sd = sd_to_isp_sd(sd);
struct rkisp_device *dev = sd_to_isp_dev(sd);
struct v4l2_rect in_crop = isp_sd->in_crop;
struct rkisp_hw_dev *hw = dev->hw_dev;
u32 size;
crop->left = ALIGN(crop->left, 2);
crop->width = ALIGN(crop->width, 2);
@@ -2997,38 +3049,7 @@ static void rkisp_isp_sd_try_crop(struct v4l2_subdev *sd,
/* update sensor info if sensor link be changed */
rkisp_update_sensor_info(dev);
rkisp_align_sensor_resolution(dev, crop, true);
if (hw->unite == ISP_UNITE_TWO && hw->isp_ver == ISP_V30) {
dev->unite_div = ISP_UNITE_DIV2;
} else {
dev->unite_div = ISP_UNITE_DIV1;
switch (dev->isp_ver) {
case ISP_V30:
size = CIF_ISP_INPUT_W_MAX_V30 * CIF_ISP_INPUT_H_MAX_V30;
break;
case ISP_V32:
size = CIF_ISP_INPUT_W_MAX_V32 * CIF_ISP_INPUT_H_MAX_V32;
break;
case ISP_V32_L:
size = CIF_ISP_INPUT_W_MAX_V32_L * CIF_ISP_INPUT_H_MAX_V32_L;
break;
case ISP_V33:
size = CIF_ISP_INPUT_W_MAX_V33 * CIF_ISP_INPUT_H_MAX_V33;
break;
case ISP_V35:
size = CIF_ISP_INPUT_W_MAX_V35 * CIF_ISP_INPUT_H_MAX_V35;
break;
case ISP_V39:
size = CIF_ISP_INPUT_W_MAX_V39_UNITE * CIF_ISP_INPUT_H_MAX_V39_UNITE;
size /= 2;
break;
default:
return;
}
if (crop->width * crop->height > size * 2)
dev->unite_div = ISP_UNITE_DIV4;
else if (crop->width * crop->height > size)
dev->unite_div = ISP_UNITE_DIV2;
}
rkisp_unite_div(dev, crop->width, crop->height);
} else if (pad == RKISP_ISP_PAD_SOURCE_PATH) {
crop->left = clamp_t(u32, crop->left, 0, in_crop.width);
crop->top = clamp_t(u32, crop->top, 0, in_crop.height);
@@ -3105,8 +3126,10 @@ static int rkisp_isp_sd_get_selection(struct v4l2_subdev *sd,
CIF_ISP_INPUT_H_MAX_V33_UNITE : CIF_ISP_INPUT_H_MAX_V33;
break;
case ISP_V35:
max_w = CIF_ISP_INPUT_W_MAX_V35;
max_h = CIF_ISP_INPUT_H_MAX_V35;
max_w = dev->hw_dev->unite ?
CIF_ISP_INPUT_W_MAX_V35_UNITE : CIF_ISP_INPUT_W_MAX_V35;
max_h = dev->hw_dev->unite ?
CIF_ISP_INPUT_H_MAX_V35_UNITE : CIF_ISP_INPUT_H_MAX_V35;
break;
case ISP_V39:
max_w = dev->hw_dev->unite ?

2
drivers/media/platform/rockchip/isp/rkisp.h
View File

@@ -73,6 +73,8 @@
#define CIF_ISP_INPUT_H_MAX_V33_UNITE 2160
#define CIF_ISP_INPUT_W_MAX_V35 4096
#define CIF_ISP_INPUT_H_MAX_V35 3072
#define CIF_ISP_INPUT_W_MAX_V35_UNITE 7168
#define CIF_ISP_INPUT_H_MAX_V35_UNITE 5120
#define CIF_ISP_INPUT_W_MIN 272
#define CIF_ISP_INPUT_H_MIN 264
#define CIF_ISP_OUTPUT_W_MAX CIF_ISP_INPUT_W_MAX

24
drivers/pwm/pwm-rockchip.c
View File

@@ -321,6 +321,7 @@ struct rockchip_pwm_chip {
unsigned long is_clk_enabled;
bool vop_pwm_en; /* indicate voppwm mirror register state */
bool center_aligned;
bool oneshot_valid;
bool oneshot_en;
bool capture_en;
bool wave_en;
@@ -561,7 +562,7 @@ static void rockchip_pwm_config_v1(struct pwm_chip *chip, struct pwm_device *pwm
ctrl &= ~PWM_CLK_SEL_MASK;
ctrl |= PWM_SEL_SCALED_CLOCK;
pc->oneshot_en = true;
pc->oneshot_valid = true;
ctrl &= ~PWM_MODE_MASK;
ctrl |= PWM_ONESHOT;
@@ -584,7 +585,7 @@ static void rockchip_pwm_config_v1(struct pwm_chip *chip, struct pwm_device *pwm
dev_err(chip->dev, "Oneshot_count must be between 1 and %d.\n",
pc->data->oneshot_cnt_max);
pc->oneshot_en = false;
pc->oneshot_valid = false;
ctrl &= ~PWM_MODE_MASK;
ctrl |= PWM_CONTINUOUS;
@@ -651,7 +652,7 @@ static int rockchip_pwm_enable_v1(struct pwm_chip *chip, struct pwm_device *pwm,
val |= PWM_OUTPUT_CENTER;
}
if (pc->oneshot_en) {
if (pc->oneshot_valid) {
enable_conf &= ~PWM_MODE_MASK;
enable_conf |= PWM_ONESHOT;
} else if (pc->capture_en) {
@@ -679,6 +680,8 @@ static int rockchip_pwm_enable_v1(struct pwm_chip *chip, struct pwm_device *pwm,
if (!enable)
clk_disable(pc->clk);
pc->oneshot_en = pc->oneshot_valid ? enable : false;
return 0;
}
@@ -830,17 +833,17 @@ static void rockchip_pwm_config_v4(struct pwm_chip *chip, struct pwm_device *pwm
state->duty_cycle, state->period);
}
pc->oneshot_en = true;
pc->oneshot_valid = true;
} else {
if (state->oneshot_count)
dev_err(chip->dev, "Oneshot_count must be between 1 and %d.\n",
pc->data->oneshot_cnt_max);
pc->oneshot_en = false;
pc->oneshot_valid = false;
}
#endif
if (pc->oneshot_en) {
if (pc->oneshot_valid) {
writel_relaxed(PWM_MODE(ONESHOT_MODE) | PWM_ALIGNED_INVALID(true),
pc->base + CTRL_V4);
writel_relaxed(offset, pc->base + OFFSET);
@@ -873,13 +876,20 @@ static int rockchip_pwm_enable_v4(struct pwm_chip *chip, struct pwm_device *pwm,
writel_relaxed(PWM_EN(enable) | PWM_CLK_EN(enable), pc->base + ENABLE);
if (!enable) {
/*
* For pwm v4, the disable operation of continuous mode, which sets polarity
* to inactive state, will not take effect until the end of current period.
* Therefore, it makes sense to delay one period before disabling the dclk.
*/
if (!enable && !pc->oneshot_en) {
pwm_get_state(pwm, &curstate);
delay_us = DIV_ROUND_UP_ULL(curstate.period, NSEC_PER_USEC);
fsleep(delay_us);
clk_disable(pc->clk);
}
pc->oneshot_en = pc->oneshot_valid ? enable : false;
return 0;
}