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arm: dts: rockchip: rk312x: remove PLL_CPLL set in cru

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cpll just for display no need to init. init will result in dispaly error
in next-dev uboot

Change-Id: Ie63c8d44aa6b54fb81abfb3a32d71995b8426c7d
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
This commit is contained in:
Wu Liangqing
2018-08-24 14:44:47 +08:00
committed by Tao Huang
parent c58b89505f
commit 5e89a41104
1 changed files with 2 additions and 2 deletions
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4
arch/arm/boot/dts/rk312x.dtsi
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@@ -820,11 +820,11 @@
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
assigned-clocks = <&cru PLL_GPLL>,
<&cru ACLK_CPU>, <&cru HCLK_CPU>,
<&cru PCLK_CPU>, <&cru ACLK_PERI>,
<&cru HCLK_PERI>, <&cru PCLK_PERI>;
assigned-clock-rates = <594000000>, <400000000>,
assigned-clock-rates = <594000000>,
<300000000>, <150000000>,
<75000000>, <300000000>,
<150000000>, <75000000>;