misc: rk628: optimize summary information

add and optimize information: bus_format, flag, clk, real_clk

For the rx side, clk is the actual frequency of the set clk_rx_read,
and real_clk is the actual clock frequency given by the detected
front end (which hdmirx sets into src_mode->clock).

For the tx side, clk is the set dst_mode->clock and real_clk is the
actual frequency of the set sclk_vop.

Type: Fix
Redmine ID: N/A
Associated modifications: N/A
Test:
    console:/ # cat /d/rk628/5-0050/summary
    input: HDMI
        Display mode: 3840x2160p60  bus_format: YUV444
            clk[594000] real_clk[594000] flag[5]
            H: 3840 4016 4100 4400
            V: 2160 2168 2178 2250
    output: GVI
        Display mode: 3840x2160p60  bus_format: RGB
            clk[594000] real_clk[594000] flag[a]
            H: 3840 4016 4100 4400
            V: 2160 2168 2178 2250
    csc:
            csc[1], csc mode:BT709L_13BIT
    system:
            sw_hsync_pol:1, sw_vsync_pol:1
            dsp_frame_h_start:0, dsp_frame_v_start:5

Signed-off-by: Zhibin Huang <zhibin.huang@rock-chips.com>
Change-Id: Ibb312aefeee68a6c882294e221b0ce9b3b3b6f98

drivers/misc/rk628/rk628.c

@@ -30,6 +30,7 @@
 #include "rk628_csi.h"
 #include "rk628_hdmitx.h"
 #include "rk628_efuse.h"
+#include "rk628_config.h"
 
 static const struct regmap_range rk628_cru_readable_ranges[] = {
 	regmap_reg_range(CRU_CPLL_CON0, CRU_CPLL_CON4),
@@ -909,11 +910,12 @@ static void rk628_show_resolution(struct seq_file *s)
 	struct rk628_display_mode *src_mode = &rk628->src_mode;
 	u32 src_hactive, src_hs_start, src_hs_end, src_htotal;
 	u32 src_vactive, src_vs_start, src_vs_end, src_vtotal;
-	u32 clk_rx_read;
+	u32 src_dclk, clk_rx_read;
 	u32 fps;
+	const char *bus_format_s;
 
 	/* get timing */
-	clk_rx_read = src_mode->clock;
+	src_dclk = src_mode->clock;
 	src_hactive = src_mode->hdisplay;
 	src_hs_start = src_mode->hsync_start;
 	src_hs_end = src_mode->hsync_end;
@@ -924,11 +926,17 @@ static void rk628_show_resolution(struct seq_file *s)
 	src_vtotal = src_mode->vtotal;
 
 	/* get fps */
-	fps = clk_rx_read * 1000 / (src_htotal * src_vtotal);
+	fps = src_dclk * 1000 / (src_htotal * src_vtotal);
+
+	clk_rx_read = rk628_cru_clk_get_rate(rk628, CGU_CLK_RX_READ) / 1000;
+
+	bus_format_s = rk628_get_input_bus_format_name(rk628);
 
 	/* print */
-	DEBUG_PRINT("    Display mode: %dx%dp%d,dclk[%u]\n", src_hactive,
-		    src_vactive, fps, clk_rx_read);
+	DEBUG_PRINT("    Display mode: %dx%dp%d  bus_format: %s\n",
+		    src_hactive, src_vactive, fps, bus_format_s);
+	DEBUG_PRINT("\tclk[%u] real_clk[%u] flag[%x]\n",
+		    clk_rx_read, src_dclk, src_mode->flags);
 	DEBUG_PRINT("\tH: %d %d %d %d\n", src_hactive, src_hs_start, src_hs_end,
 		    src_htotal);
 	DEBUG_PRINT("\tV: %d %d %d %d\n", src_vactive, src_vs_start, src_vs_end,
@@ -938,15 +946,18 @@ static void rk628_show_resolution(struct seq_file *s)
 static void rk628f_show_rgbrx_resolution(struct seq_file *s)
 {
 	struct rk628 *rk628 = s->private;
+	struct rk628_display_mode *src_mode = &rk628->src_mode;
 	u32 val;
 
-	u64 clk_rx_read;
+	u64 src_dclk;
+	u32 clk_rx_read;
 	u64 imodet_clk;
 	u32 rgb_rx_eval_time, rgb_rx_clkrate;
 
 	u16 src_hactive = 0, src_vactive = 0;
 	u16 src_htotal, src_vtotal;
 	u32 fps;
+	const char *bus_format_s;
 
 	/* get clk rgbrx read */
 	rk628_i2c_read(rk628, GRF_RGB_RX_DBG_MEAS0, &val);
@@ -957,9 +968,9 @@ static void rk628f_show_rgbrx_resolution(struct seq_file *s)
 
 	imodet_clk = rk628_cru_clk_get_rate(rk628, CGU_CLK_IMODET);
 
-	clk_rx_read = imodet_clk * rgb_rx_clkrate;
-	do_div(clk_rx_read, rgb_rx_eval_time + 1);
-	do_div(clk_rx_read, 1000);
+	src_dclk = imodet_clk * rgb_rx_clkrate;
+	do_div(src_dclk, rgb_rx_eval_time + 1);
+	do_div(src_dclk, 1000);
 
 	/* get timing */
 	if (rk628_input_is_rgb(rk628)) {
@@ -979,11 +990,17 @@ static void rk628f_show_rgbrx_resolution(struct seq_file *s)
 	src_vtotal = val & 0xffff;
 
 	/* get fps */
-	fps = clk_rx_read * 1000 / (src_htotal * src_vtotal);
+	fps = src_dclk * 1000 / (src_htotal * src_vtotal);
+
+	clk_rx_read = rk628_cru_clk_get_rate(rk628, CGU_CLK_RX_READ) / 1000;
+
+	bus_format_s = rk628_get_input_bus_format_name(rk628);
 
 	/* print */
-	DEBUG_PRINT("    Display mode: %dx%dp%d,dclk[%llu]\n", src_hactive,
-		    src_vactive, fps, clk_rx_read);
+	DEBUG_PRINT("    Display mode: %dx%dp%d  bus_format: %s\n",
+		    src_hactive, src_vactive, fps, bus_format_s);
+	DEBUG_PRINT("\tclk[%u] real_clk[%llu] flag[%x]\n",
+		    clk_rx_read, src_dclk, src_mode->flags);
 	DEBUG_PRINT("\tH-total: %d\n", src_htotal);
 	DEBUG_PRINT("\tV-total: %d\n", src_vtotal);
 }
@@ -1002,11 +1019,13 @@ static void rk628_show_input_resolution(struct seq_file *s)
 static void rk628_show_output_resolution(struct seq_file *s)
 {
 	struct rk628 *rk628 = s->private;
+	struct rk628_display_mode *dst_mode = &rk628->dst_mode;
 	u32 val;
 	u64 sclk_vop;
 	u32 dsp_htotal, dsp_hs_end, dsp_hact_st, dsp_hact_end;
 	u32 dsp_vtotal, dsp_vs_end, dsp_vact_st, dsp_vact_end;
 	u32 fps;
+	const char *bus_format_s;
 
 	/* get sclk_vop */
 	sclk_vop = rk628_cru_clk_get_rate(rk628, CGU_SCLK_VOP);
@@ -1032,10 +1051,14 @@ static void rk628_show_output_resolution(struct seq_file *s)
 	/* get fps */
 	fps = sclk_vop * 1000 / (dsp_vtotal * dsp_htotal);
 
+	bus_format_s = rk628_get_output_bus_format_name(rk628);
+
 	/* print */
-	DEBUG_PRINT("    Display mode: %dx%dp%d,dclk[%llu]\n",
+	DEBUG_PRINT("    Display mode: %dx%dp%d  bus_format: %s\n",
 		    dsp_hact_end - dsp_hact_st, dsp_vact_end - dsp_vact_st, fps,
-		    sclk_vop);
+		    bus_format_s);
+	DEBUG_PRINT("\tclk[%u] real_clk[%llu] flag[%x]\n",
+		    dst_mode->clock, sclk_vop, dst_mode->flags);
 	DEBUG_PRINT("\tH: %d %d %d %d\n", dsp_hact_end - dsp_hact_st,
 		    dsp_htotal - dsp_hact_st,
 		    dsp_htotal - dsp_hact_st + dsp_hs_end, dsp_htotal);
@@ -1048,10 +1071,11 @@ static void rk628_show_csc_info(struct seq_file *s)
 {
 	struct rk628 *rk628 = s->private;
 	u32 val;
-	bool r2y, y2r;
+	bool r2y, y2r, csc;
 	char csc_mode_r2y_s[10];
 	char csc_mode_y2r_s[10];
-	u32 csc;
+	const char *csc_mode_s;
+	u32 mode;
 	enum csc_mode {
 		BT601_L,
 		BT709_L,
@@ -1060,11 +1084,14 @@ static void rk628_show_csc_info(struct seq_file *s)
 	};
 
 	rk628_i2c_read(rk628, GRF_CSC_CTRL_CON, &val);
-	r2y = ((val & 0x10) == 0x10);
-	y2r = ((val & 0x1) == 0x1);
+	r2y = ((val & BIT(4)) == BIT(4));
+	y2r = ((val & BIT(0)) == BIT(0));
+	csc = ((val & BIT(11)) == BIT(11));
 
-	csc = (val & 0xc0) >> 6;
-	switch (csc) {
+	DEBUG_PRINT("csc:\n");
+
+	mode = (val & 0xc0) >> 6;
+	switch (mode) {
 	case BT601_L:
 		strcpy(csc_mode_r2y_s, "BT601_L");
 		break;
@@ -1079,8 +1106,8 @@ static void rk628_show_csc_info(struct seq_file *s)
 		break;
 	}
 
-	csc = (val & 0xc) >> 2;
-	switch (csc) {
+	mode = (val & 0xc) >> 2;
+	switch (mode) {
 	case BT601_L:
 		strcpy(csc_mode_y2r_s, "BT601_L");
 		break;
@@ -1093,14 +1120,16 @@ static void rk628_show_csc_info(struct seq_file *s)
 	case BT2020:
 		strcpy(csc_mode_y2r_s, "BT2020");
 		break;
-
 	}
-	DEBUG_PRINT("csc:\n");
+
+	csc_mode_s = rk628_post_process_get_csc_mode_name(rk628);
 
 	if (r2y)
-		DEBUG_PRINT("\tr2y[1],csc mode:%s\n", csc_mode_r2y_s);
+		DEBUG_PRINT("\tr2y[1], csc mode: %s\n", csc_mode_r2y_s);
 	else if (y2r)
-		DEBUG_PRINT("\ty2r[1],csc mode:%s\n", csc_mode_y2r_s);
+		DEBUG_PRINT("\ty2r[1], csc mode: %s\n", csc_mode_y2r_s);
+	else if (csc)
+		DEBUG_PRINT("\tcsc[1], csc mode: %s\n", csc_mode_s);
 	else
 		DEBUG_PRINT("\tnot open\n");
 }

drivers/misc/rk628/rk628.h

@@ -571,6 +571,7 @@ struct rk628 {
 	struct rk628_display_mode dst_mode;
 	enum bus_format input_fmt;
 	enum bus_format output_fmt;
+	u32 csc_mode;
 	struct rk628_dsi dsi0;
 	struct rk628_dsi dsi1;
 	struct rk628_lvds lvds;

drivers/misc/rk628/rk628_config.c

@@ -7,6 +7,14 @@
 
 #include "rk628_config.h"
 
+static const char * const bus_format_str[] = {
+	"RGB",
+	"YUV422",
+	"YUV444",
+	"YUV420",
+	"UNKNOWN",
+};
+
 struct rk628_display_mode *rk628_display_get_src_mode(struct rk628 *rk628)
 {
 	return &rk628->src_mode;
@@ -41,6 +49,11 @@ enum bus_format rk628_get_input_bus_format(struct rk628 *rk628)
 	return rk628->input_fmt;
 }
 
+const char *rk628_get_input_bus_format_name(struct rk628 *rk628)
+{
+	return bus_format_str[rk628->input_fmt];
+}
+
 void rk628_set_output_bus_format(struct rk628 *rk628, enum bus_format format)
 {
 	rk628->output_fmt = format;
@@ -50,3 +63,8 @@ enum bus_format rk628_get_output_bus_format(struct rk628 *rk628)
 {
 	return rk628->output_fmt;
 }
+
+const char *rk628_get_output_bus_format_name(struct rk628 *rk628)
+{
+	return bus_format_str[rk628->output_fmt];
+}

drivers/misc/rk628/rk628_config.h

@@ -17,8 +17,9 @@ void rk628_mode_copy(struct rk628_display_mode *to, struct rk628_display_mode *f
 
 void rk628_set_input_bus_format(struct rk628 *rk628, enum bus_format format);
 enum bus_format rk628_get_input_bus_format(struct rk628 *rk628);
+const char *rk628_get_input_bus_format_name(struct rk628 *rk628);
 void rk628_set_output_bus_format(struct rk628 *rk628, enum bus_format format);
 enum bus_format rk628_get_output_bus_format(struct rk628 *rk628);
+const char *rk628_get_output_bus_format_name(struct rk628 *rk628);
 
 #endif
-

drivers/misc/rk628/rk628_post_process.c

@@ -967,6 +967,17 @@ enum vop_csc_format {
 	CSC_BT2020F_13BIT,
 };
 
+static const char * const vop_csc_format_str[] = {
+	"BT601L",
+	"BT709L",
+	"BT601F",
+	"BT2020",
+	"BT709L_13BIT",
+	"BT709F_13BIT",
+	"BT2020L_13BIT",
+	"BT2020F_13BIT",
+};
+
 enum vop_csc_mode {
 	CSC_RGB,
 	CSC_YUV,
@@ -1527,7 +1538,6 @@ static void rk628_post_process_csc(struct rk628 *rk628)
 	struct post_csc_coef csc_coef = {};
 	bool is_input_yuv, is_output_yuv;
 	u32 color_space = V4L2_COLORSPACE_DEFAULT;
-	u32 csc_mode;
 	u32 val;
 	int range_type;
 
@@ -1553,11 +1563,11 @@ static void rk628_post_process_csc(struct rk628 *rk628)
 		else if (out_fmt == BUS_FMT_RGB)
 			rk628_i2c_write(rk628, GRF_CSC_CTRL_CON, SW_Y2R_EN(1));
 	} else {
-		csc_mode = vop2_convert_csc_mode(color_space, CSC_13BIT_DEPTH);
+		rk628->csc_mode = vop2_convert_csc_mode(color_space, CSC_13BIT_DEPTH);
 
 		is_input_yuv = !is_rgb_format(in_fmt);
 		is_output_yuv = !is_rgb_format(out_fmt);
-		rockchip_calc_post_csc(&csc_coef, csc_mode, is_input_yuv, is_output_yuv);
+		rockchip_calc_post_csc(&csc_coef, rk628->csc_mode, is_input_yuv, is_output_yuv);
 
 		val = ((csc_coef.csc_coef01 & 0xffff) << 16) | (csc_coef.csc_coef00 & 0xffff);
 		rk628_i2c_write(rk628, GRF_CSC_MATRIX_COE01_COE00, val);
@@ -1587,6 +1597,11 @@ static void rk628_post_process_csc(struct rk628 *rk628)
 	}
 }
 
+const char *rk628_post_process_get_csc_mode_name(struct rk628 *rk628)
+{
+	return vop_csc_format_str[rk628->csc_mode];
+}
+
 void rk628_post_process_enable(struct rk628 *rk628)
 {
 	rk628_cru_clk_adjust(rk628);

drivers/misc/rk628/rk628_post_process.h

@@ -12,4 +12,5 @@ void rk628_post_process_init(struct rk628 *rk628);
 void rk628_post_process_enable(struct rk628 *rk628);
 void rk628_post_process_disable(struct rk628 *rk628);
 void rk628_post_process_create_debugfs_file(struct rk628 *rk628);
+const char *rk628_post_process_get_csc_mode_name(struct rk628 *rk628);
 #endif