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60a6e19c71
add and optimize information: bus_format, flag, clk, real_clk
For the rx side, clk is the actual frequency of the set clk_rx_read,
and real_clk is the actual clock frequency given by the detected
front end (which hdmirx sets into src_mode->clock).
For the tx side, clk is the set dst_mode->clock and real_clk is the
actual frequency of the set sclk_vop.
Type: Fix
Redmine ID: N/A
Associated modifications: N/A
Test:
console:/ # cat /d/rk628/5-0050/summary
input: HDMI
Display mode: 3840x2160p60 bus_format: YUV444
clk[594000] real_clk[594000] flag[5]
H: 3840 4016 4100 4400
V: 2160 2168 2178 2250
output: GVI
Display mode: 3840x2160p60 bus_format: RGB
clk[594000] real_clk[594000] flag[a]
H: 3840 4016 4100 4400
V: 2160 2168 2178 2250
csc:
csc[1], csc mode:BT709L_13BIT
system:
sw_hsync_pol:1, sw_vsync_pol:1
dsp_frame_h_start:0, dsp_frame_v_start:5
Signed-off-by: Zhibin Huang <zhibin.huang@rock-chips.com>
Change-Id: Ibb312aefeee68a6c882294e221b0ce9b3b3b6f98
Linux kernel
============
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several of them using the Restructured Text markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
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