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ARM: dts: add rk3229 3nod full function board
In the 3nod full function board, there are some pins is multiplexed (such as: PWM0/2, SDMMC, IR and SPDIF). So we need create two DT files rk3229-at-3nod.dts and rk3229-at-3nod-func.dts. In the rk3229-at-3nod, these pins be iomux to gpio. In the rk3229-at-3nod-func, these pins be iomux to function pins. Change-Id: I369dabc4dceb25023ab97b74e12cfef058e522d1 Signed-off-by: Bin Yang <yangbin@rock-chips.com>
This commit is contained in:
@@ -130,3 +130,11 @@ Rockchip platforms device tree bindings
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- Rockchip PX30 evb ddr4 board:
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Required root node properties:
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- compatible = "rockchip,px30-evb-ddr4-v10", "rockchip,px30";
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- Rockchip android things full function board:
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Required root node properties:
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- compatible = "rockchip,rk3229-at-3nod", "rockchip,rk3229";
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- Rockchip android things full function board:
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Required root node properties:
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- compatible = "rockchip,rk3229-at-3nod-func", "rockchip,rk3229";
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@@ -523,6 +523,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rk3128-fireprime.dtb \
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rk3188-radxarock.dtb \
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rk3228-evb.dtb \
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rk3229-at-3nod.dtb \
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rk3229-at-3nod-func.dtb \
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rk3229-at-gva.dtb \
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rk3229-echo-v10.dtb \
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rk3229-evb.dtb \
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210
arch/arm/boot/dts/rk3229-at-3nod-func.dts
Normal file
210
arch/arm/boot/dts/rk3229-at-3nod-func.dts
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@@ -0,0 +1,210 @@
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/*
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* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: (GPL-2.0+ OR MIT).
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*/
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/dts-v1/;
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#include "rk3229-at-som.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "RK3229 ANDROID THINGS Full Function Board";
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compatible = "rockchip,rk3229-at-3nod-func", "rockchip,rk3229";
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gpio_keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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autorepeat;
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pinctrl-names = "default";
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pinctrl-0 = <&pwr_key>;
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power_key {
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label = "GPIO Key Power";
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gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
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linux,code = <116>;
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debounce-interval = <100>;
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wakeup-source;
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};
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&rk805 1>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* GPIO3_B7 */
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};
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vcc_sd: vcc-sd {
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compatible = "regulator-fixed";
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gpio = <&gpio1 14 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc_sd_h>;
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regulator-name = "vcc_sd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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wireless-bluetooth {
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compatible = "bluetooth-platdata";
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clocks = <&rk805 1>;
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clock-names = "ext_clock";
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uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default", "rts_gpio";
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pinctrl-0 = <&uart11_rts>;
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pinctrl-1 = <&uart11_rts_gpio>;
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BT,reset_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
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BT,wake_gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>;
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BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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wireless-wlan {
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compatible = "wlan-platdata";
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rockchip,grf = <&grf>;
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wifi_chip_type = "ap6255";
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WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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};
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&emmc {
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/*
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* enable emmc ddr mode, choose the
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* according parameter base on the emmc
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* io voltage.
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*/
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mmc-ddr-1_8v;
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status = "okay";
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};
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&gpu {
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status = "okay";
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};
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&nandc {
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status = "disabled";
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};
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&pinctrl {
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pinctrl-names = "default";
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pinctrl-0 = <&fixed_gpio>;
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keys {
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pwr_key: pwr-key {
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rockchip,pins = <3 23 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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sdio-pwrseq {
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wifi_enable_h: wifi-enable-h {
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rockchip,pins = <3 15 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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vcc-sd {
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vcc_sd_h: vcc-sd-h {
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rockchip,pins = <1 14 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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sdmmc {
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sdmmc_cd: sdmmc-cd {
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rockchip,pins =
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<1 17 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
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};
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};
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};
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&pwm0 {
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status = "okay";
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};
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&pwm2 {
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status = "okay";
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};
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&pwm3 {
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status = "okay";
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>;
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compatible = "rockchip,remotectl-pwm";
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remote_pwm_id = <3>;
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handle_cpu_id = <1>;
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remote_support_psci = <1>;
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ir_key1 {
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rockchip,usercode = <0x4040>;
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rockchip,key_table =
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<0xf2 KEY_REPLY>,
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<0xba KEY_BACK>,
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<0xf4 KEY_UP>,
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<0xf1 KEY_DOWN>,
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<0xef KEY_LEFT>,
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<0xee KEY_RIGHT>,
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<0xbd KEY_HOME>,
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<0xea KEY_VOLUMEUP>,
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<0xe3 KEY_VOLUMEDOWN>,
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<0xe2 KEY_SEARCH>,
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<0xb2 KEY_POWER>,
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<0xbc KEY_MUTE>,
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<0xec KEY_MENU>,
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<0xbf 0x190>,
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<0xe0 0x191>,
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<0xe1 0x192>,
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<0xe9 183>,
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<0xe6 248>,
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<0xe8 185>,
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<0xe7 186>,
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<0xf0 388>,
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<0xbe 0x175>;
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};
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};
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&reboot_mode {
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/delete-property/ mode-bootloader;
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};
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&sdio {
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max-frequency = <150000000>;
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mmc-pwrseq = <&sdio_pwrseq>;
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num-slots = <1>;
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sd-uhs-sdr104;
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status = "okay";
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};
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&sdmmc {
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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card-detect-delay = <200>;
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disable-wp;
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max-frequency = <50000000>;
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num-slots = <1>;
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supports-sd;
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vmmc-supply = <&vcc_sd>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4 &sdmmc_cd>;
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status = "okay";
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};
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&vop {
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assigned-clocks = <&cru DCLK_VOP>;
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assigned-clock-parents = <&cru HDMIPHY>;
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status = "okay";
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};
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&vop_mmu {
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status = "okay";
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};
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132
arch/arm/boot/dts/rk3229-at-3nod.dts
Normal file
132
arch/arm/boot/dts/rk3229-at-3nod.dts
Normal file
@@ -0,0 +1,132 @@
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/*
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* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: (GPL-2.0+ OR MIT).
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*/
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/dts-v1/;
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#include "rk3229-at-som.dtsi"
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/ {
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model = "RK3229 ANDROID THINGS Full Function Board";
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compatible = "rockchip,rk3229-at-3nod", "rockchip,rk3229";
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gpio_keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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autorepeat;
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pinctrl-names = "default";
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pinctrl-0 = <&pwr_key>;
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power_key {
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label = "GPIO Key Power";
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gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
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linux,code = <116>;
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debounce-interval = <100>;
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wakeup-source;
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};
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&rk805 1>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* GPIO3_B7 */
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};
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wireless-bluetooth {
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compatible = "bluetooth-platdata";
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clocks = <&rk805 1>;
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clock-names = "ext_clock";
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uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default", "rts_gpio";
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pinctrl-0 = <&uart11_rts>;
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pinctrl-1 = <&uart11_rts_gpio>;
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BT,reset_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
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BT,wake_gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>;
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BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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wireless-wlan {
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compatible = "wlan-platdata";
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rockchip,grf = <&grf>;
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wifi_chip_type = "ap6255";
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WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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};
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&emmc {
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/*
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* enable emmc ddr mode, choose the
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* according parameter base on the emmc
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* io voltage.
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*/
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mmc-ddr-1_8v;
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status = "okay";
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};
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&gpu {
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status = "okay";
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};
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&nandc {
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status = "disabled";
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};
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&pinctrl {
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pinctrl-names = "default";
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/*
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* sdmmc, pwm0, pwm2, ir, and spdif pins are defaultly set as gpio,
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* if you want to enable it, please remove below besides fixed_gpio.
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*/
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pinctrl-0 = <&sdmmc_gpio &pwm0_gpio &pwm2_gpio
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&ir_gpio &spdif_gpio &fixed_gpio>;
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keys {
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pwr_key: pwr-key {
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rockchip,pins = <3 23 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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sdio-pwrseq {
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wifi_enable_h: wifi-enable-h {
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rockchip,pins = <3 15 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&reboot_mode {
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/delete-property/ mode-bootloader;
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};
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&sdio {
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max-frequency = <150000000>;
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mmc-pwrseq = <&sdio_pwrseq>;
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num-slots = <1>;
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sd-uhs-sdr104;
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status = "okay";
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};
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&vop {
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assigned-clocks = <&cru DCLK_VOP>;
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assigned-clock-parents = <&cru HDMIPHY>;
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status = "okay";
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};
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&vop_mmu {
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status = "okay";
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};
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