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arm64: dts: rockchip: rk3588s: Fix jpege clock dependency

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Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I4586266e1ad40c47ff34f8207d2ad9055e821e10
This commit is contained in:
Herman Chen
2021-12-29 16:08:16 +08:00
committed by Tao Huang
parent 0f83f6cfe8
commit 61d69a619d
1 changed files with 8 additions and 8 deletions
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16
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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@@ -2170,10 +2170,10 @@
reg = <0x0 0xfdba0000 0x0 0x400>;
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_jpege0";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clocks = <&cru ACLK_JPEG_ENCODER0>, <&cru HCLK_JPEG_ENCODER0>;
clock-names = "aclk_vcodec", "hclk_vcodec";
rockchip,normal-rates = <594000000>, <0>;
assigned-clocks = <&cru ACLK_VPU>;
assigned-clocks = <&cru ACLK_JPEG_ENCODER0>;
assigned-clock-rates = <594000000>;
resets = <&cru SRST_A_JPEG_ENCODER0>, <&cru SRST_H_JPEG_ENCODER0>;
reset-names = "video_a", "video_h";
@@ -2202,10 +2202,10 @@
reg = <0x0 0xfdba4000 0x0 0x400>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_jpege1";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clocks = <&cru ACLK_JPEG_ENCODER1>, <&cru HCLK_JPEG_ENCODER1>;
clock-names = "aclk_vcodec", "hclk_vcodec";
rockchip,normal-rates = <594000000>, <0>;
assigned-clocks = <&cru ACLK_VPU>;
assigned-clocks = <&cru ACLK_JPEG_ENCODER1>;
assigned-clock-rates = <594000000>;
resets = <&cru SRST_A_JPEG_ENCODER1>, <&cru SRST_H_JPEG_ENCODER1>;
reset-names = "video_a", "video_h";
@@ -2234,10 +2234,10 @@
reg = <0x0 0xfdba8000 0x0 0x400>;
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_jpege2";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clocks = <&cru ACLK_JPEG_ENCODER2>, <&cru HCLK_JPEG_ENCODER2>;
clock-names = "aclk_vcodec", "hclk_vcodec";
rockchip,normal-rates = <594000000>, <0>;
assigned-clocks = <&cru ACLK_VPU>;
assigned-clocks = <&cru ACLK_JPEG_ENCODER2>;
assigned-clock-rates = <594000000>;
resets = <&cru SRST_A_JPEG_ENCODER2>, <&cru SRST_H_JPEG_ENCODER2>;
reset-names = "video_a", "video_h";
@@ -2266,10 +2266,10 @@
reg = <0x0 0xfdbac000 0x0 0x400>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_jpege3";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clocks = <&cru ACLK_JPEG_ENCODER3>, <&cru HCLK_JPEG_ENCODER3>;
clock-names = "aclk_vcodec", "hclk_vcodec";
rockchip,normal-rates = <594000000>, <0>;
assigned-clocks = <&cru ACLK_VPU>;
assigned-clocks = <&cru ACLK_JPEG_ENCODER3>;
assigned-clock-rates = <594000000>;
resets = <&cru SRST_A_JPEG_ENCODER3>, <&cru SRST_H_JPEG_ENCODER3>;
reset-names = "video_a", "video_h";