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drm/rockchip: vop2: Fix mipi pin/dclk polarity register defination

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Change-Id: Id674f00590e3f257b82620fb517d215fb56402f4
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
This commit is contained in:
Andy Yan
2020-11-09 16:53:16 +08:00
parent 8b4a004041
commit 64d0859286
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
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@@ -888,8 +888,8 @@ static const struct vop2_ctrl rk3568_vop_ctrl = {
.hdmi_dclk_pol = VOP_REG(RK3568_DSP_IF_POL, 0x1, 7),
.edp_pin_pol = VOP_REG(RK3568_DSP_IF_POL, 0x3, 12),
.edp_dclk_pol = VOP_REG(RK3568_DSP_IF_POL, 0x1, 15),
.mipi_dclk_pol = VOP_REG(RK3568_DSP_IF_POL, 0x7, 16),
.mipi_pin_pol = VOP_REG(RK3568_DSP_IF_POL, 0x1, 19),
.mipi_pin_pol = VOP_REG(RK3568_DSP_IF_POL, 0x7, 16),
.mipi_dclk_pol = VOP_REG(RK3568_DSP_IF_POL, 0x1, 19),
.win_vp_id[0] = VOP_REG(RK3568_OVL_PORT_SEL, 0x3, 16),
.win_vp_id[1] = VOP_REG(RK3568_OVL_PORT_SEL, 0x3, 18),
.win_vp_id[2] = VOP_REG(RK3568_OVL_PORT_SEL, 0x3, 24),