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arm64: dts: rockchip: rk3588: remove scmi_spll init

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SPLL has been set in SPL and UBOOT.
Kernel resetting causes mipi display jitter.

Note: If without Uboot, SPLL needs to be set in advance.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I59475ce1ea7712069e6c4a445a432d77f19227d5
This commit is contained in:
Elaine Zhang
2021-12-09 11:42:11 +08:00
committed by Tao Huang
parent c82b5d3677
commit 690f783013
1 changed files with 0 additions and 3 deletions
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arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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@@ -616,9 +616,6 @@
scmi_clk: protocol@14 {
reg = <0x14>;
#clock-cells = <1>;
assigned-clocks = <&scmi_clk SCMI_SPLL>;
assigned-clock-rates = <700000000>;
};
scmi_reset: protocol@16 {