PCI: rockchip: limit PCIe accessors within 1MB cfg space

PCIe spec requires max cfg space size is 4KB, and the hierarchy
of PCIe tree only support up to 256 devices. So the reserved
cfg space for RC is 1MB per spec.

If any callers access the cfg space out of range, the spec asks
PCIe RC kick back 0xffffffff. However, Rockchip RC will crash
if this happens. So the software should manually check the ECAM
size in PCIe accessors to workaround it.

Change-Id: If4d40add229f9c315eab6d99b290766695208daf
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
This commit is contained in:
Shawn Lin
2019-03-22 17:20:45 +08:00
committed by Tao Huang
parent a4ccde21f5
commit 6c49045c29

View File

@@ -385,7 +385,7 @@ static int rockchip_pcie_rd_other_conf(struct rockchip_pcie *rockchip,
busdev = PCIE_ECAM_ADDR(bus->number, PCI_SLOT(devfn),
PCI_FUNC(devfn), where);
if (!IS_ALIGNED(busdev, size)) {
if (!IS_ALIGNED(busdev, size) || busdev >= SZ_1M) {
*val = 0;
return PCIBIOS_BAD_REGISTER_NUMBER;
}
@@ -411,7 +411,7 @@ static int rockchip_pcie_wr_other_conf(struct rockchip_pcie *rockchip,
busdev = PCIE_ECAM_ADDR(bus->number, PCI_SLOT(devfn),
PCI_FUNC(devfn), where);
if (!IS_ALIGNED(busdev, size))
if (!IS_ALIGNED(busdev, size) || busdev >= SZ_1M)
return PCIBIOS_BAD_REGISTER_NUMBER;
if (size == 4)