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arm64: dts: rockchip: rk3588s: Add i2s/pdm/spdifrx/spdiftx nodes
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Change-Id: Ia967e33488241e509283bb4732d4651dbc069515
This commit is contained in:
Sugar Zhang
@@ -582,6 +582,194 @@
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status = "disabled";
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};
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spdif_tx2: spdif-tx@fddb0000 {
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compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
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reg = <0x0 0xfddb0000 0x0 0x1000>;
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interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac1 6>;
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dma-names = "tx";
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clock-names = "mclk", "hclk";
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clocks = <&cru MCLK_SPDIF2_DP0>, <&cru HCLK_SPDIF2_DP0>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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spdif_tx5: spdif-tx@fddb8000 {
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compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
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reg = <0x0 0xfddb8000 0x0 0x1000>;
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interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac1 22>;
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dma-names = "tx";
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clock-names = "mclk", "hclk";
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clocks = <&cru MCLK_SPDIF5_DP1>, <&cru HCLK_SPDIF5_DP1>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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i2s4_8ch: i2s@fddc0000 {
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compatible = "rockchip,rk3588-i2s-tdm";
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reg = <0x0 0xfddc0000 0x0 0x1000>;
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interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_I2S4_8CH_TX>, <&cru HCLK_I2S4_8CH>;
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clock-names = "mclk_tx", "hclk";
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dmas = <&dmac2 0>;
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dma-names = "tx";
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resets = <&cru SRST_M_I2S4_8CH_TX>;
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reset-names = "tx-m";
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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i2s8_8ch: i2s@fddc8000 {
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compatible = "rockchip,rk3588-i2s-tdm";
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reg = <0x0 0xfddc8000 0x0 0x1000>;
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interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_I2S8_8CH_TX>, <&cru HCLK_I2S8_8CH>;
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clock-names = "mclk_tx", "hclk";
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dmas = <&dmac2 22>;
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dma-names = "tx";
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resets = <&cru SRST_M_I2S8_8CH_TX>;
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reset-names = "tx-m";
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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spdif_tx3: spdif-tx@fdde0000 {
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compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
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reg = <0x0 0xfdde0000 0x0 0x1000>;
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interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac1 7>;
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dma-names = "tx";
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clock-names = "mclk", "hclk";
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clocks = <&cru MCLK_SPDIF3>, <&cru HCLK_SPDIF3>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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spdif_tx4: spdif-tx@fdde8000 {
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compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
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reg = <0x0 0xfdde8000 0x0 0x1000>;
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interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac1 8>;
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dma-names = "tx";
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clock-names = "mclk", "hclk";
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clocks = <&cru MCLK_SPDIF4>, <&cru HCLK_SPDIF4>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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i2s5_8ch: i2s@fddf0000 {
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compatible = "rockchip,rk3588-i2s-tdm";
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reg = <0x0 0xfddf0000 0x0 0x1000>;
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interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_I2S5_8CH_TX>, <&cru HCLK_I2S5_8CH>;
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clock-names = "mclk_tx", "hclk";
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dmas = <&dmac2 2>;
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dma-names = "tx";
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resets = <&cru SRST_M_I2S5_8CH_TX>;
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reset-names = "tx-m";
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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i2s6_8ch: i2s@fddf4000 {
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compatible = "rockchip,rk3588-i2s-tdm";
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reg = <0x0 0xfddf4000 0x0 0x1000>;
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interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_I2S6_8CH_TX>, <&cru HCLK_I2S6_8CH>;
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clock-names = "mclk_tx", "hclk";
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dmas = <&dmac2 4>;
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dma-names = "tx";
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resets = <&cru SRST_M_I2S6_8CH_TX>;
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reset-names = "tx-m";
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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i2s7_8ch: i2s@fddf8000 {
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compatible = "rockchip,rk3588-i2s-tdm";
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reg = <0x0 0xfddf8000 0x0 0x1000>;
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interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_I2S7_8CH_RX>, <&cru HCLK_I2S7_8CH>;
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clock-names = "mclk_rx", "hclk";
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dmas = <&dmac2 21>;
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dma-names = "rx";
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resets = <&cru SRST_M_I2S7_8CH_RX>;
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reset-names = "rx-m";
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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i2s9_8ch: i2s@fddfc000 {
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compatible = "rockchip,rk3588-i2s-tdm";
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reg = <0x0 0xfddfc000 0x0 0x1000>;
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interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_I2S9_8CH_RX>, <&cru HCLK_I2S9_8CH>;
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clock-names = "mclk_rx", "hclk";
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dmas = <&dmac2 23>;
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dma-names = "rx";
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resets = <&cru SRST_M_I2S9_8CH_RX>;
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reset-names = "rx-m";
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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i2s10_8ch: i2s@fde00000 {
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compatible = "rockchip,rk3588-i2s-tdm";
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reg = <0x0 0xfde00000 0x0 0x1000>;
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interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_I2S10_8CH_RX>, <&cru HCLK_I2S10_8CH>;
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clock-names = "mclk_rx", "hclk";
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dmas = <&dmac2 24>;
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dma-names = "rx";
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resets = <&cru SRST_M_I2S10_8CH_RX>;
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reset-names = "rx-m";
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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spdif_rx0: spdif-rx@fde08000 {
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compatible = "rockchip,rk3588-spdifrx", "rockchip,rk3308-spdifrx";
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reg = <0x0 0xfde08000 0x0 0x1000>;
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interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_SPDIFRX0>, <&cru HCLK_SPDIFRX0>;
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clock-names = "mclk", "hclk";
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dmas = <&dmac0 21>;
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dma-names = "rx";
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resets = <&cru SRST_M_SPDIFRX0>;
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reset-names = "spdifrx-m";
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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spdif_rx1: spdif-rx@fde10000 {
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compatible = "rockchip,rk3588-spdifrx", "rockchip,rk3308-spdifrx";
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reg = <0x0 0xfde10000 0x0 0x1000>;
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interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_SPDIFRX1>, <&cru HCLK_SPDIFRX1>;
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clock-names = "mclk", "hclk";
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dmas = <&dmac0 22>;
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dma-names = "rx";
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resets = <&cru SRST_M_SPDIFRX1>;
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reset-names = "spdifrx-m";
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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spdif_rx2: spdif-rx@fde18000 {
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compatible = "rockchip,rk3588-spdifrx", "rockchip,rk3308-spdifrx";
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reg = <0x0 0xfde18000 0x0 0x1000>;
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interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_SPDIFRX2>, <&cru HCLK_SPDIFRX2>;
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clock-names = "mclk", "hclk";
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dmas = <&dmac0 23>;
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dma-names = "rx";
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resets = <&cru SRST_M_SPDIFRX2>;
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reset-names = "spdifrx-m";
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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sdmmc: mmc@fe2c0000 {
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compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x0 0xfe2c0000 0x0 0x4000>;
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@@ -622,6 +810,160 @@
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status = "disabled";
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};
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i2s0_8ch: i2s@fe470000 {
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compatible = "rockchip,rk3588-i2s-tdm";
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reg = <0x0 0xfe470000 0x0 0x1000>;
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interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>;
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clock-names = "mclk_tx", "mclk_rx", "hclk";
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dmas = <&dmac0 0>, <&dmac0 1>;
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dma-names = "tx", "rx";
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resets = <&cru SRST_M_I2S0_8CH_TX>, <&cru SRST_M_I2S0_8CH_RX>;
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reset-names = "tx-m", "rx-m";
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pinctrl-names = "default";
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pinctrl-0 = <&i2s0_lrck_rx
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&i2s0_lrck_tx
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&i2s0_sclk_rx
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&i2s0_sclk_tx
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&i2s0_sdi0
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&i2s0_sdi1
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&i2s0_sdi2
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&i2s0_sdi3
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&i2s0_sdo0
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&i2s0_sdo1
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&i2s0_sdo2
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&i2s0_sdo3>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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i2s1_8ch: i2s@fe480000 {
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compatible = "rockchip,rk3588-i2s-tdm";
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reg = <0x0 0xfe480000 0x0 0x1000>;
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interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>, <&cru HCLK_I2S1_8CH>;
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clock-names = "mclk_tx", "mclk_rx", "hclk";
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dmas = <&dmac0 2>, <&dmac0 3>;
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dma-names = "tx", "rx";
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resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>;
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reset-names = "tx-m", "rx-m";
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pinctrl-names = "default";
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pinctrl-0 = <&i2s1m0_lrck_rx
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&i2s1m0_lrck_tx
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&i2s1m0_sclk_rx
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&i2s1m0_sclk_tx
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&i2s1m0_sdi0
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&i2s1m0_sdi1
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&i2s1m0_sdi2
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&i2s1m0_sdi3
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&i2s1m0_sdo0
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&i2s1m0_sdo1
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&i2s1m0_sdo2
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&i2s1m0_sdo3>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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i2s2_2ch: i2s@fe490000 {
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compatible = "rockchip,rk3588-i2s", "rockchip,rk3066-i2s";
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reg = <0x0 0xfe490000 0x0 0x1000>;
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interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>;
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clock-names = "i2s_clk", "i2s_hclk";
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dmas = <&dmac1 0>, <&dmac1 1>;
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dma-names = "tx", "rx";
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pinctrl-names = "default";
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pinctrl-0 = <&i2s2m0_lrck_rx
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&i2s2m0_lrck_tx
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&i2s2m0_sclk_rx
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&i2s2m0_sclk_tx
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&i2s2m0_sdi
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&i2s2m0_sdo>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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i2s3_2ch: i2s@fe4a0000 {
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compatible = "rockchip,rk3588-i2s", "rockchip,rk3066-i2s";
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reg = <0x0 0xfe4a0000 0x0 0x1000>;
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interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru MCLK_I2S3_2CH>, <&cru HCLK_I2S3_2CH>;
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clock-names = "i2s_clk", "i2s_hclk";
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dmas = <&dmac1 2>, <&dmac1 3>;
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dma-names = "tx", "rx";
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pinctrl-names = "default";
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pinctrl-0 = <&i2s3_lrck
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&i2s3_sclk
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&i2s3_sdi
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&i2s3_sdo>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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pdm0: pdm@fe4b0000 {
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compatible = "rockchip,rk3588-pdm";
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reg = <0x0 0xfe4b0000 0x0 0x1000>;
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clocks = <&cru MCLK_PDM0>, <&cru HCLK_PDM0>;
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clock-names = "pdm_clk", "pdm_hclk";
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dmas = <&dmac0 4>;
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dma-names = "rx";
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pinctrl-names = "default";
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pinctrl-0 = <&pdm0m0_clk
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&pdm0m0_clk1
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&pdm0m0_sdi0
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&pdm0m0_sdi1
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&pdm0m0_sdi2
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&pdm0m0_sdi3>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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pdm1: pdm@fe4c0000 {
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compatible = "rockchip,rk3588-pdm";
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reg = <0x0 0xfe4c0000 0x0 0x1000>;
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clocks = <&cru MCLK_PDM1>, <&cru HCLK_PDM1>;
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clock-names = "pdm_clk", "pdm_hclk";
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dmas = <&dmac1 4>;
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dma-names = "rx";
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pinctrl-names = "default";
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pinctrl-0 = <&pdm1m0_clk
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&pdm1m0_clk1
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&pdm1m0_sdi0
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&pdm1m0_sdi1
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&pdm1m0_sdi2
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&pdm1m0_sdi3>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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spdif_tx0: spdif-tx@fe4e0000 {
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compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
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reg = <0x0 0xfe4e0000 0x0 0x1000>;
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interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac0 5>;
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dma-names = "tx";
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clock-names = "mclk", "hclk";
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clocks = <&cru MCLK_SPDIF0>, <&cru HCLK_SPDIF0>;
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pinctrl-names = "default";
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pinctrl-0 = <&spdif0m0_tx>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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spdif_tx1: spdif-tx@fe4f0000 {
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compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
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reg = <0x0 0xfe4f0000 0x0 0x1000>;
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interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac1 5>;
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dma-names = "tx";
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clock-names = "mclk", "hclk";
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clocks = <&cru MCLK_SPDIF1>, <&cru HCLK_SPDIF1>;
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pinctrl-names = "default";
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pinctrl-0 = <&spdif1m0_tx>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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gic: interrupt-controller@fe600000 {
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compatible = "arm,gic-v3";
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#interrupt-cells = <3>;
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