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drm/rockchip: vop2: correct linear format support for cluster

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rk356x cluster:
	rgb/yuv format: support non-linear mode only

rk3588 cluster:
	rgb format: support linear and non-linear mode
	yuv format: support non-linear mode only

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ic5cc4690280ba3974301dfd831b445a8a0f9d6b0
This commit is contained in:
Sandy Huang
2022-03-25 11:23:19 +08:00
committed by Tao Huang
parent 183bc1a692
commit 71270c6e64
1 changed files with 41 additions and 12 deletions
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53
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
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@@ -43,14 +43,6 @@ static const uint32_t formats_for_cluster[] = {
DRM_FORMAT_BGR888,
DRM_FORMAT_RGB565,
DRM_FORMAT_BGR565,
DRM_FORMAT_NV12, /* yuv420_8bit linear mode, 2 plane */
DRM_FORMAT_NV16, /* yuv422_8bit linear mode, 2 plane */
DRM_FORMAT_NV24, /* yuv444_8bit linear mode, 2 plane */
DRM_FORMAT_NV15, /* yuv420_10bit linear mode, 2 plane, no padding */
#ifdef CONFIG_NO_GKI
DRM_FORMAT_NV20, /* yuv422_10bit linear mode, 2 plane, no padding */
DRM_FORMAT_NV30, /* yuv444_10bit linear mode, 2 plane, no padding */
#endif
DRM_FORMAT_YUV420_8BIT, /* yuv420_8bit non-Linear mode only */
DRM_FORMAT_YUV420_10BIT, /* yuv420_10bit non-Linear mode only */
DRM_FORMAT_YUYV, /* yuv422_8bit non-Linear mode only*/
@@ -167,6 +159,43 @@ static const uint64_t format_modifiers_afbc[] = {
DRM_FORMAT_MOD_INVALID,
};
static const uint64_t format_modifiers_afbc_no_linear_mode[] = {
DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16),
DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
AFBC_FORMAT_MOD_SPARSE),
DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
AFBC_FORMAT_MOD_YTR),
DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
AFBC_FORMAT_MOD_CBR),
DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
AFBC_FORMAT_MOD_YTR |
AFBC_FORMAT_MOD_SPARSE),
DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
AFBC_FORMAT_MOD_CBR |
AFBC_FORMAT_MOD_SPARSE),
DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
AFBC_FORMAT_MOD_YTR |
AFBC_FORMAT_MOD_CBR),
DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
AFBC_FORMAT_MOD_YTR |
AFBC_FORMAT_MOD_CBR |
AFBC_FORMAT_MOD_SPARSE),
/* SPLIT mandates SPARSE, RGB modes mandates YTR */
DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
AFBC_FORMAT_MOD_YTR |
AFBC_FORMAT_MOD_SPARSE |
AFBC_FORMAT_MOD_SPLIT),
DRM_FORMAT_MOD_INVALID,
};
static const u32 sdr2hdr_bt1886eotf_yn_for_hlg_hdr[65] = {
0,
1, 7, 17, 35,
@@ -1922,7 +1951,7 @@ static const struct vop2_win_data rk3568_vop_win_data[] = {
.base = 0x00,
.formats = formats_for_cluster,
.nformats = ARRAY_SIZE(formats_for_cluster),
.format_modifiers = format_modifiers_afbc,
.format_modifiers = format_modifiers_afbc_no_linear_mode,
.layer_sel_id = 0,
.supported_rotations = DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270 |
DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y,
@@ -1945,7 +1974,7 @@ static const struct vop2_win_data rk3568_vop_win_data[] = {
.layer_sel_id = -1,
.formats = formats_for_cluster,
.nformats = ARRAY_SIZE(formats_for_cluster),
.format_modifiers = format_modifiers_afbc,
.format_modifiers = format_modifiers_afbc_no_linear_mode,
.supported_rotations = DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y,
.hsu_filter_mode = VOP2_SCALE_UP_BIC,
.hsd_filter_mode = VOP2_SCALE_DOWN_BIL,
@@ -1964,7 +1993,7 @@ static const struct vop2_win_data rk3568_vop_win_data[] = {
.base = 0x00,
.formats = formats_for_cluster,
.nformats = ARRAY_SIZE(formats_for_cluster),
.format_modifiers = format_modifiers_afbc,
.format_modifiers = format_modifiers_afbc_no_linear_mode,
.layer_sel_id = 1,
.supported_rotations = DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270 |
DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y,
@@ -1986,7 +2015,7 @@ static const struct vop2_win_data rk3568_vop_win_data[] = {
.layer_sel_id = -1,
.formats = formats_for_cluster,
.nformats = ARRAY_SIZE(formats_for_cluster),
.format_modifiers = format_modifiers_afbc,
.format_modifiers = format_modifiers_afbc_no_linear_mode,
.base = 0x80,
.supported_rotations = DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y,
.hsu_filter_mode = VOP2_SCALE_UP_BIC,