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ARM: dts: rv11xx-evb-v10: Drop clock limitation for sdmmc

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With drive strength issue solved, now sdmmc could reliably
work as expected in UHS-I mode with 200MHz bus clock.

Change-Id: Ie756b92c207875a397337a1ff2f598284e860650
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
This commit is contained in:
Shawn Lin
2020-03-26 15:54:42 +08:00
committed by Tao Huang
parent 998b4240bf
commit 71a42f9f96
1 changed files with 0 additions and 1 deletions
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arch/arm/boot/dts/rv11xx-evb-v10.dtsi
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@@ -928,7 +928,6 @@
cap-mmc-highspeed;
cap-sd-highspeed;
card-detect-delay = <200>;
max-frequency = <100000000>;
rockchip,default-sample-phase = <90>;
supports-sd;
sd-uhs-sdr12;