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drm/bridge: analogix_dp: Use link train delay helper

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Signed-off-by: Wyon bi <bivvy.bi@rock-chips.com>
Change-Id: I1c75e259f8787f5029a1b8d1ba48035d2f645a39
This commit is contained in:
Wyon bi
2022-01-12 11:21:06 +08:00
committed by Tao Huang
parent f5eb395e3f
commit 71ddde314e
2 changed files with 9 additions and 2 deletions
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10
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
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@@ -485,7 +485,7 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
u8 link_status[2], adjust_request[2];
u8 training_pattern = TRAINING_PTN2;
usleep_range(100, 101);
drm_dp_link_train_clock_recovery_delay(dp->dpcd);
lane_count = dp->link_train.lane_count;
@@ -559,7 +559,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
u32 reg;
u8 link_align, link_status[2], adjust_request[2];
usleep_range(400, 401);
drm_dp_link_train_channel_eq_delay(dp->dpcd);
lane_count = dp->link_train.lane_count;
@@ -989,6 +989,12 @@ static int analogix_dp_commit(struct analogix_dp_device *dp)
struct video_info *video = &dp->video_info;
int ret;
ret = drm_dp_read_dpcd_caps(&dp->aux, dp->dpcd);
if (ret < 0) {
dev_err(dp->dev, "failed to read dpcd caps: %d\n", ret);
return ret;
}
if (device_property_read_bool(dp->dev, "panel-self-test"))
return drm_dp_dpcd_writeb(&dp->aux, DP_EDP_CONFIGURATION_SET,
DP_PANEL_SELF_TEST_ENABLE);

1
drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
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@@ -186,6 +186,7 @@ struct analogix_dp_device {
struct mutex panel_lock;
bool panel_is_prepared;
u8 dpcd[DP_RECEIVER_CAP_SIZE];
struct analogix_dp_plat_data *plat_data;
};