net: ethernet: stmmac: dwmac-rk: Fix delayline control for RK3588

The wrong choice is at GMAC1 RGMII delayline control.

Fixes: 2627dcd2c9e9("net: ethernet: stmmac: dwmac-rk: Add gmac support for rk3588")
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Ibc31f4f8b0f8c23c7ca3b290f3d95ba34f03c05f
This commit is contained in:
David Wu
2021-11-13 16:29:47 +08:00
committed by Tao Huang
parent 4a5684c1b1
commit 72bb4cf4a2

View File

@@ -1404,10 +1404,10 @@ static const struct rk_gmac_ops rk3568_ops = {
#define RK3588_GRF_GMAC_CON8 0X0320
#define RK3588_GRF_GMAC_CON9 0X0324
#define RK3588_GMAC_RXCLK_DLY_ENABLE(id) GRF_BIT(3 + (id))
#define RK3588_GMAC_RXCLK_DLY_DISABLE(id) GRF_CLR_BIT(3 + (id))
#define RK3588_GMAC_TXCLK_DLY_ENABLE(id) GRF_BIT(2 + (id))
#define RK3588_GMAC_TXCLK_DLY_DISABLE(id) GRF_CLR_BIT(2 + (id))
#define RK3588_GMAC_RXCLK_DLY_ENABLE(id) GRF_BIT(2 * (id) + 3)
#define RK3588_GMAC_RXCLK_DLY_DISABLE(id) GRF_CLR_BIT(2 * (id) + 3)
#define RK3588_GMAC_TXCLK_DLY_ENABLE(id) GRF_BIT(2 * (id) + 2)
#define RK3588_GMAC_TXCLK_DLY_DISABLE(id) GRF_CLR_BIT(2 * (id) + 2)
#define RK3588_GMAC_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0xFF, 8)
#define RK3588_GMAC_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0xFF, 0)