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clk: rockchip: rk3588: Add audio fracpll freq

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983040000 for SR:
  8k, 16k, 24k, 48k, 96k, 192k

903168000 for SR:
  11.025k 22.05k, 44.1k, 88.2k, 176.4k

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ibd4ab8e18cfc1e973d62b920084cfbe8d3000b0d
This commit is contained in:
Sugar Zhang
2021-11-16 19:37:57 +08:00
parent ee99fe07a7
commit 72c304699f
1 changed files with 2 additions and 0 deletions
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2
drivers/clk/rockchip/clk-rk3588.c
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@@ -76,6 +76,8 @@ static struct rockchip_pll_rate_table rk3588_pll_rates[] = {
RK3588_PLL_RATE(1188000000, 2, 198, 1, 0),
RK3588_PLL_RATE(1008000000, 2, 336, 2, 0),
RK3588_PLL_RATE(1000000000, 3, 500, 2, 0),
RK3588_PLL_RATE(983040000, 3, 491, 2, 34078),
RK3588_PLL_RATE(903168000, 3, 451, 2, 38272),
RK3588_PLL_RATE(900000000, 2, 300, 2, 0),
RK3588_PLL_RATE(816000000, 2, 272, 2, 0),
RK3588_PLL_RATE(786000000, 1, 131, 2, 0),