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clk: rockchip: rk3588: Remove CLK_IGNORE_UNUSED for lpll, b0pll and b1pll

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Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Iafdd1ae6e545fd018dd4becab0083a60a0570fb1
This commit is contained in:
Finley Xiao
2022-03-31 16:40:07 +08:00
committed by Tao Huang
parent 3b7f60deed
commit 7b43769a16
1 changed files with 3 additions and 3 deletions
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6
drivers/clk/rockchip/clk-rk3588.c
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@@ -644,13 +644,13 @@ static struct rockchip_clk_branch rk3588_hdmirx_aud_fracmux __initdata =
static struct rockchip_pll_clock rk3588_pll_clks[] __initdata = {
[b0pll] = PLL(pll_rk3588_core, PLL_B0PLL, "b0pll", mux_pll_p,
CLK_IGNORE_UNUSED, RK3588_B0_PLL_CON(0),
0, RK3588_B0_PLL_CON(0),
RK3588_BIGCORE0_CLKSEL_CON(0), 6, 15, 0, rk3588_pll_rates),
[b1pll] = PLL(pll_rk3588_core, PLL_B1PLL, "b1pll", mux_pll_p,
CLK_IGNORE_UNUSED, RK3588_B1_PLL_CON(8),
0, RK3588_B1_PLL_CON(8),
RK3588_BIGCORE1_CLKSEL_CON(0), 6, 15, 0, rk3588_pll_rates),
[lpll] = PLL(pll_rk3588_core, PLL_LPLL, "lpll", mux_pll_p,
CLK_IGNORE_UNUSED, RK3588_LPLL_CON(16),
0, RK3588_LPLL_CON(16),
RK3588_DSU_CLKSEL_CON(5), 14, 15, 0, rk3588_pll_rates),
[v0pll] = PLL(pll_rk3588, PLL_V0PLL, "v0pll", mux_pll_p,
0, RK3588_PLL_CON(88),