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rk3026: 86v: auto select dvfs table according to SOC version

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chenxing
2013-09-26 12:34:48 +08:00
parent 018dd2c26f
commit 7d871578a2
1 changed files with 26 additions and 2 deletions
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28
arch/arm/mach-rk3026/board-rk3026-86v.c
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@@ -47,6 +47,8 @@
#include <mach/gpio.h>
#include <mach/iomux.h>
#include <plat/efuse.h>
#if defined(CONFIG_SPIM_RK29)
#include "../../../drivers/spi/rk29_spim.h"
#endif
@@ -1727,10 +1729,11 @@ static void __init rk30_reserve(void)
/***********************************************************
* clock
************************************************************/
static struct cpufreq_frequency_table dvfs_arm_table[] = {
static struct cpufreq_frequency_table dvfs_arm_table_v0[] = {
{.frequency = 312 * 1000, .index = 1200 * 1000},
{.frequency = 504 * 1000, .index = 1200 * 1000},
{.frequency = 816 * 1000, .index = 1250 * 1000},
{.frequency = 912 * 1000, .index = 1350 * 1000},
{.frequency = 1008 * 1000, .index = 1350 * 1000},
//{.frequency = 1200 * 1000, .index = 1200 * 1000},
//{.frequency = 1416 * 1000, .index = 1200 * 1000},
@@ -1738,6 +1741,18 @@ static struct cpufreq_frequency_table dvfs_arm_table[] = {
{.frequency = CPUFREQ_TABLE_END},
};
static struct cpufreq_frequency_table dvfs_arm_table_v1[] = {
{.frequency = 312 * 1000, .index = 1200 * 1000},
{.frequency = 504 * 1000, .index = 1200 * 1000},
{.frequency = 816 * 1000, .index = 1275 * 1000},
{.frequency = 912 * 1000, .index = 1350 * 1000},
{.frequency = 1008 * 1000, .index = 1400 * 1000},
//{.frequency = 1200 * 1000, .index = 1200 * 1000},
//{.frequency = 1416 * 1000, .index = 1200 * 1000},
//{.frequency = 1608 * 1000, .index = 1200 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
static struct cpufreq_frequency_table dvfs_gpu_table[] = {
{.frequency = 100 * 1000, .index = 1200 * 1000},
{.frequency = 200 * 1000, .index = 1200 * 1000},
@@ -1754,11 +1769,20 @@ static struct cpufreq_frequency_table dvfs_ddr_table[] = {
{.frequency = CPUFREQ_TABLE_END},
};
#define RK3026_SOC_V0 0x00
#define RK3026_SOC_V1 0x01
void __init board_clock_init(void)
{
rk2928_clock_data_init(periph_pll_default, codec_pll_default, RK30_CLOCKS_DEFAULT_FLAGS);
//dvfs_set_arm_logic_volt(dvfs_cpu_logic_table, cpu_dvfs_table, dep_cpu2core_table);
dvfs_set_freq_volt_table(clk_get(NULL, "cpu"), dvfs_arm_table);
printk(KERN_INFO "rk3026 soc version:%d\n", rk3026_version_val());
if (rk3026_version_val() == RK3026_SOC_V1)
dvfs_set_freq_volt_table(clk_get(NULL, "cpu"), dvfs_arm_table_v1);
else
dvfs_set_freq_volt_table(clk_get(NULL, "cpu"), dvfs_arm_table_v0);
dvfs_set_freq_volt_table(clk_get(NULL, "gpu"), dvfs_gpu_table);
dvfs_set_freq_volt_table(clk_get(NULL, "ddr"), dvfs_ddr_table);
}