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ODROID-M2: can: Add overlays for mcp2515 and mcp2517fd
mcp2515 - MISO: 21 - MOSI: 19 - SCLK: 23 - CS1 : 26 - INT : 11 mcp2517 (CAN-FD Add-on board) - MISO: 21 - MOSI: 19 - SCLK: 23 - CS0 : 24 - INT : 11 Signed-off-by: YoungSoo Shin <bob.shin@hardkernel.com> Change-Id: I9af389e9538c22a2863218bc03569854dc38bad6
This commit is contained in:
@@ -3,12 +3,16 @@
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dtbo-y += \
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blueled_off.dtbo \
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can0.dtbo \
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canfd0.dtbo \
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dht11.dtbo \
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display_vu8s.dtbo \
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gpio_shortcut.dtbo \
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i2c0.dtbo \
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i2c1.dtbo \
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i2c2.dtbo \
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mcp2515.dtbo \
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mcp2515_12mhz.dtbo \
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mcp2515_16mhz.dtbo \
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onewire.dtbo \
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pwm15.dtbo \
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pwm3.dtbo \
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51
arch/arm64/boot/dts/rockchip/overlays/odroidm2/canfd0.dts
Normal file
51
arch/arm64/boot/dts/rockchip/overlays/odroidm2/canfd0.dts
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@@ -0,0 +1,51 @@
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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fragment@0 {
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target = <&spi0>;
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__overlay__ {
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num_chipselect = <1>;
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cs-gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
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};
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};
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fragment@1 {
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target-path = "/";
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__overlay__ {
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can0_clk: can0_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <20000000>;
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};
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};
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};
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fragment@2 {
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target = <&spi0>;
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__overlay__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp2517fd: canfd@0 {
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compatible = "microchip,mcp2517fd";
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pinctrl-names = "default";
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pinctrl-0 = <&mcp251x_int_pins>;
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reg = <0>;
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clocks = <&can0_clk>;
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interrupt-parent = <&gpio3>;
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interrupts = <RK_PD4 IRQ_TYPE_EDGE_FALLING>;
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spi-max-frequency = <10000000>;
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status = "okay";
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};
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};
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};
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};
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14
arch/arm64/boot/dts/rockchip/overlays/odroidm2/mcp2515.dts
Normal file
14
arch/arm64/boot/dts/rockchip/overlays/odroidm2/mcp2515.dts
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@@ -0,0 +1,14 @@
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/dts-v1/;
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/plugin/;
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#include "mcp2515.dtsi"
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/ {
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fragment@1 {
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__overlay__ {
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can0_clk: can0_clk {
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clock-frequency = <8000000>;
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};
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};
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};
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};
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51
arch/arm64/boot/dts/rockchip/overlays/odroidm2/mcp2515.dtsi
Normal file
51
arch/arm64/boot/dts/rockchip/overlays/odroidm2/mcp2515.dtsi
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@@ -0,0 +1,51 @@
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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fragment@0 {
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target = <&spi0>;
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__overlay__ {
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num_chipselect = <1>;
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cs-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
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};
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};
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fragment@1 {
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target-path = "/";
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__overlay__ {
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can0_clk: can0_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <8000000>;
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};
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};
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};
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fragment@2 {
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target = <&spi0>;
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__overlay__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp2515: can@0 {
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compatible = "microchip,mcp2515";
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pinctrl-names = "default";
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pinctrl-0 = <&mcp251x_int_pins>;
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reg = <0>;
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clocks = <&can0_clk>;
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interrupt-parent = <&gpio3>;
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interrupts = <RK_PD4 IRQ_TYPE_EDGE_FALLING>;
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spi-max-frequency = <10000000>;
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status = "okay";
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};
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};
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};
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};
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@@ -0,0 +1,14 @@
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/dts-v1/;
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/plugin/;
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#include "mcp2515.dtsi"
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/ {
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fragment@1 {
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__overlay__ {
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can0_clk: can0_clk {
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clock-frequency = <12000000>;
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};
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};
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};
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};
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@@ -0,0 +1,14 @@
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/dts-v1/;
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/plugin/;
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#include "mcp2515.dtsi"
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/ {
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fragment@1 {
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__overlay__ {
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can0_clk: can0_clk {
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clock-frequency = <16000000>;
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};
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};
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};
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};
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@@ -1093,3 +1093,11 @@
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rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>;
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rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART3>;
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};
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&pinctrl {
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can_pins {
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mcp251x_int_pins: mcp251x_int_pins {
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rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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