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emmc: run hs400 200M on sm1 [1/1]

Browse Source 
PD#SWPL-5404

Problem:
run hs400 200M on sm1

Solution:
config sm1 and modify dts

Verify:
passed on ac200

Change-Id: I34e54f88db79ce42f9effbf8d673ade613de328f
Signed-off-by: Ruixuan Li <ruixuan.li@amlogic.com>
This commit is contained in:
Ruixuan Li
2019-04-23 16:07:12 +08:00
committed by Luan Yuan
parent d3a2a17000
commit 89f4f91e15
6 changed files with 15 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
arch/arm/boot/dts/amlogic/mesonsm1.dtsi
View File

@@ -1362,7 +1362,7 @@
clocks = <&clkc CLKID_SD_EMMC_C>,
<&clkc CLKID_SD_EMMC_C_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>,
<&clkc CLKID_FCLK_DIV5>,
<&clkc CLKID_FCLK_DIV2P5>,
<&xtal>;
clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
@@ -1820,6 +1820,7 @@
function = "emmc";
input-enable;
bias-pull-up;
drive-strength = <3>;
};
};
@@ -1838,6 +1839,7 @@
function = "emmc";
input-enable;
bias-pull-up;
drive-strength = <3>;
};
};
@@ -1847,6 +1849,7 @@
function = "emmc";
input-enable;
bias-pull-down;
drive-strength = <3>;
};
};

3
arch/arm/boot/dts/amlogic/sm1_s905d3_ac200.dts
View File

@@ -1488,8 +1488,7 @@
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200";
/* "MMC_CAP2_HS400";*/
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;
};

5
arch/arm64/boot/dts/amlogic/mesonsm1.dtsi
View File

@@ -1361,7 +1361,7 @@
clocks = <&clkc CLKID_SD_EMMC_C>,
<&clkc CLKID_SD_EMMC_C_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>,
<&clkc CLKID_FCLK_DIV5>,
<&clkc CLKID_FCLK_DIV2P5>,
<&xtal>;
clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
@@ -1819,6 +1819,7 @@
function = "emmc";
input-enable;
bias-pull-up;
drive-strength = <3>;
};
};
@@ -1837,6 +1838,7 @@
function = "emmc";
input-enable;
bias-pull-up;
drive-strength = <3>;
};
};
@@ -1846,6 +1848,7 @@
function = "emmc";
input-enable;
bias-pull-down;
drive-strength = <3>;
};
};

3
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts
View File

@@ -1475,8 +1475,7 @@
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200";
/* "MMC_CAP2_HS400";*/
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;
};

2
drivers/amlogic/mmc/aml_sd_emmc.c
View File

@@ -3643,7 +3643,7 @@ static struct meson_mmc_data mmc_data_sm1 = {
.sdmmc.ddr.tx_phase = 0,
.sdmmc.hs2.core_phase = 2,
.sdmmc.hs2.tx_phase = 0,
.sdmmc.hs4.tx_delay = 0,
.sdmmc.hs4.tx_delay = 16,
.sdmmc.sd_hs.core_phase = 3,
.sdmmc.sdr104.core_phase = 2,
.sdmmc.sdr104.tx_phase = 0,

7
drivers/amlogic/mmc/aml_sd_emmc_v3.c
View File

@@ -350,7 +350,7 @@ static void aml_sd_emmc_set_timing_v3(struct amlsd_platform *pdata,
if (pdata->tx_delay != 0)
clkc->tx_delay = pdata->tx_delay;
if (((host->data->chip_type == MMC_CHIP_TL1)
if (((host->data->chip_type >= MMC_CHIP_TL1)
|| (host->data->chip_type == MMC_CHIP_G12B))
&& aml_card_type_mmc(pdata)) {
clkc->core_phase = para->hs4.core_phase;
@@ -1877,7 +1877,7 @@ int aml_mmc_execute_tuning_v3(struct mmc_host *mmc, u32 opcode)
intf3 |= (1<<22);
writel(intf3, (host->base + SD_EMMC_INTF3));
pdata->intf3 = intf3;
if ((host->data->chip_type == MMC_CHIP_TL1)
if ((host->data->chip_type >= MMC_CHIP_TL1)
|| (host->data->chip_type == MMC_CHIP_G12B))
aml_emmc_hs200_tl1(mmc);
err = 0;
@@ -1895,7 +1895,8 @@ int aml_post_hs400_timming(struct mmc_host *mmc)
struct amlsd_platform *pdata = mmc_priv(mmc);
struct amlsd_host *host = pdata->host;
aml_sd_emmc_clktest(mmc);
if (host->data->chip_type == MMC_CHIP_TL1)
if ((host->data->chip_type == MMC_CHIP_TL1)
|| (host->data->chip_type == MMC_CHIP_SM1))
aml_emmc_hs400_tl1(mmc);
else if (host->data->chip_type == MMC_CHIP_G12B)
aml_emmc_hs400_Revb(mmc);