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arm64: dts: rockchip: rk3568: modify dmc clk
ddr clk using SCMI, replace <&cru SCLK_DDRCLK> with <&scmi_clk 3> Change-Id: Ibce1779718c6800d3ce3e334ce0ed5151b9a6eec Signed-off-by: YouMin Chen <cym@rock-chips.com>
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@@ -2128,7 +2128,7 @@
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interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "complete";
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devfreq-events = <&dfi>;
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clocks = <&cru SCLK_DDRCLK>;
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clocks = <&scmi_clk 3>;
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clock-names = "dmc_clk";
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operating-points-v2 = <&dmc_opp_table>;
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ddr_timing = <&ddr_timing>;
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