arm64: dts: rockchip: rk3568: modify dmc clk

ddr clk using SCMI, replace <&cru SCLK_DDRCLK> with <&scmi_clk 3>

Change-Id: Ibce1779718c6800d3ce3e334ce0ed5151b9a6eec
Signed-off-by: YouMin Chen <cym@rock-chips.com>
This commit is contained in:
YouMin Chen
2021-06-10 20:11:25 +08:00
committed by Tao Huang
parent a02f4a7f2e
commit 8a169769bb

View File

@@ -2128,7 +2128,7 @@
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "complete";
devfreq-events = <&dfi>;
clocks = <&cru SCLK_DDRCLK>;
clocks = <&scmi_clk 3>;
clock-names = "dmc_clk";
operating-points-v2 = <&dmc_opp_table>;
ddr_timing = <&ddr_timing>;