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arm64: dts: rockchip: rv1126b: Add spi nodes

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Change-Id: Ia29b4a322f51664e5db478471e46db3c908d22bc
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
This commit is contained in:
Xuhui Lin
2025-02-10 18:46:03 +08:00
committed by Tao Huang
parent a44437960e
commit 8b88e58c44
1 changed files with 32 additions and 0 deletions
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32
arch/arm64/boot/dts/rockchip/rv1126b.dtsi
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@@ -41,6 +41,8 @@
rkcif_mipi_lvds2= &rkcif_mipi_lvds2;
rkcif_mipi_lvds3= &rkcif_mipi_lvds3;
serial0 = &uart0;
spi0 = &spi0;
spi1 = &spi1;
};
clocks {
@@ -942,6 +944,36 @@
status = "disabled";
};
spi0: spi@211e0000 {
compatible = "rockchip,rv1126b-spi", "rockchip,rk3066-spi";
reg = <0x211e0000 0x1000>;
interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
clock-names = "spiclk", "apb_pclk";
dmas = <&dmac 40>, <&dmac 41>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <&spi0m0_clk_pins &spi0m0_csn0_pins &spi0m0_csn1_pins>;
status = "disabled";
};
spi1: spi@211f0000 {
compatible = "rockchip,rv1126b-spi", "rockchip,rk3066-spi";
reg = <0x211f0000 0x1000>;
interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>;
clock-names = "spiclk", "apb_pclk";
dmas = <&dmac 42>, <&dmac 43>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <&spi1m0_clk_pins &spi1m0_csn0_pins &spi1m0_csn1_pins>;
status = "disabled";
};
gic: interrupt-controller@21201000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;