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drm: rockchip: rk628: post_process: recalculate dst clock

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Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Change-Id: I93388ba499f0d74c5f5c549decc83f3225ae1b82
This commit is contained in:
Shunqing Chen
2021-04-07 09:10:10 +08:00
committed by Tao Huang
parent 26b711fa00
commit 8ba551e60d
1 changed files with 9 additions and 2 deletions
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11
drivers/gpu/drm/rockchip/rk628/rk628_post_process.c
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@@ -209,8 +209,9 @@ static void rk628_post_process_scaler_init(struct rk628_post_process *pp,
static void rk628_post_process_bridge_pre_enable(struct drm_bridge *bridge)
{
struct rk628_post_process *pp = bridge_to_pp(bridge);
const struct drm_display_mode *src = &pp->src_mode;
const struct drm_display_mode *dst = &pp->dst_mode;
struct drm_display_mode *src = &pp->src_mode;
struct drm_display_mode *dst = &pp->dst_mode;
u64 dst_rate, src_rate;
reset_control_assert(pp->rstc_decoder);
udelay(10);
@@ -224,6 +225,12 @@ static void rk628_post_process_bridge_pre_enable(struct drm_bridge *bridge)
reset_control_deassert(pp->rstc_clk_rx);
udelay(10);
src_rate = src->clock * 1000;
dst_rate = src_rate * dst->vdisplay * dst->htotal;
do_div(dst_rate, src->vdisplay * src->htotal);
do_div(dst_rate, 1000);
dst->clock = dst_rate;
clk_set_rate(pp->sclk_vop, dst->clock * 1000);
clk_prepare_enable(pp->sclk_vop);
reset_control_assert(pp->rstc_vop);