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clk: rockchip: rk3588: Workaround for DTS-HD Bitstream on Denon

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BACKGROUND:
DTS-HD Bitstream sounds noise occasionally on Denon-AVR-X2700H,
and we found this happen sometime on PLL(frac mode), But it's gone
on PLL(int mode).

This patch Adds "CLK_SET_RATE_NO_REPARENT" for I2S5/6 which used
for HDMI0/1 to make its parent fixed from GPLL(int mode) to fix
DTS-HD Bitstream noise occasionally on Denon-AVR-X2700H.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I5694c0a7839df817fd32b82ce69450f0eebdcf77
This commit is contained in:
Sugar Zhang
2022-12-09 14:25:37 +08:00
committed by Tao Huang
parent 09d66b0809
commit 932e81825b
1 changed files with 2 additions and 2 deletions
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4
drivers/clk/rockchip/clk-rk3588.c
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@@ -1995,7 +1995,7 @@ static struct rockchip_clk_branch rk3588_clk_branches[] __initdata = {
&rk3588_i2s9_8ch_rx_fracmux),
GATE(MCLK_I2S9_8CH_RX, "mclk_i2s9_8ch_rx", "clk_i2s9_8ch_rx", 0,
RK3588_CLKGATE_CON(65), 3, GFLAGS),
COMPOSITE(CLK_I2S5_8CH_TX_SRC, "clk_i2s5_8ch_tx_src", gpll_aupll_p, 0,
COMPOSITE(CLK_I2S5_8CH_TX_SRC, "clk_i2s5_8ch_tx_src", gpll_aupll_p, CLK_SET_RATE_NO_REPARENT,
RK3588_CLKSEL_CON(140), 10, 1, MFLAGS, 5, 5, DFLAGS,
RK3588_CLKGATE_CON(62), 6, GFLAGS),
COMPOSITE_FRACMUX(CLK_I2S5_8CH_TX_FRAC, "clk_i2s5_8ch_tx_frac", "clk_i2s5_8ch_tx_src", CLK_SET_RATE_PARENT,
@@ -2004,7 +2004,7 @@ static struct rockchip_clk_branch rk3588_clk_branches[] __initdata = {
&rk3588_i2s5_8ch_tx_fracmux),
GATE(MCLK_I2S5_8CH_TX, "mclk_i2s5_8ch_tx", "clk_i2s5_8ch_tx", 0,
RK3588_CLKGATE_CON(62), 8, GFLAGS),
COMPOSITE(CLK_I2S6_8CH_TX_SRC, "clk_i2s6_8ch_tx_src", gpll_aupll_p, 0,
COMPOSITE(CLK_I2S6_8CH_TX_SRC, "clk_i2s6_8ch_tx_src", gpll_aupll_p, CLK_SET_RATE_NO_REPARENT,
RK3588_CLKSEL_CON(144), 8, 1, MFLAGS, 3, 5, DFLAGS,
RK3588_CLKGATE_CON(62), 13, GFLAGS),
COMPOSITE_FRACMUX(CLK_I2S6_8CH_TX_FRAC, "clk_i2s6_8ch_tx_frac", "clk_i2s6_8ch_tx_src", CLK_SET_RATE_PARENT,