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clk: rockchip: rk3568: Fix clk_tsadc_tsen mux width

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Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I659b4e501e7fe8ad769bbd017f615d6ae359cf1c
This commit is contained in:
Finley Xiao
2020-12-07 19:53:35 +08:00
committed by Tao Huang
parent 61ae54415d
commit 93f3dd8031
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/rockchip/clk-rk3568.c
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@@ -1210,7 +1210,7 @@ static struct rockchip_clk_branch rk3568_clk_branches[] __initdata = {
GATE(PCLK_TSADC, "pclk_tsadc", "pclk_bus", 0,
RK3568_CLKGATE_CON(26), 4, GFLAGS),
COMPOSITE(CLK_TSADC_TSEN, "clk_tsadc_tsen", xin24m_gpll100_cpll100_p, 0,
RK3568_CLKSEL_CON(51), 4, 1, MFLAGS, 0, 3, DFLAGS,
RK3568_CLKSEL_CON(51), 4, 2, MFLAGS, 0, 3, DFLAGS,
RK3568_CLKGATE_CON(26), 5, GFLAGS),
COMPOSITE_NOMUX(CLK_TSADC, "clk_tsadc", "clk_tsadc_tsen", 0,
RK3568_CLKSEL_CON(51), 8, 7, DFLAGS,