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arm64: dts: rockchip: rk3588: add usbdp phy device node

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This adds USBDP combo PHY1 related nodes for RK3588 SoCs.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I2afb41c8f57ab49c13ecee110a78c9b7f011e3fe
This commit is contained in:
Frank Wang
2021-09-02 09:12:09 +08:00
committed by Tao Huang
parent 0e542bf348
commit 95f6f44072
1 changed files with 34 additions and 0 deletions
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34
arch/arm64/boot/dts/rockchip/rk3588.dtsi
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@@ -38,6 +38,11 @@
reg = <0x0 0xfd5c0000 0x0 0x100>;
};
usbdpphy1_grf: syscon@fd5cc000 {
compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
reg = <0x0 0xfd5cc000 0x0 0x4000>;
};
spdif_tx5: spdif-tx@fddb8000 {
compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
reg = <0x0 0xfddb8000 0x0 0x1000>;
@@ -161,6 +166,35 @@
status = "disabled";
};
usbdp_phy1: phy@fed90000 {
compatible = "rockchip,rk3588-usbdp-phy";
reg = <0x0 0xfed90000 0x0 0x10000>;
rockchip,usb-grf = <&usb_grf>;
rockchip,usbdpphy-grf = <&usbdpphy1_grf>;
rockchip,vo-grf = <&vo0_grf>;
clocks = <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>,
<&cru CLK_USBDP_PHY1_IMMORTAL>,
<&cru PCLK_USBDPPHY1>;
clock-names = "refclk", "immortal", "pclk";
resets = <&cru SRST_USBDP_COMBO_PHY1_INIT>,
<&cru SRST_USBDP_COMBO_PHY1_CMN>,
<&cru SRST_USBDP_COMBO_PHY1_LANE>,
<&cru SRST_USBDP_COMBO_PHY1_PCS>,
<&cru SRST_P_USBDPPHY1>;
reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";
status = "disabled";
usbdp_phy1_dp: dp-port {
#phy-cells = <0>;
status = "disabled";
};
usbdp_phy1_u3: u3-port {
#phy-cells = <0>;
status = "disabled";
};
};
combphy1_ps: phy@fee10000 {
compatible = "rockchip,rk3588-naneng-combphy";
reg = <0x0 0xfee10000 0x0 0x100>;