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phy: rockchip-samsung-hdptx-hdmi: Reduce ROPLL loop bandwidth

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24M clock noise is carried into the PHY ROPLL loop filter.
Due to the low noise frequency, it can pass through the low-pass loop
filter of ROPLL, resulting in hdmi flash. Reduce ROPLL loop bandwidth
can solve this problem.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ibea774bc26ea8c2b06cf79c84b6cd6456df66ea5
This commit is contained in:
Algea Cao
2023-02-15 11:31:04 +08:00
committed by Tao Huang
parent c544fe878d
commit 97811627ff
1 changed files with 2 additions and 2 deletions
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4
drivers/phy/rockchip/phy-rockchip-samsung-hdptx-hdmi.c
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@@ -1269,9 +1269,9 @@ static int hdptx_ropll_cmn_config(struct rockchip_hdptx_phy *hdptx, unsigned lon
hdptx_write(hdptx, CMN_REG0043, 0x00);
hdptx_write(hdptx, CMN_REG0044, 0x46);
hdptx_write(hdptx, CMN_REG0045, 0x24);
hdptx_write(hdptx, CMN_REG0046, 0xff);
hdptx_write(hdptx, CMN_REG0046, 0xdd);
hdptx_write(hdptx, CMN_REG0047, 0x00);
hdptx_write(hdptx, CMN_REG0048, 0x44);
hdptx_write(hdptx, CMN_REG0048, 0x11);
hdptx_write(hdptx, CMN_REG0049, 0xfa);
hdptx_write(hdptx, CMN_REG004A, 0x08);
hdptx_write(hdptx, CMN_REG004B, 0x00);