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arm64: dts: rockchip: rk3588: Fix the pcie1ln setting

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pcie1l0_sel pcie1l0->combPHY1
pcie1l1_sel pcie1l1->combPHY2

Fixes: a44f986d11 ("arm64: dts: rockchip: rk3588: Add pcie1ln setting for comboPHY")
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I604fec8563c7a82279eaa5e943af1ae69639f862
This commit is contained in:
Kever Yang
2021-11-16 17:17:29 +08:00
committed by Tao Huang
parent 6d3eff78e5
commit 9892e3a80c
2 changed files with 2 additions and 2 deletions
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2
arch/arm64/boot/dts/rockchip/rk3588.dtsi
View File

@@ -721,7 +721,7 @@
reset-names = "combphy-apb", "combphy";
rockchip,pipe-grf = <&php_grf>;
rockchip,pipe-phy-grf = <&pipe_phy1_grf>;
rockchip,pcie1ln-sel-bits = <0x100 1 1 0>;
rockchip,pcie1ln-sel-bits = <0x100 0 0 0>;
status = "disabled";
};

2
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
View File

@@ -3929,7 +3929,6 @@
reset-names = "combphy-apb", "combphy";
rockchip,pipe-grf = <&php_grf>;
rockchip,pipe-phy-grf = <&pipe_phy0_grf>;
rockchip,pcie1ln-sel-bits = <0x100 0 0 0>;
status = "disabled";
};
@@ -3945,6 +3944,7 @@
reset-names = "combphy-apb", "combphy";
rockchip,pipe-grf = <&php_grf>;
rockchip,pipe-phy-grf = <&pipe_phy2_grf>;
rockchip,pcie1ln-sel-bits = <0x100 1 1 0>;
status = "disabled";
};