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UPSTREAM: clk: rockchip: rk3368: fix edp_24m parent

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The edp_24m parent select bit define is:
1'b0:xin24m
1'b1:1'b0(dummy)
so adapt the parent sel bit to the currect one.

Signed-off-by: zhangqing <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.6-clk/next
 commit d566ebc3c0)

Change-Id: Ia0530f4e00c8ea15420b49587097f07ac1af5092
This commit is contained in:
zhangqing
2016-01-25 08:56:00 -08:00
committed by Gerrit Code Review
parent 24ebcaf1c0
commit 9c61fe501d
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/rockchip/clk-rk3368.c
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@@ -121,7 +121,7 @@ PNAME(mux_i2s_2ch_p) = { "i2s_2ch_src", "i2s_2ch_frac",
"dummy", "xin12m" };
PNAME(mux_spdif_8ch_p) = { "spdif_8ch_pre", "spdif_8ch_frac",
"ext_i2s", "xin12m" };
PNAME(mux_edp_24m_p) = { "dummy", "xin24m" };
PNAME(mux_edp_24m_p) = { "xin24m", "dummy" };
PNAME(mux_vip_out_p) = { "vip_src", "xin24m" };
PNAME(mux_usbphy480m_p) = { "usbotg_out", "xin24m" };
PNAME(mux_hsic_usbphy480m_p) = { "usbotg_out", "dummy" };