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ARM: dts: rockchip: rv1106g-evb2: change sfc_max_freq to 125MHz

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The parent clock of sclk_sfc are 500m_300m_200m_24m, so that can't set
sclk_sfc to 118.8MHz.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I71b60000a465c23e88155ac9da95cf046717a6d8
This commit is contained in:
Ziyuan Xu
2022-04-25 09:28:14 +08:00
committed by Tao Huang
parent fc1c261cff
commit 9c7320f123
1 changed files with 3 additions and 1 deletions
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4
arch/arm/boot/dts/rv1106g-evb2-v10.dts
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@@ -231,12 +231,14 @@
};
&sfc {
assigned-clocks = <&cru SCLK_SFC>;
assigned-clock-rates = <125000000>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <118800000>;
spi-max-frequency = <125000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};