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Merge tag 'android14-6.1.138_r00' into android14-6.1

Browse Source 
This merges the android14-6.1.138_r00 tag into the android14-6.1 branch,
catching it up with the latest LTS releases.

It contains the following commits:

* 4894546596 Revert "cpufreq: Avoid using inconsistent policy->min and policy->max"
* 9840922a87 Revert "cpufreq: Fix setting policy limits when frequency tables are used"
* 1e50e672f2 UPSTREAM: arm64: errata: Add newer ARM cores to the spectre_bhb_loop_affected() lists
*   4c7f06c5da Merge 6.1.138 into android14-6.1-lts
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| * 02b72ccb5f Linux 6.1.138
| * 5626b47a3e ASoC: soc-core: Stop using of_property_read_bool() for non-boolean properties
| * 79ff5e2629 ASoC: Use of_property_read_bool()
| * e25139c4aa drm/amd/display: Fix slab-use-after-free in hdcp
| * 942ecb9e8f drm/amd/display: Add scoped mutexes for amdgpu_dm_dhcp
| * e07ed98515 drm/amd/display: Change HDCP update sequence for DM
| * e56b7400e9 drm/amd/display: Clean up style problems in amdgpu_dm_hdcp.c
| * 8a86bb891b drm/amd/display: phase2 enable mst hdcp multiple displays
| * 8316820e40 iommu/arm-smmu-v3: Fix iommu_device_probe bug due to duplicated stream ids
| * 28ddd9cf9d iommu/arm-smmu-v3: Use the new rb tree helpers
| * 4c4f168b46 dm: fix copying after src array boundaries
| * dc0d654eb4 irqchip/gic-v2m: Prevent use after free of gicv2m_get_fwnode()
| * c8f809b3de irqchip/gic-v2m: Mark a few functions __init
| * 36d4ce271b Revert "drm/meson: vclk: fix calculation of 59.94 fractional rates"
| * 9b89102fbb net: phy: microchip: force IRQ polling mode for lan88xx
| * 72a797facb ARM: dts: opos6ul: add ksz8081 phy properties
| * 88d7fd2d46 firmware: arm_ffa: Skip Rx buffer ownership release if not acquired
| * ff4273d47d firmware: arm_scmi: Balance device refcount when destroying devices
| * c13b801e85 Revert "x86/kexec: Allocate PGD for x86_64 transition page tables separately"
| * be9e230281 sch_ets: make est_qlen_notify() idempotent
| * 83fb922d06 sch_qfq: make qfq_qlen_notify() idempotent
| * 0475c85426 sch_hfsc: make hfsc_qlen_notify() idempotent
| * 0e59ce6cf3 sch_drr: make drr_qlen_notify() idempotent
| * 73cf6af131 sch_htb: make htb_qlen_notify() idempotent
| * 85bb073b89 PCI: imx6: Skip controller_id generation logic for i.MX7D
| * 8dcd498116 md: move initialization and destruction of 'io_acct_set' to md.c
| * 01b8322147 net: vertexcom: mse102x: Fix RX error handling
| * 7bdc90cf92 net: vertexcom: mse102x: Add range check for CMD_RTS
| * 9e951979ef net: vertexcom: mse102x: Fix LEN_MASK
| * 53b6b3614d net: vertexcom: mse102x: Fix possible stuck of SPI interrupt
| * 2735065ac6 net: hns3: defer calling ptp_clock_register()
| * de5ad4dbec net: hns3: fixed debugfs tm_qset size
| * 9137a78d0b net: hns3: fix an interrupt residual problem
| * e15d00593d net: hns3: store rx VLAN tag offload state for VF
| * 328e124da6 net: fec: ERR007885 Workaround for conventional TX
| * a0e0efbabb net: lan743x: Fix memleak issue when GSO enabled
| * 44c3f30c8e nvme-tcp: fix premature queue removal and I/O failover
| * 2922716d94 bnxt_en: Fix ethtool -d byte order for 32-bit values
| * 43292b8342 bnxt_en: Fix out-of-bound memcpy() during ethtool -w
| * b1c2b19dcc bnxt_en: Fix coredump logic to free allocated buffer
| * 68bfb59b3c net: ipv6: fix UDPv6 GSO segmentation with NAT
| * f57fd07d7c net: dsa: felix: fix broken taprio gate states after clock jump
| * 9f9c9d1c08 net: dlink: Correct endianness handling of led_mode
| * 0561f2e374 ice: Check VF VSI Pointer Value in ice_vc_add_fdir_fltr()
| * 0aa23e0856 net_sched: qfq: Fix double list add in class with netem as child qdisc
| * 9efb6a0fa8 net_sched: ets: Fix double list add in class with netem as child qdisc
| * 8df7d37d62 net_sched: hfsc: Fix a UAF vulnerability in class with netem as child qdisc
| * 4f0ecf50cd net_sched: drr: Fix double list add in class with netem as child qdisc
| * eaf2494138 net: ethernet: mtk-star-emac: rearm interrupts in rx_poll only when advised
| * 94107259f9 net: ethernet: mtk-star-emac: fix spinlock recursion issues on rx/tx poll
| * 4195bd195a net: mscc: ocelot: delete PVID VLAN when readding it as non-PVID
| * 2ab2780146 net: mscc: ocelot: treat 802.1ad tagged traffic as 802.1Q-untagged
| * 901346b673 net/mlx5: E-switch, Fix error handling for enabling roce
| * 455a5261c9 net/mlx5: E-Switch, Initialize MAC Address for Default GID
| * 2d4a121296 vxlan: vnifilter: Fix unlocked deletion of default FDB entry
| * 93d646911b wifi: plfxlc: Remove erroneous assert in plfxlc_mac_release
| * 92b0c8414c ASoC: soc-pcm: Fix hw_params() and DAPM widget sequence
| * a99f5bf4f7 dm-bufio: don't schedule in atomic context
| * 93eeb6df16 KVM: x86: Load DR6 with guest value only before entering .vcpu_run() loop
| * 227bda0fd0 xfs: restrict when we try to align cow fork delalloc to cowextsz hints
| * 6724a3faa8 xfs: allow unlinked symlinks and dirs with zero size
| * df403c882f xfs: fix freeing speculative preallocations for preallocated files
| * 9e1ad0875e xfs: make sure sb_fdblocks is non-negative
| * 80d3d1e7a2 xfs: allow symlinks with short remote targets
| * 251af3b8c1 xfs: convert delayed extents to unwritten when zeroing post eof blocks
| * 9ae4afcb9f xfs: make xfs_bmapi_convert_delalloc() to allocate the target offset
| * b4dbf90564 xfs: make the seq argument to xfs_bmapi_convert_delalloc() optional
| * 0e2fcf273b xfs: match lock mode in xfs_buffered_write_iomap_begin()
| * 7bfa86d204 xfs: revert commit 44af6c7e59
| * b359d2ee93 xfs: validate recovered name buffers when recovering xattr items
| * d6f7f0ddc4 xfs: check opcode and iovec count match in xlog_recover_attri_commit_pass2
| * 3a97d267fd xfs: require XFS_SB_FEAT_INCOMPAT_LOG_XATTRS for attr log intent item recovery
| * 2edfd2c87c xfs: remove a racy if_bytes check in xfs_reflink_end_cow_extent
| * 1e2a60807f xfs: fix xfs_bmap_add_extent_delay_real for partial conversions
| * ddbfb6adb0 xfs: fix error returns from xfs_bmapi_write
| * 441021e5b3 tracing: Fix oob write in trace_seq_to_buffer()
| * 15888cd413 cpufreq: Fix setting policy limits when frequency tables are used
| * 681400579b cpufreq: Avoid using inconsistent policy->min and policy->max
| * e34a33d5d7 ksmbd: fix use-after-free in kerberos authentication
| * cf443f3145 platform/x86/intel-uncore-freq: Fix missing uncore sysfs during CPU hotplug
| * 810947bfbb iommu/vt-d: Apply quirk_iommu_igfx for 8086:0044 (QM57/QS57)
| * c3f37faa71 iommu/amd: Fix potential buffer overflow in parse_ivrs_acpihid
| * 2dd9448441 dm: always update the array size in realloc_argv on success
| * 12351db6c3 dm-integrity: fix a warning on invalid table line
| * 524b70441b wifi: brcm80211: fmac: Add error handling for brcmf_usb_dl_writeimage()
| * 3eaa5e3630 mmc: renesas_sdhi: Fix error handling in renesas_sdhi_probe
| * 45aced97f0 irqchip/qcom-mpm: Prevent crash when trying to handle non-wake GPIOs
| * bdabd4ee04 amd-xgbe: Fix to ensure dependent features are toggled with RX checksum offload
| * 160153cf9e perf/x86/intel: KVM: Mask PEBS_ENABLE loaded for guest with vCPU's value.
| * 6c639af49e parisc: Fix double SIGFPE crash
| * 446289b8b3 arm64: errata: Add missing sentinels to Spectre-BHB MIDR arrays
| * b36749bb27 i2c: imx-lpi2c: Fix clock count when probe defers
| * a62780b542 EDAC/altera: Set DDR and SDMMC interrupt mask before registration
| * 1705059287 EDAC/altera: Test the correct error reg offset
| * 47ca11836c drm/nouveau: Fix WARN_ON in nouveau_fence_context_kill()
| * 6649a1dbcd ALSA: usb-audio: Add second USB ID for Jabra Evolve 65 headset
| * 3cdbf62209 Revert "rndis_host: Flag RNDIS modems as WWAN devices"
* | a70a8dc18f Merge 6.1.137 into android14-6.1-lts
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| * ac7079a42e Linux 6.1.137
| * 8b4c07bb51 LoongArch: Fix build error due to backport
* | 3b32124339 ANDROID: GKI: Add bpf_redirect_info to virtual_device symbol list.
* | 6751b87143 ANDROID: GKI: fix up crc issue in crypto_get_default_null_skcipher()
* | 0b32b5b8c1 Revert "module: sign with sha512 instead of sha1 by default"
* | e63ea17387 Merge 6.1.136 into android14-6.1-lts
|\|
| * b6736e0375 Linux 6.1.136
| * 715b345153 objtool: Silence more KCOV warnings, part 2
| * cfe7fd06a1 ASoC: qcom: q6afe-dai: fix Display Port Playback stream name
| * fbf45385e3 PCI: Fix use-after-free in pci_bus_release_domain_nr()
| * 353e182012 tracing: Remove pointer (asterisk) and brackets from cpumask_t field
| * c8cbb6179c phy: freescale: imx8m-pcie: Add one missing error return
| * fc053d2df4 phy: freescale: imx8m-pcie: Do CMN_RST just before PHY PLL lock check
| * 1a9e5875c5 nvme: fixup scan failure for non-ANA multipath controllers
| * 48600cbc4b MIPS: cm: Fix warning if MIPS_CM is disabled
| * ae43d74d45 xdp: Reset bpf_redirect_info before running a xdp's BPF prog.
| * 3aaca46e8f net: dsa: mv88e6xxx: enable STU methods for 6320 family
| * 503d67b31c net: dsa: mv88e6xxx: enable .port_set_policy() for 6320 family
| * 9ff467ae32 net: dsa: mv88e6xxx: enable PVT for 6321 switch
| * dc6b55cfe7 net: dsa: mv88e6xxx: fix atu_move_port_mask for 6341 family
| * e873e8f7d0 net/sched: act_mirred: don't override retval if we already lost the skb
| * 4f9f61598b crypto: atmel-sha204a - Set hwrng quality to lowest possible
| * 3a57f45b91 comedi: jr3_pci: Fix synchronous deletion of timer
| * 63d956acbf jfs: define xtree root and page independently
| * 5d59fd637a of: module: add buffer overflow check in of_modalias()
| * 2fea0d6d7b spi: spi-imx: Add check for spi_imx_setupxfer()
| * fc9629651b md/raid1: Add check for missing source disk in process_checks()
| * 61b36bdc70 ubsan: Fix panic from test_ubsan_out_of_bounds
| * af1c735e21 spi: tegra210-quad: add rate limiting and simplify timeout error message
| * 009847bd69 spi: tegra210-quad: use WARN_ON_ONCE instead of WARN_ON for timeouts
| * 342a5dfc21 loop: aio inherit the ioprio of original request
| * ddc9ef51bc x86/i8253: Call clockevent_i8253_disable() with interrupts disabled
| * 30e482dfb8 scsi: pm80xx: Set phy_attached to zero when device is gone
| * dae1e15fcc scsi: ufs: exynos: Ensure pre_link() executes before exynos_ufs_phy_init()
| * 9e3014d786 scsi: hisi_sas: Fix I/O errors caused by hardware port ID changes
| * 39ebdc2d51 ext4: make block validity check resistent to sb bh corruption
| * 0c2aea3235 nvmet-fc: put ref when assoc->del_work is already scheduled
| * b7f235cb88 nvmet-fc: take tgtport reference only once
| * 2184c42971 x86/bugs: Don't fill RSB on context switch with eIBRS
| * 3b2efa5695 x86/bugs: Don't fill RSB on VMEXIT with eIBRS+retpoline
| * 14b1cbf034 x86/bugs: Use SBPB in write_ibpb() if applicable
| * 6c94a16ba2 selftests/mincore: Allow read-ahead pages to reach the end of the file
| * 4aebc6708c objtool: Stop UNRET validation on UD2
| * 498027367f nvme: re-read ANA log page after ns scan completes
| * 510ba30dd3 ACPI PPTT: Fix coding mistakes in a couple of sizeof() calls
| * d4444abc19 ACPI: EC: Set ec_no_wakeup for Lenovo Go S
| * 2fbd0e1930 nvme: requeue namespace scan on missed AENs
| * e9f8bfb80e xen: Change xen-acpi-processor dom0 dependency
| * 9ce224eb5a selftests: ublk: fix test_stripe_04
| * 3f6c9d66e0 udmabuf: fix a buf size overflow issue during udmabuf creation
| * b16d315a18 KVM: s390: Don't use %pK through tracepoints
| * dcd21345eb sched/isolation: Make CONFIG_CPU_ISOLATION depend on CONFIG_SMP
| * b22fac54c5 rtc: pcf85063: do a SW reset if POR failed
| * 468ff4a7c6 9p/net: fix improper handling of bogus negative read/write replies
| * 43b498a845 ntb_hw_amd: Add NTB PCI ID for new gen CPU
| * 763bf67ed3 ntb: reduce stack usage in idt_scan_mws
| * 545defa656 qibfs: fix _another_ leak
| * f93a840d4b objtool, lkdtm: Obfuscate the do_nothing() pointer
| * 4e57e330fb objtool, ASoC: codecs: wcd934x: Remove potential undefined behavior in wcd934x_slim_irq_handler()
| * 5f9385723a objtool: Silence more KCOV warnings
| * bc49c5103e thunderbolt: Scan retimers after device router has been enumerated
| * 7e8f1dbf9b usb: host: xhci-plat: mvebu: use ->quirks instead of ->init_quirk() func
| * 36d6815171 usb: gadget: aspeed: Add NULL pointer check in ast_vhub_init_dev()
| * 9e7bcd1e2b usb: xhci: Avoid Stop Endpoint retry loop if the endpoint seems Running
| * d9a60dd67b dmaengine: dmatest: Fix dmatest waiting less when interrupted
| * 54c7b864fb sound/virtio: Fix cancel_sync warnings on uninitialized work_structs
| * c2902e8abc usb: dwc3: gadget: Avoid using reserved endpoints on Intel Merrifield
| * a7a27cf25b usb: dwc3: gadget: Refactor loop to avoid NULL endpoints
| * 609c9ea787 fs/ntfs3: Fix WARNING in ntfs_extend_initialized_size
| * 27b12b5878 usb: host: max3421-hcd: Add missing spi_device_id table
| * 57089df327 s390/tty: Fix a potential memory leak bug
| * 397254706e s390/sclp: Add check for get_zeroed_page()
| * d0db2eb990 parisc: PDT: Fix missing prototype warning
| * 2236d765a3 clk: check for disabled clock-provider in of_clk_get_hw_from_clkspec()
| * 255cbc9db7 bpf: Fix deadlock between rcu_tasks_trace and event_mutex.
| * e27244cbe1 crypto: null - Use spin lock instead of mutex
| * aba9e3096b MIPS: cm: Detect CM quirks from device tree
| * ba9bf51801 pinctrl: renesas: rza2: Fix potential NULL pointer dereference
| * 64ebb33768 USB: wdm: add annotation
| * e0917befd1 USB: wdm: wdm_wwan_port_tx_complete mutex in atomic context
| * 217fe1fc7d USB: wdm: close race between wdm_open and wdm_wwan_port_stop
| * 15a7f14737 USB: wdm: handle IO errors in wdm_wwan_port_start
| * 6b607ae3f4 USB: VLI disk crashes if LPM is used
| * 219716ce07 usb: quirks: Add delay init quirk for SanDisk 3.2Gen1 Flash Drive
| * a408b8043a usb: quirks: add DELAY_INIT quirk for Silicon Motion Flash Drive
| * 07b491b601 usb: dwc3: xilinx: Prevent spike in reset signal
| * a445470152 usb: dwc3: gadget: check that event count does not exceed event buffer length
| * 8b4b7ad42a USB: OHCI: Add quirk for LS7A OHCI controller (rev 0x02)
| * df727eba55 usb: chipidea: ci_hdrc_imx: implement usb_phy_init() error handling
| * d2daafc3f0 usb: chipidea: ci_hdrc_imx: fix call balance of regulator routines
| * 0ee460498c usb: chipidea: ci_hdrc_imx: fix usbmisc handling
| * c27db84ed4 usb: cdns3: Fix deadlock when using NCM gadget
| * 0a8f200a1a USB: serial: simple: add OWON HDS200 series oscilloscope support
| * a5d0eaa074 USB: serial: option: add Sierra Wireless EM9291
| * acb866379e USB: serial: ftdi_sio: add support for Abacus Electrics Optical Probe
| * fd93c803f2 serial: sifive: lock port in startup()/shutdown() callbacks
| * 1adf7a1165 serial: msm: Configure correct working mode before starting earlycon
| * 4d43b7091e misc: microchip: pci1xxxx: Fix incorrect IRQ status handling during ack
| * 1263d5f581 misc: microchip: pci1xxxx: Fix Kernel panic during IRQ handler registration
| * 023816bd5f KVM: x86: Reset IRTE to host control if *new* route isn't postable
| * 38cfa866b7 KVM: x86: Explicitly treat routing entry type changes as changes
| * 05a5c6b0e8 mei: me: add panther lake H DID
| * 90757407ca USB: storage: quirk for ADATA Portable HDD CH94
| * c5b8a549ef mcb: fix a double free bug in chameleon_parse_gdd()
| * f46d889308 KVM: SVM: Allocate IR data using atomic allocation
| * 5d4636859a LoongArch: Remove a bogus reference to ZONE_DMA
| * 3425680572 LoongArch: Return NULL from huge_pte_offset() for invalid PMD
| * 128d261c72 drm/amd/display: Force full update in gpu reset
| * a4be735fe0 drm/amd/display: Fix gpu reset in multidisplay config
| * 24023ed8ff net: selftests: initialize TCP header and skb payload with zero
| * 5b83d30c63 xen-netfront: handle NULL returned by xdp_convert_buff_to_frame()
| * baa332e22f virtio_console: fix missing byte order handling for cols and rows
| * 4e8ce3978d wifi: rtw88: use ieee80211_purge_tx_queue() to purge TX skb
| * ff5a5dae30 wifi: mac80211: export ieee80211_purge_tx_queue() for drivers
| * 4e773aea05 LoongArch: Make regs_irqs_disabled() more clear
| * da3170fea4 LoongArch: Select ARCH_USE_MEMTEST
| * ecb3f8f890 perf/x86: Fix non-sampling (counting) events on certain x86 platforms
| * 9e75c93472 iommu/amd: Return an error if vCPU affinity is set for non-vCPU IRTE
| * 11bccb054c net_sched: hfsc: Fix a potential UAF in hfsc_dequeue() too
| * 20d584a33e net_sched: hfsc: Fix a UAF vulnerability in class handling
| * e79e8e05aa tipc: fix NULL pointer dereference in tipc_mon_reinit_self()
| * f41f097f68 net: phy: leds: fix memory leak
| * ceceff6d31 net: lwtunnel: disable BHs when required
| * 790bad9dc2 scsi: core: Clear flags for scsi_cmnd that did not complete
| * fd18210acb btrfs: avoid page_lockend underflow in btrfs_punch_hole_lock_range()
| * a252684ea1 cpufreq: cppc: Fix invalid return value in .get() callback
| * da8ee91e53 cpufreq: scpi: Fix null-ptr-deref in scpi_cpufreq_get_rate()
| * f9c5423855 cpufreq: scmi: Fix null-ptr-deref in scmi_cpufreq_get_rate()
| * 4bf6d7defb dma/contiguous: avoid warning about unused size_bytes
| * 19cc82616b selftests/mm: generate a temporary mountpoint for cgroup filesystem
| * d78888853e ASoC: qcom: Fix sc7280 lpass potential buffer overflow
| * 20ecb510d4 ASoC: qcom: q6dsp: add support to more display ports
| * 11f56f5a25 phy: freescale: imx8m-pcie: assert phy reset and perst in power off
| * cf0fbe3e9b phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY support
| * b783478e0c PCI: Fix reference leak in pci_register_host_bridge()
| * ead4d69b3e PCI: Assign PCI domain IDs by ida_alloc()
| * 9c32eaf8e4 of: resolver: Fix device node refcount leakage in of_resolve_phandles()
| * fc7e57c56d of: resolver: Simplify of_resolve_phandles() using __free()
| * b7f5964d03 clk: renesas: r9a07g043: Fix HP clock source for RZ/Five
| * 5053ee6f8d clk: renesas: r9a07g04[34]: Fix typo for sel_shdi variable
| * 8213d3a61f clk: renesas: r9a07g04[34]: Use SEL_SDHI1_STS status configuration for SD1 mux
| * 50563380f7 clk: renesas: rzg2l: Refactor SD mux driver
| * 94c31387f6 clk: renesas: rzg2l: Remove CPG_SDHI_DSEL from generic header
| * 0b78075a9c clk: renesas: rzg2l: Add struct clk_hw_data
| * a70a0ac48b clk: renesas: rzg2l: Use u32 for flag and mux_flags
| * b447885ec9 backlight: led_bl: Hold led_access lock when calling led_sysfs_disable()
| * c5a9d6c54d backlight: led_bl: Convert to platform remove callback returning void
| * 11f724853e iio: adc: ad7768-1: Fix conversion result sign
| * c13b7cacbc iio: adc: ad7768-1: Move setting of val a bit later to avoid unnecessary return value check
| * c239afce68 net: dsa: mv88e6xxx: fix VTU methods for 6320 family
| * 58c14a5e2a net: dsa: mv88e6xxx: fix internal PHYs for 6320 family
| * 4db3e956ca net: dsa: mv88e6xxx: add field to specify internal phys layout
| * 7cdba14d75 net: dsa: mv88e6xxx: pass directly chip structure to mv88e6xxx_phy_is_internal
| * 3edbf0fd90 net: dsa: mv88e6xxx: move link forcing to mac_prepare/mac_finish
| * f27b1e1fd3 net: dsa: add support for mac_prepare() and mac_finish() calls
| * 9369d414ee net: dsa: mv88e6xxx: don't dispose of Global2 IRQ mappings from mdiobus code
| * 0882b47507 auxdisplay: hd44780: Fix an API misuse in hd44780.c
| * 4b9c5e6e89 auxdisplay: hd44780: Convert to platform remove callback returning void
| * 6854c87ac8 tracing: Verify event formats that have "%*p.."
| * 480b9fc4b2 tracing: Add __print_dynamic_array() helper
| * 247feaa174 tracing: Add __string_len() example
| * 41abc05ab8 tracing: Fix cpumask() example typo
| * 3c8a30f95b tracing: Add __cpumask to denote a trace event field that is a cpumask_t
| * 7c2f874c63 module: sign with sha512 instead of sha1 by default
* | ae9d2e99d9 Merge 6.1.135 into android14-6.1-lts
|\|
| * 535ec20c50 Linux 6.1.135
| * ed4125569b ALSA: hda/realtek: Fix built-in mic on another ASUS VivoBook model
| * ca9f84de76 md: fix mddev uaf while iterating all_mddevs list
| * bf1dc50bd5 md: factor out a helper from mddev_put()
| * 92f0f21b9a MIPS: ds1287: Match ds1287_set_base_clock() function types
| * d268e58918 MIPS: cevt-ds1287: Add missing ds1287.h include
| * 0dde1e38fb MIPS: dec: Declare which_prom() as static
* | fcf8d4d8b3 Merge f331105699 ("sign-file,extract-cert: use pkcs11 provider for OPENSSL MAJOR >= 3") into android14-6.1-lts
|\|
| * f331105699 sign-file,extract-cert: use pkcs11 provider for OPENSSL MAJOR >= 3
| * 6e3319a2e0 sign-file,extract-cert: avoid using deprecated ERR_get_error_line()
| * 3437e90d15 sign-file,extract-cert: move common SSL helper functions to a header
* | 816b54a70d Revert "blk-cgroup: support to track if policy is online"
* | 44fe4b43e9 Revert "blk-iocost: do not WARN if iocg was already offlined"
* | ac80043d0f Revert "bpf: Prevent tail call between progs attached to different hooks"
* | 92d048684a Merge 16c54d6a49 ("mm: fix apply_to_existing_page_range()") into android14-6.1-lts
|\|
| * 16c54d6a49 mm: fix apply_to_existing_page_range()
| * aed0aac18f blk-iocost: do not WARN if iocg was already offlined
| * 3154d64ff9 blk-cgroup: support to track if policy is online
| * d9a807fb7c bpf: Prevent tail call between progs attached to different hooks
| * 4759acbd44 bpf: avoid holding freeze_mutex during mmap operation
| * 282d1aa225 btrfs: fix the length of reserved qgroup to free
| * 7d8bb979f6 cifs: use origin fullpath for automounts
| * ec28c35029 smb/server: fix potential null-ptr-deref of lease_ctx_info in smb2_open()
| * f27602b638 nvmet-fc: Remove unused functions
| * e37eabef53 Revert "LoongArch: BPF: Fix off-by-one error in build_prologue()"
| * b66bc16f4c landlock: Add the errata interface
| * 13080d052c drm/amd/display: Stop amdgpu_dm initialize when link nums greater than max_links
| * 615c8f70be Revert "Xen/swiotlb: mark xen_swiotlb_fixup() __init"
| * eec34d7d14 btrfs: zoned: fix zone finishing with missing devices
| * 4aecf1c211 btrfs: zoned: fix zone activation with missing devices
| * 159f0f61b2 btrfs: fix qgroup reserve leaks in cow_file_range
| * 2a07aea0ac LoongArch: Eliminate superfluous get_numa_distances_cnt()
| * b137af7953 powerpc/rtas: Prevent Spectre v1 gadget construction in sys_rtas()
| * 32e3456454 x86/pvh: Call C code via the kernel virtual mapping
| * 8dfff85d5d x86/split_lock: Fix the delayed detection logic
| * edde34b792 mm: Fix is_zero_page() usage in try_grab_page()
| * 13beac8e96 misc: pci_endpoint_test: Fix 'irq_type' to convey the correct type
| * 53f4df92a8 misc: pci_endpoint_test: Fix displaying 'irq_type' after 'request_irq' error
| * 9d5118b107 misc: pci_endpoint_test: Avoid issue of interrupts remaining after request_irq error
| * 6cc2c355aa mptcp: sockopt: fix getting freebind & transparent
| * 89e1132bbf media: mediatek: vcodec: mark vdec_vp9_slice_map_counts_eob_coef noinline
| * b3c789419f kbuild: Add '-fno-builtin-wcslen'
| * 0bf87fafc1 cpufreq: Reference count policy in cpufreq_update_limits()
* | 3ba386dd55 Merge 17c7f46efb ("KVM: arm64: Eagerly switch ZCR_EL{1,2}") into android14-6.1-lts
|\|
| * 17c7f46efb KVM: arm64: Eagerly switch ZCR_EL{1,2}
| * bde20e154a KVM: arm64: Calculate cptr_el2 traps on activating traps
| * 0ff8c9a71e KVM: arm64: Mark some header functions as inline
| * 60d55eb282 KVM: arm64: Refactor exit handlers
| * 6648fef8ff KVM: arm64: Remove VHE host restore of CPACR_EL1.SMEN
| * 9f2386b273 KVM: arm64: Remove VHE host restore of CPACR_EL1.ZEN
| * a539ca5c23 KVM: arm64: Remove host FPSIMD saving for non-protected KVM
| * 04c50cc23a KVM: arm64: Unconditionally save+flush host FPSIMD/SVE/SME state
| * 2fb8365017 arm64/fpsimd: Stop using TIF_SVE to manage register saving in KVM
| * 254fe3a162 arm64/fpsimd: Have KVM explicitly say which FP registers to save
| * 312024dc1b arm64/fpsimd: Track the saved FPSIMD state type separately to TIF_SVE
| * d5f7d3833b KVM: arm64: Discard any SVE state when entering KVM guests
* | d46f37d6c7 Merge dc7bdc1f2d ("io_uring/net: fix accept multishot handling") into android14-6.1-lts
|\|
| * dc7bdc1f2d io_uring/net: fix accept multishot handling
| * b8acdc413f drm/i915/gvt: fix unterminated-string-initialization warning
| * 4e4bd92623 drm/sti: remove duplicate object names
| * 12b038d521 drm/nouveau: prime: fix ttm_bo_delayed_delete oops
| * 6785702f4a drm/amdgpu/dma_buf: fix page_link check
| * ffd6888044 drm/amd/pm/powerplay/hwmgr/vega20_thermal: Prevent division by zero
| * 8f7b5987e2 drm/amd/pm/swsmu/smu13/smu_v13_0: Prevent division by zero
| * 5fc4fb54f6 drm/amd/pm/powerplay/hwmgr/smu7_thermal: Prevent division by zero
| * de6f8e0534 drm/amd/pm/smu11: Prevent division by zero
| * 836a189fb4 drm/amd/pm/powerplay: Prevent division by zero
| * 402964994e drm/amd/pm: Prevent division by zero
| * c812997534 drm/amd: Handle being compiled without SI or CIK support better
| * db783adae1 drm/msm/a6xx: Fix stale rpmh votes from GPU
| * 3ba56fc34f drm/repaper: fix integer overflows in repeat functions
| * 59f3925c3f perf/x86/intel/uncore: Fix the scale of IIO free running counters on SPR
| * 96b2982f12 perf/x86/intel/uncore: Fix the scale of IIO free running counters on ICX
| * 8a809a8bcb perf/x86/intel/uncore: Fix the scale of IIO free running counters on SNR
| * 311b205fa9 perf/x86/intel: Allow to update user space GPRs from PEBS records
| * 51003b2c87 RDMA/cma: Fix workqueue crash in cma_netevent_work_handler
| * 3ddca18534 scsi: ufs: exynos: Ensure consistent phy reference counts
| * e72c35de50 scsi: megaraid_sas: Block zero-length ATA VPD inquiry
| * 599d1e2a6a virtiofs: add filesystem context source name check
| * b4a9e164dd tracing: Fix filter string testing
| * b04eaa8de3 string: Add load_unaligned_zeropad() code path to sized_strscpy()
| * 220f0fd6ac smb3 client: fix open hardlink on deferred close file error
| * 0f5de9dee5 riscv: Avoid fortify warning in syscall_get_arguments()
| * 44079e544c ksmbd: fix the warning from __kernel_write_iter
| * 817fbb8957 ksmbd: Prevent integer overflow in calculation of deadtime
| * d5b554bc8d ksmbd: Fix dangling pointer in krb_authenticate
| * f95a2ec3ec mm: fix filemap_get_folios_contig returning batches of identical folios
| * a6e7f6018d mm/gup: fix wrongly calculated returned value in fault_in_safe_writeable()
| * 5cdc985c41 loop: LOOP_SET_FD: send uevents for partitions
| * df5118fd61 loop: properly send KOBJ_CHANGED uevent for disk device
| * 0fdafdaef7 isofs: Prevent the use of too small fid
| * 3090cad5cc i2c: cros-ec-tunnel: defer probe if parent EC is not present
* | b918f051e3 Revert "arm64: errata: Add newer ARM cores to the spectre_bhb_loop_affected() lists"
* | e106f14940 Merge 0296f97335 ("hfs/hfsplus: fix slab-out-of-bounds in hfs_bnode_read_key") into android14-6.1-lts
|\|
| * 0296f97335 hfs/hfsplus: fix slab-out-of-bounds in hfs_bnode_read_key
| * e9b5d6e1bd crypto: caam/qi - Fix drv_ctx refcount bug
| * 9734612bd8 btrfs: correctly escape subvol in btrfs_show_options()
| * ba903539ff nfsd: decrease sc_count directly if fail to queue dl_recall
| * 3a47d1e8ef nfs: add missing selections of CONFIG_CRC32
| * 5ed9e05f59 nfs: move nfs_fhandle_hash to common include file
| * 943fe13970 asus-laptop: Fix an uninitialized variable
| * 8ba70a72f5 ASoC: codecs:lpass-wsa-macro: Fix logic of enabling vi channels
| * 96c93b30e1 ASoC: codecs:lpass-wsa-macro: Fix vi feedback rate
| * 94515f5fc0 Revert "PCI: Avoid reset when disabled via sysfs"
| * b4df8b74bd writeback: fix false warning in inode_to_wb()
| * 0819b7c062 cpufreq/sched: Fix the usage of CPUFREQ_NEED_UPDATE_LIMITS
| * 6a088c7d50 riscv: KGDB: Remove ".option norvc/.option rvc" for kgdb_compiled_break
| * 0047bf9bda riscv: KGDB: Do not inline arch_kgdb_breakpoint()
| * b23e67fac7 riscv: Properly export reserved regions in /proc/iomem
| * a6cb881e21 ptp: ocp: fix start time alignment in ptp_ocp_signal_set
| * 343246e469 net: dsa: avoid refcount warnings when ds->ops->tag_8021q_vlan_del() fails
| * 35cde75c08 net: dsa: mv88e6xxx: fix -ENOENT when deleting VLANs and MST is unsupported
| * b3c70dfe51 net: dsa: mv88e6xxx: avoid unregistering devlink regions which were never registered
| * f06b5b4225 net: bridge: switchdev: do not notify new brentries as changed
| * 464f78d35f net: b53: enable BPDU reception for management port
| * fa2d770895 cxgb4: fix memory leak in cxgb4_init_ethtool_filters() error path
| * 1489c195c8 net: openvswitch: fix nested key length validation in the set() action
| * b9764ebebb net: mctp: Set SOCK_RCU_FREE
| * d8a632fbc7 test suite: use %zu to print size_t
| * eac3413518 igc: cleanup PTP module if probe fails
| * 81e25321c6 igc: handle the IGC_PTP_ENABLED flag correctly
| * cfeeec7c5e igc: move ktime snapshot into PTM retry loop
| * 0c03e4fbe1 igc: fix PTM cycle trigger logic
| * e4cab92aca Revert "wifi: mac80211: Update skb's control block key in ieee80211_tx_dequeue()"
| * c6d527bbd3 Bluetooth: l2cap: Check encryption key size on incoming connection
| * d844181869 Bluetooth: btrtl: Prevent potential NULL dereference
| * d54bc626c8 Bluetooth: hci_event: Fix sending MGMT_EV_DEVICE_FOUND for invalid address
| * 6c588e9afb RDMA/core: Silence oversized kvmalloc() warning
| * 883ca52730 RDMA/hns: Fix wrong maximum DMA segment size
| * 837af21fd3 RDMA/usnic: Fix passing zero to PTR_ERR in usnic_ib_pci_probe()
| * 065f4b1cd4 md/md-bitmap: fix stats collection for external bitmaps
| * 4a05f7ae33 md/raid10: fix missing discard IO accounting
| * 3943754c69 scsi: iscsi: Fix missing scsi_host_put() in error path
| * 8fd4b9551a wifi: wl1251: fix memory leak in wl1251_tx_work
| * 5f6863dc40 wifi: mac80211: Purge vif txq in ieee80211_do_stop()
| * a167a2833d wifi: mac80211: Update skb's control block key in ieee80211_tx_dequeue()
| * 5e7df74745 wifi: at76c50x: fix use after free access in at76_disconnect
| * 1ac5eb4aa2 scsi: hisi_sas: Enable force phy when SATA disk directly connected
| * d58493832e HSI: ssi_protocol: Fix use after free vulnerability in ssi_protocol Driver Due to Race Condition
| * 80f14e9de6 Bluetooth: hci_uart: Fix another race during initialization
| * 8a1b01b7f6 x86/e820: Fix handling of subpage regions when calculating nosave ranges in e820__register_nosave_regions()
| * 6dd04ebe2b ACPI: platform-profile: Fix CFI violation when accessing sysfs files
| * a53b3599d9 arm64: errata: Add newer ARM cores to the spectre_bhb_loop_affected() lists
* | 4f3eb66089 Merge 47b445fc79 ("selftests: mptcp: close fd_in before returning in main_loop") into android14-6.1-lts
|\|
| * 47b445fc79 selftests: mptcp: close fd_in before returning in main_loop
* | 8d8b1f0393 Merge 696198f89a ("pinctrl: qcom: Clear latched interrupt status when changing IRQ type") into android14-6.1-lts
|\|
| * 696198f89a pinctrl: qcom: Clear latched interrupt status when changing IRQ type
| * eb602e8c4e PCI: Fix reference leak in pci_alloc_child_bus()
| * 210f00e9b5 PCI: brcmstb: Fix missing of_node_put() in brcm_pcie_probe()
| * c467dbd5f1 of/irq: Fix device node refcount leakages in of_irq_init()
| * 338f7aa649 of/irq: Fix device node refcount leakage in API irq_of_parse_and_map()
| * 78d928bd60 of/irq: Fix device node refcount leakages in of_irq_count()
| * b84b58ae4f of/irq: Fix device node refcount leakage in API of_irq_parse_raw()
| * ceb4266a78 of/irq: Fix device node refcount leakage in API of_irq_parse_one()
| * fbb0967846 ntb: use 64-bit arithmetic for the MSI doorbell mask
| * 0357c8406d KVM: x86: Acquire SRCU in KVM_GET_MP_STATE to protect guest memory accesses
| * 3d4aa02359 gve: handle overflow when reporting TX consumed descriptors
| * bcfb1e4eb0 gpio: zynq: Fix wakeup source leaks on device unbind
| * 5b3cc7e03c gpio: tegra186: fix resource handling in ACPI probe path
| * 8dd7d72803 ftrace: Add cond_resched() to ftrace_graph_set_hash()
| * 3e070367ff dm-verity: fix prefetch-vs-suspend race
| * 5162ecc2d9 dm-integrity: set ti->error on memory allocation failure
| * e89228ddd5 dm-ebs: fix prefetch-vs-suspend race
| * 0642f87cbf crypto: ccp - Fix check for the primary ASP device
| * 8b75a7c1e4 clk: qcom: gdsc: Set retain_ff before moving to HW CTRL
| * c0322b7635 clk: qcom: gdsc: Capture pm_genpd_add_subdomain result code
| * 62d14a1d2e clk: qcom: gdsc: Release pm subdomains in reverse add order
| * 3db0ca61cb cifs: fix integer overflow in match_server()
| * b2a1833e1c cifs: avoid NULL pointer dereference in dbg call
| * ad756ecd45 thermal/drivers/rockchip: Add missing rk3328 mapping entry
| * 7a63f4fb0e sctp: detect and prevent references to a freed transport in sendmsg
| * 974193e137 mm/hwpoison: do not send SIGBUS to processes with recovered clean pages
| * 45970be1f0 mm: add missing release barrier on PGDAT_RECLAIM_LOCKED unlock
| * aa82be5125 mm/rmap: reject hugetlb folios in folio_make_device_exclusive()
| * 36106d1c27 sparc/mm: disable preemption in lazy mmu mode
| * 6eef9c02b6 btrfs: fix non-empty delayed iputs list on unmount due to compressed write workers
| * 11a99abdda arm64: dts: mediatek: mt8173: Fix disp-pwm compatible string
| * f4c4bb9eb3 arm64: mm: Correct the update of max_pfn
| * a84cbabf06 mtd: rawnand: Add status chack in r852_ready()
| * 6af3b92b1c mtd: inftlcore: Add error check for inftl_read_oob()
| * 1c20a592a1 mptcp: only inc MPJoinAckHMacFailure for HMAC failures
| * 855bf0aacd mptcp: fix NULL pointer in can_accept_new_subflow
| * becd8185b5 lib: scatterlist: fix sg_split_phys to preserve original scatterlist offsets
| * a9e4bebec6 locking/lockdep: Decrease nr_unused_locks if lock unused in zap_class()
| * 2edb5b29b1 mfd: ene-kb3930: Fix a potential NULL pointer dereference
| * 3b4643ffaf jbd2: remove wrong sb->s_sequence check
| * d83b0c03ef i3c: Add NULL pointer check in i3c_master_queue_ibi()
| * e49341f7a6 i3c: master: svc: Use readsb helper for reading MDB
| * 4e73e1f685 smb311 client: fix missing tcon check when mounting with linux/posix extensions
| * 475b9b45dc soc: samsung: exynos-chipid: Add NULL pointer check in exynos_chipid_probe()
| * d3071c1b7c vdpa/mlx5: Fix oversized null mkey longer than 32bit
| * 35d0aa6db9 ext4: fix off-by-one error in do_split
| * 3e7ecf181c bus: mhi: host: Fix race between unprepare and queue_buf
| * 8a021b7701 ASoC: qdsp6: q6asm-dai: fix q6asm_dai_compr_set_params error path
| * f4b34e1e97 ASoC: qdsp6: q6apm-dai: fix capture pipeline overruns.
| * ad3f29747a ASoC: qdsp6: q6apm-dai: set 10 ms period and buffer alignment.
* | 055c0956b9 Merge be562a7f7f ("io_uring/kbuf: reject zero sized provided buffers") into android14-6.1-lts
|\|
| * be562a7f7f io_uring/kbuf: reject zero sized provided buffers
| * 43736338e3 wifi: mac80211: fix integer overflow in hwmp_route_info_get()
| * 5862c312f5 wifi: mt76: Add check for devm_kstrdup()
| * 58f6dae978 clocksource/drivers/stm32-lptimer: Use wakeup capable instead of init wakeup
| * 7312fc9dde mtd: Replace kcalloc() with devm_kcalloc()
| * 5ad7308011 net: dsa: mv88e6xxx: workaround RGMII transmit delay erratum for 6320 family
| * b279480adc mtd: Add check for devm_kcalloc()
| * 12025f8350 mptcp: sockopt: fix getting IPV6_V6ONLY
| * 0f9a4bab7d media: venus: hfi_parser: refactor hfi packet parsing logic
| * 26bbedd06d media: venus: hfi_parser: add check to avoid out of bound access
| * bb786c8144 media: i2c: ov7251: Introduce 1 ms delay between regulators and en GPIO
| * 2dd2d13c0b media: i2c: ov7251: Set enable GPIO low in probe
| * a32e7319e6 media: i2c: ccs: Set the device's runtime PM status correctly in probe
| * 26ddb187ba media: i2c: ccs: Set the device's runtime PM status correctly in remove
| * dc4620a0d8 media: v4l2-dv-timings: prevent possible overflow in v4l2_detect_gtf()
| * f8b29f2d90 media: platform: stm32: Add check for clk_enable()
| * b31a8ec0d8 media: streamzap: prevent processing IR data on URB failure
| * a3f4d28273 tpm, tpm_tis: Fix timeout handling when waiting for TPM status
| * 9dd161f707 mtd: rawnand: brcmnand: fix PM resume warning
| * 076cce6f50 spi: cadence-qspi: Fix probe on AM62A LP SK
| * 07476e0d93 KVM: arm64: Tear down vGIC on failed vCPU creation
| * 75791c0441 arm64: errata: Add KRYO 2XX/3XX/4XX silver cores to Spectre BHB safe list
| * f2e4ca0c40 arm64: errata: Assume that unknown CPUs _are_ vulnerable to Spectre BHB
| * e03cc3e607 arm64: errata: Add QCOM_KRYO_4XX_GOLD to the spectre_bhb_k24_list
| * 2ab5389f9d arm64: cputype: Add MIDR_CORTEX_A76AE
| * 4b8cf3ca46 xenfs/xensyms: respect hypervisor's "next" indication
| * 2257072fc6 media: siano: Fix error handling in smsdvb_module_init()
| * 455fd2951b media: vim2m: print device name after registering device
| * cf5f7bb4e0 media: venus: hfi: add check to handle incorrect queue size
| * 4e95233af5 media: venus: hfi: add a check to handle OOB in sfr region
| * aaf8d62abe media: i2c: adv748x: Fix test pattern selection mask
| * ac8d33ae62 ext4: don't treat fhandle lookup of ea_inode as FS corruption
| * 08a6459207 bpf: support SKF_NET_OFF and SKF_LL_OFF on skb frags
| * d2134bf402 pwm: fsl-ftm: Handle clk_get_rate() returning 0
| * 52bced4b6c pwm: rcar: Improve register calculation
| * f3e9cf266c pwm: mediatek: Prevent divide-by-zero in pwm_mediatek_config()
| * b79faed289 tpm, tpm_tis: Workaround failed command reception on Infineon devices
| * 1a5b71022e ktest: Fix Test Failures Due to Missing LOG_FILE Directories
| * 660a53a069 fbdev: omapfb: Add 'plane' value check
| * b951cf102f drm/amdgpu: grab an additional reference on the gang fence v2
| * c2968c8123 PCI: vmd: Make vmd_dev::cfg_lock a raw_spinlock_t type
| * 55ef52c30c drm/amdgpu: handle amdgpu_cgs_create_device() errors in amd_powerplay_create()
| * dd686b699b drm/mediatek: mtk_dpi: Explicitly manage TVD clock in power on/off
| * 0003302ff2 drm/mediatek: mtk_dpi: Move the input_2p_en bit to platform data
| * 4262d78491 drm/amdkfd: Fix pqm_destroy_queue race with GPU reset
| * 57c9dabda8 drm/amdkfd: Fix mode1 reset crash issue
| * 82b6aaa867 drm/amdkfd: clamp queue size to minimum
| * 16961e025b drivers: base: devres: Allow to release group on device release
| * 0b67e9c8e7 drm/bridge: panel: forbid initializing a panel with unknown connector type
| * 55bd37d4be drm: panel-orientation-quirks: Add quirk for OneXPlayer Mini (Intel)
| * 2f292d7e28 drm: panel-orientation-quirks: Add new quirk for GPD Win 2
| * e6920a632a drm: panel-orientation-quirks: Add quirk for AYA NEO Slide
| * c7b6d31422 drm: panel-orientation-quirks: Add quirks for AYA NEO Flip DS and KB
| * 0f1abea4a0 drm: panel-orientation-quirks: Add support for AYANEO 2S
* | c80ed510de Merge b2ebe6c3ff ("drm/amd/display: Update Cursor request mode to the beginning prefetch always") into android14-6.1-lts
|\|
| * b2ebe6c3ff drm/amd/display: Update Cursor request mode to the beginning prefetch always
| * b09c25c6b0 drm: allow encoder mode_set even when connectors change for crtc
| * 6e5534f4f9 Bluetooth: qca: simplify WCN399x NVM loading
| * 9cf7dccaa7 Bluetooth: hci_uart: fix race during initialization
| * 1b1828b42f tracing: fix return value in __ftrace_event_enable_disable for TRACE_REG_UNREGISTER
| * 53fb25e90c net: vlan: don't propagate flags on open
| * 31d4365223 wifi: mt76: mt76x2u: add TP-Link TL-WDN6200 ID to device table
| * f746fe0c51 scsi: st: Fix array overflow in st_setup()
| * cf9291a344 ext4: ignore xattrs past end
| * 54f4e64de7 ext4: protect ext4_release_dquot against freezing
| * 4d82ed5801 ahci: add PCI ID for Marvell 88SE9215 SATA Controller
| * 98dbf2af63 f2fs: fix to avoid out-of-bounds access in f2fs_truncate_inode_blocks()
| * 5b4fc3c402 ata: libata-eh: Do not use ATAPI DMA for a device limited to PIO mode
| * a260bf14cd jfs: add sanity check for agwidth in dbMount
| * c9541c2bd0 jfs: Prevent copying of nlink with value 0 from disk inode
| * 55edbf5dbf fs/jfs: Prevent integer overflow in AG size calculation
| * 7307c8a0cc fs/jfs: cast inactags to s64 to prevent potential overflow
| * cab1852368 jfs: Fix uninit-value access of imap allocated in the diMount() function
| * 90e089a645 page_pool: avoid infinite loop to schedule delayed worker
| * 3d1b15f620 f2fs: don't retry IO for corrupted data scenario
| * c9c018678e ASoC: amd: Add DMI quirk for ACP6X mic support
| * 908abfdfdb ALSA: usb-audio: Fix CME quirk for UF series keyboards
| * 2de2827e5c mmc: dw_mmc: add a quirk for accessing 64-bit FIFOs in two halves
| * 4e587fb8b6 ASoC: fsl_audmix: register card device depends on 'dais' property
| * 2bb2136ef5 ALSA: hda: intel: Add Lenovo IdeaPad Z570 to probe denylist
| * 922c542886 ALSA: hda: intel: Fix Optimus when GPU has no sound
| * ddb1478852 HID: pidff: Fix null pointer dereference in pidff_find_fields
| * e916d4587b HID: pidff: Do not send effect envelope if it's empty
| * fbb2f79b3c HID: pidff: Convert infinite length from Linux API to PID standard
| * 72be128730 xen/mcelog: Add __nonstring annotations for unterminated strings
| * 4746f2dd81 arm64: cputype: Add QCOM_CPU_PART_KRYO_3XX_GOLD
| * 36a7a63c39 perf: arm_pmu: Don't disable counter in armpmu_add()
| * 5d2f3d433f x86/cpu: Don't clear X86_FEATURE_LAHF_LM flag in init_amd_k8() on AMD when running in a virtual machine
| * 87b9f0867c pm: cpupower: bench: Prevent NULL dereference on malloc failure
| * eda5865869 umount: Allow superblock owners to force umount
| * 08cf79c786 fs: consistently deref the files table with rcu_dereference_raw()
| * 2f75cb27be iommu/mediatek: Fix NULL pointer deference in mtk_iommu_device_group
| * 4ffb746ece nft_set_pipapo: fix incorrect avx2 match of 5th field octet
| * b78f2b458f net: ppp: Add bound checking for skb data on ppp_sync_txmung
| * a98d0ba2f6 ipv6: Align behavior across nexthops during path selection
| * 1348214fa0 net_sched: sch_sfq: move the limit validation
| * d5108432f0 net_sched: sch_sfq: use a temporary work area for validating configuration
| * b64c8c75c9 nvmet-fcloop: swap list_add_tail arguments
| * 25344c2a95 ata: sata_sx4: Add error handling in pdc20621_i2c_read()
| * ec9faff49a net: ethtool: Don't call .cleanup_data when prepare_data fails
| * f6b84d1cfb tc: Ensure we have enough buffer space when sending filter netlink notifications
| * 3051d6d2d4 net/sched: cls_api: conditional notification of events
| * db5d2b27e4 rtnl: add helper to check if a notification is needed
| * 8ab0c35a95 rtnl: add helper to check if rtnl group has listeners
| * f3ce4d3f87 net: tls: explicitly disallow disconnect
| * 829c49b6b2 codel: remove sch->q.qlen check before qdisc_tree_reduce_backlog()
| * 24e6280cdd tipc: fix memory leak in tipc_link_xmit
| * 2dc53c7a0c ata: pata_pxa: Fix potential NULL pointer dereference in pxa_ata_probe()
| * d4d8662e6e selftests/futex: futex_waitv wouldblock test should fail
* 2b26f9c343 Merge branch 'android14-6.1' into android14-6.1-lts

Change-Id: I1c8bdcd91094e2f166307124d6f94efa65158437
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
2025-05-19 10:39:39 +00:00
committed by Treehugger Robot
parent 3c6d0251e1 4894546596
commit 9e207186c7
473 changed files with 5126 additions and 2385 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
Makefile
View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 1
SUBLEVEL = 134
SUBLEVEL = 138
EXTRAVERSION =
NAME = Curry Ramen
@@ -1103,6 +1103,9 @@ KBUILD_CFLAGS += $(call cc-option,-Werror=incompatible-pointer-types)
# Require designated initializers for all marked structures
KBUILD_CFLAGS += $(call cc-option,-Werror=designated-init)
# Ensure compilers do not transform certain loops into calls to wcslen()
KBUILD_CFLAGS += -fno-builtin-wcslen
# change __FILE__ to the relative path from the srctree
KBUILD_CPPFLAGS += $(call cc-option,-fmacro-prefix-map=$(srctree)/=)

1
android/abi_gki_aarch64_virtual_device
View File

@@ -1273,6 +1273,7 @@
bpf_prog_add
bpf_prog_put
bpf_prog_sub
bpf_redirect_info
bpf_stats_enabled_key
bpf_warn_invalid_xdp_action
__cpuhp_remove_state

3
arch/arm/boot/dts/imx6ul-imx6ull-opos6ul.dtsi
View File

@@ -40,6 +40,9 @@
reg = <1>;
interrupt-parent = <&gpio4>;
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
micrel,led-mode = <1>;
clocks = <&clks IMX6UL_CLK_ENET_REF>;
clock-names = "rmii-ref";
status = "okay";
};
};

6
arch/arm64/boot/dts/mediatek/mt8173.dtsi
View File

@@ -1247,8 +1247,7 @@
};
pwm0: pwm@1401e000 {
compatible = "mediatek,mt8173-disp-pwm",
"mediatek,mt6595-disp-pwm";
compatible = "mediatek,mt8173-disp-pwm";
reg = <0 0x1401e000 0 0x1000>;
#pwm-cells = <2>;
clocks = <&mmsys CLK_MM_DISP_PWM026M>,
@@ -1258,8 +1257,7 @@
};
pwm1: pwm@1401f000 {
compatible = "mediatek,mt8173-disp-pwm",
"mediatek,mt6595-disp-pwm";
compatible = "mediatek,mt8173-disp-pwm";
reg = <0 0x1401f000 0 0x1000>;
#pwm-cells = <2>;
clocks = <&mmsys CLK_MM_DISP_PWM126M>,

4
arch/arm64/include/asm/cputype.h
View File

@@ -75,6 +75,7 @@
#define ARM_CPU_PART_CORTEX_A76 0xD0B
#define ARM_CPU_PART_NEOVERSE_N1 0xD0C
#define ARM_CPU_PART_CORTEX_A77 0xD0D
#define ARM_CPU_PART_CORTEX_A76AE 0xD0E
#define ARM_CPU_PART_NEOVERSE_V1 0xD40
#define ARM_CPU_PART_CORTEX_A78 0xD41
#define ARM_CPU_PART_CORTEX_A78AE 0xD42
@@ -119,6 +120,7 @@
#define QCOM_CPU_PART_KRYO 0x200
#define QCOM_CPU_PART_KRYO_2XX_GOLD 0x800
#define QCOM_CPU_PART_KRYO_2XX_SILVER 0x801
#define QCOM_CPU_PART_KRYO_3XX_GOLD 0x802
#define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803
#define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804
#define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805
@@ -151,6 +153,7 @@
#define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)
#define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
#define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
#define MIDR_CORTEX_A76AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76AE)
#define MIDR_NEOVERSE_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V1)
#define MIDR_CORTEX_A78 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78)
#define MIDR_CORTEX_A78AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE)
@@ -188,6 +191,7 @@
#define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO)
#define MIDR_QCOM_KRYO_2XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_GOLD)
#define MIDR_QCOM_KRYO_2XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_SILVER)
#define MIDR_QCOM_KRYO_3XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_GOLD)
#define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER)
#define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_GOLD)
#define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER)

1
arch/arm64/include/asm/spectre.h
View File

@@ -96,7 +96,6 @@ enum mitigation_state arm64_get_meltdown_state(void);
enum mitigation_state arm64_get_spectre_bhb_state(void);
bool is_spectre_bhb_affected(const struct arm64_cpu_capabilities *entry, int scope);
u8 spectre_bhb_loop_affected(int scope);
void spectre_bhb_enable_mitigation(const struct arm64_cpu_capabilities *__unused);
#endif /* __ASSEMBLY__ */
#endif /* __ASM_SPECTRE_H */

210
arch/arm64/kernel/proton-pack.c
View File

@@ -857,52 +857,88 @@ static unsigned long system_bhb_mitigations;
* This must be called with SCOPE_LOCAL_CPU for each type of CPU, before any
* SCOPE_SYSTEM call will give the right answer.
*/
u8 spectre_bhb_loop_affected(int scope)
static bool is_spectre_bhb_safe(int scope)
{
static const struct midr_range spectre_bhb_safe_list[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_A35),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A53),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A510),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A520),
MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_SILVER),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
{},
};
static bool all_safe = true;
if (scope != SCOPE_LOCAL_CPU)
return all_safe;
if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_safe_list))
return true;
all_safe = false;
return false;
}
static u8 spectre_bhb_loop_affected(void)
{
u8 k = 0;
static u8 max_bhb_k;
if (scope == SCOPE_LOCAL_CPU) {
static const struct midr_range spectre_bhb_k32_list[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_A78),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A78AE),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C),
MIDR_ALL_VERSIONS(MIDR_CORTEX_X1),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),
MIDR_ALL_VERSIONS(MIDR_CORTEX_X2),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),
{},
};
static const struct midr_range spectre_bhb_k24_list[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_A76),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A77),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),
{},
};
static const struct midr_range spectre_bhb_k11_list[] = {
MIDR_ALL_VERSIONS(MIDR_AMPERE1),
{},
};
static const struct midr_range spectre_bhb_k8_list[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_A72),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A57),
{},
};
static const struct midr_range spectre_bhb_k132_list[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_X3),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),
{},
};
static const struct midr_range spectre_bhb_k38_list[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_A715),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A720),
{},
};
static const struct midr_range spectre_bhb_k32_list[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_A78),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A78AE),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C),
MIDR_ALL_VERSIONS(MIDR_CORTEX_X1),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),
MIDR_ALL_VERSIONS(MIDR_CORTEX_X2),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),
{},
};
static const struct midr_range spectre_bhb_k24_list[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_A76),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A76AE),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A77),
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_GOLD),
{},
};
static const struct midr_range spectre_bhb_k11_list[] = {
MIDR_ALL_VERSIONS(MIDR_AMPERE1),
{},
};
static const struct midr_range spectre_bhb_k8_list[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_A72),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A57),
{},
};
if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k32_list))
k = 32;
else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k24_list))
k = 24;
else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k11_list))
k = 11;
else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k8_list))
k = 8;
max_bhb_k = max(max_bhb_k, k);
} else {
k = max_bhb_k;
}
if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k132_list))
k = 132;
else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k38_list))
k = 38;
else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k32_list))
k = 32;
else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k24_list))
k = 24;
else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k11_list))
k = 11;
else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k8_list))
k = 8;
return k;
}
@@ -928,29 +964,13 @@ static enum mitigation_state spectre_bhb_get_cpu_fw_mitigation_state(void)
}
}
static bool is_spectre_bhb_fw_affected(int scope)
static bool has_spectre_bhb_fw_mitigation(void)
{
static bool system_affected;
enum mitigation_state fw_state;
bool has_smccc = arm_smccc_1_1_get_conduit() != SMCCC_CONDUIT_NONE;
static const struct midr_range spectre_bhb_firmware_mitigated_list[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_A73),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A75),
{},
};
bool cpu_in_list = is_midr_in_range_list(read_cpuid_id(),
spectre_bhb_firmware_mitigated_list);
if (scope != SCOPE_LOCAL_CPU)
return system_affected;
fw_state = spectre_bhb_get_cpu_fw_mitigation_state();
if (cpu_in_list || (has_smccc && fw_state == SPECTRE_MITIGATED)) {
system_affected = true;
return true;
}
return false;
return has_smccc && fw_state == SPECTRE_MITIGATED;
}
static bool supports_ecbhb(int scope)
@@ -966,6 +986,8 @@ static bool supports_ecbhb(int scope)
ID_AA64MMFR1_EL1_ECBHB_SHIFT);
}
static u8 max_bhb_k;
bool is_spectre_bhb_affected(const struct arm64_cpu_capabilities *entry,
int scope)
{
@@ -974,16 +996,18 @@ bool is_spectre_bhb_affected(const struct arm64_cpu_capabilities *entry,
if (supports_csv2p3(scope))
return false;
if (supports_clearbhb(scope))
return true;
if (is_spectre_bhb_safe(scope))
return false;
if (spectre_bhb_loop_affected(scope))
return true;
/*
* At this point the core isn't known to be "safe" so we're going to
* assume it's vulnerable. We still need to update `max_bhb_k` though,
* but only if we aren't mitigating with clearbhb though.
*/
if (scope == SCOPE_LOCAL_CPU && !supports_clearbhb(SCOPE_LOCAL_CPU))
max_bhb_k = max(max_bhb_k, spectre_bhb_loop_affected());
if (is_spectre_bhb_fw_affected(scope))
return true;
return false;
return true;
}
static void this_cpu_set_vectors(enum arm64_bp_harden_el1_vectors slot)
@@ -1017,7 +1041,7 @@ early_param("nospectre_bhb", parse_spectre_bhb_param);
void spectre_bhb_enable_mitigation(const struct arm64_cpu_capabilities *entry)
{
bp_hardening_cb_t cpu_cb;
enum mitigation_state fw_state, state = SPECTRE_VULNERABLE;
enum mitigation_state state = SPECTRE_VULNERABLE;
struct bp_hardening_data *data = this_cpu_ptr(&bp_hardening_data);
if (!is_spectre_bhb_affected(entry, SCOPE_LOCAL_CPU))
@@ -1043,7 +1067,7 @@ void spectre_bhb_enable_mitigation(const struct arm64_cpu_capabilities *entry)
this_cpu_set_vectors(EL1_VECTOR_BHB_CLEAR_INSN);
state = SPECTRE_MITIGATED;
set_bit(BHB_INSN, &system_bhb_mitigations);
} else if (spectre_bhb_loop_affected(SCOPE_LOCAL_CPU)) {
} else if (spectre_bhb_loop_affected()) {
/*
* Ensure KVM uses the indirect vector which will have the
* branchy-loop added. A57/A72-r0 will already have selected
@@ -1056,32 +1080,29 @@ void spectre_bhb_enable_mitigation(const struct arm64_cpu_capabilities *entry)
this_cpu_set_vectors(EL1_VECTOR_BHB_LOOP);
state = SPECTRE_MITIGATED;
set_bit(BHB_LOOP, &system_bhb_mitigations);
} else if (is_spectre_bhb_fw_affected(SCOPE_LOCAL_CPU)) {
fw_state = spectre_bhb_get_cpu_fw_mitigation_state();
if (fw_state == SPECTRE_MITIGATED) {
/*
* Ensure KVM uses one of the spectre bp_hardening
* vectors. The indirect vector doesn't include the EL3
* call, so needs upgrading to
* HYP_VECTOR_SPECTRE_INDIRECT.
*/
if (!data->slot || data->slot == HYP_VECTOR_INDIRECT)
data->slot += 1;
} else if (has_spectre_bhb_fw_mitigation()) {
/*
* Ensure KVM uses one of the spectre bp_hardening
* vectors. The indirect vector doesn't include the EL3
* call, so needs upgrading to
* HYP_VECTOR_SPECTRE_INDIRECT.
*/
if (!data->slot || data->slot == HYP_VECTOR_INDIRECT)
data->slot += 1;
this_cpu_set_vectors(EL1_VECTOR_BHB_FW);
this_cpu_set_vectors(EL1_VECTOR_BHB_FW);
/*
* The WA3 call in the vectors supersedes the WA1 call
* made during context-switch. Uninstall any firmware
* bp_hardening callback.
*/
cpu_cb = spectre_v2_get_sw_mitigation_cb();
if (__this_cpu_read(bp_hardening_data.fn) != cpu_cb)
__this_cpu_write(bp_hardening_data.fn, NULL);
/*
* The WA3 call in the vectors supersedes the WA1 call
* made during context-switch. Uninstall any firmware
* bp_hardening callback.
*/
cpu_cb = spectre_v2_get_sw_mitigation_cb();
if (__this_cpu_read(bp_hardening_data.fn) != cpu_cb)
__this_cpu_write(bp_hardening_data.fn, NULL);
state = SPECTRE_MITIGATED;
set_bit(BHB_FW, &system_bhb_mitigations);
}
state = SPECTRE_MITIGATED;
set_bit(BHB_FW, &system_bhb_mitigations);
}
update_mitigation_state(&spectre_bhb_state, state);
@@ -1115,7 +1136,6 @@ void noinstr spectre_bhb_patch_loop_iter(struct alt_instr *alt,
{
u8 rd;
u32 insn;
u16 loop_count = spectre_bhb_loop_affected(SCOPE_SYSTEM);
BUG_ON(nr_inst != 1); /* MOV -> MOV */
@@ -1124,7 +1144,7 @@ void noinstr spectre_bhb_patch_loop_iter(struct alt_instr *alt,
insn = le32_to_cpu(*origptr);
rd = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RD, insn);
insn = aarch64_insn_gen_movewide(rd, loop_count, 0,
insn = aarch64_insn_gen_movewide(rd, max_bhb_k, 0,
AARCH64_INSN_VARIANT_64BIT,
AARCH64_INSN_MOVEWIDE_ZERO);
*updptr++ = cpu_to_le32(insn);

6
arch/arm64/kvm/arm.c
View File

@@ -470,7 +470,11 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
if (err)
return err;
return kvm_share_hyp(vcpu, vcpu + 1);
err = kvm_share_hyp(vcpu, vcpu + 1);
if (err)
kvm_vgic_vcpu_destroy(vcpu);
return err;
}
void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)

3
arch/arm64/mm/mmu.c
View File

@@ -1593,7 +1593,8 @@ int arch_add_memory(int nid, u64 start, u64 size,
__remove_pgd_mapping(swapper_pg_dir,
__phys_to_virt(start), size);
else {
max_pfn = PFN_UP(start + size);
/* Address of hotplugged memory can be smaller */
max_pfn = max(max_pfn, PFN_UP(start + size));
max_low_pfn = max_pfn;
}

1
arch/loongarch/Kconfig
View File

@@ -51,6 +51,7 @@ config LOONGARCH
select ARCH_SUPPORTS_NUMA_BALANCING
select ARCH_USE_BUILTIN_BSWAP
select ARCH_USE_CMPXCHG_LOCKREF
select ARCH_USE_MEMTEST
select ARCH_USE_QUEUED_RWLOCKS
select ARCH_USE_QUEUED_SPINLOCKS
select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT

4
arch/loongarch/include/asm/ptrace.h
View File

@@ -32,9 +32,9 @@ struct pt_regs {
unsigned long __last[];
} __aligned(8);
static inline int regs_irqs_disabled(struct pt_regs *regs)
static __always_inline bool regs_irqs_disabled(struct pt_regs *regs)
{
return arch_irqs_disabled_flags(regs->csr_prmd);
return !(regs->csr_prmd & CSR_PRMD_PIE);
}
static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)

12
arch/loongarch/kernel/acpi.c
View File

@@ -173,18 +173,6 @@ static __init int setup_node(int pxm)
return acpi_map_pxm_to_node(pxm);
}
/*
* Callback for SLIT parsing. pxm_to_node() returns NUMA_NO_NODE for
* I/O localities since SRAT does not list them. I/O localities are
* not supported at this point.
*/
unsigned int numa_distance_cnt;
static inline unsigned int get_numa_distances_cnt(struct acpi_table_slit *slit)
{
return slit->locality_count;
}
void __init numa_set_distance(int from, int to, int distance)
{
if ((u8)distance != distance || (from == to && distance != LOCAL_DISTANCE)) {

2
arch/loongarch/mm/hugetlbpage.c
View File

@@ -47,7 +47,7 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr,
pmd = pmd_offset(pud, addr);
}
}
return (pte_t *) pmd;
return pmd_none(*pmd) ? NULL : (pte_t *) pmd;
}
/*

3
arch/loongarch/mm/init.c
View File

@@ -89,9 +89,6 @@ void __init paging_init(void)
{
unsigned long max_zone_pfns[MAX_NR_ZONES];
#ifdef CONFIG_ZONE_DMA
max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
#endif
#ifdef CONFIG_ZONE_DMA32
max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
#endif

2
arch/loongarch/net/bpf_jit.c
View File

@@ -142,8 +142,6 @@ static void build_prologue(struct jit_ctx *ctx)
*/
if (seen_tail_call(ctx) && seen_call(ctx))
move_reg(ctx, TCC_SAVED, REG_TCC);
else
emit_insn(ctx, nop);
ctx->stack_size = stack_adjust;
}

5
arch/loongarch/net/bpf_jit.h
View File

@@ -25,11 +25,6 @@ struct jit_data {
struct jit_ctx ctx;
};
static inline void emit_nop(union loongarch_instruction *insn)
{
insn->word = INSN_NOP;
}
#define emit_insn(ctx, func, ...) \
do { \
if (ctx->image != NULL) { \

2
arch/mips/dec/prom/init.c
View File

@@ -42,7 +42,7 @@ int (*__pmax_close)(int);
* Detect which PROM the DECSTATION has, and set the callback vectors
* appropriately.
*/
void __init which_prom(s32 magic, s32 *prom_vec)
static void __init which_prom(s32 magic, s32 *prom_vec)
{
/*
* No sign of the REX PROM's magic number means we assume a non-REX

2
arch/mips/include/asm/ds1287.h
View File

@@ -8,7 +8,7 @@
#define __ASM_DS1287_H
extern int ds1287_timer_state(void);
extern void ds1287_set_base_clock(unsigned int clock);
extern int ds1287_set_base_clock(unsigned int hz);
extern int ds1287_clockevent_init(int irq);
#endif

22
arch/mips/include/asm/mips-cm.h
View File

@@ -47,6 +47,16 @@ extern phys_addr_t __mips_cm_phys_base(void);
*/
extern int mips_cm_is64;
/*
* mips_cm_is_l2_hci_broken - determine if HCI is broken
*
* Some CM reports show that Hardware Cache Initialization is
* complete, but in reality it's not the case. They also incorrectly
* indicate that Hardware Cache Initialization is supported. This
* flags allows warning about this broken feature.
*/
extern bool mips_cm_is_l2_hci_broken;
/**
* mips_cm_error_report - Report CM cache errors
*/
@@ -85,6 +95,18 @@ static inline bool mips_cm_present(void)
#endif
}
/**
* mips_cm_update_property - update property from the device tree
*
* Retrieve the properties from the device tree if a CM node exist and
* update the internal variable based on this.
*/
#ifdef CONFIG_MIPS_CM
extern void mips_cm_update_property(void);
#else
static inline void mips_cm_update_property(void) {}
#endif
/**
* mips_cm_has_l2sync - determine whether an L2-only sync region is present
*

1
arch/mips/kernel/cevt-ds1287.c
View File

@@ -10,6 +10,7 @@
#include <linux/mc146818rtc.h>
#include <linux/irq.h>
#include <asm/ds1287.h>
#include <asm/time.h>
int ds1287_timer_state(void)

14
arch/mips/kernel/mips-cm.c
View File

@@ -5,6 +5,7 @@
*/
#include <linux/errno.h>
#include <linux/of.h>
#include <linux/percpu.h>
#include <linux/spinlock.h>
@@ -14,6 +15,7 @@
void __iomem *mips_gcr_base;
void __iomem *mips_cm_l2sync_base;
int mips_cm_is64;
bool mips_cm_is_l2_hci_broken;
static char *cm2_tr[8] = {
"mem", "gcr", "gic", "mmio",
@@ -238,6 +240,18 @@ static void mips_cm_probe_l2sync(void)
mips_cm_l2sync_base = ioremap(addr, MIPS_CM_L2SYNC_SIZE);
}
void mips_cm_update_property(void)
{
struct device_node *cm_node;
cm_node = of_find_compatible_node(of_root, NULL, "mobileye,eyeq6-cm");
if (!cm_node)
return;
pr_info("HCI (Hardware Cache Init for the L2 cache) in GCR_L2_RAM_CONFIG from the CM3 is broken");
mips_cm_is_l2_hci_broken = true;
of_node_put(cm_node);
}
int mips_cm_probe(void)
{
phys_addr_t addr;

2
arch/parisc/kernel/pdt.c
View File

@@ -62,6 +62,7 @@ static unsigned long pdt_entry[MAX_PDT_ENTRIES] __page_aligned_bss;
#define PDT_ADDR_PERM_ERR (pdt_type != PDT_PDC ? 2UL : 0UL)
#define PDT_ADDR_SINGLE_ERR 1UL
#ifdef CONFIG_PROC_FS
/* report PDT entries via /proc/meminfo */
void arch_report_meminfo(struct seq_file *m)
{
@@ -73,6 +74,7 @@ void arch_report_meminfo(struct seq_file *m)
seq_printf(m, "PDT_cur_entries: %7lu\n",
pdt_status.pdt_entries);
}
#endif
static int get_info_pat_new(void)
{

16
arch/parisc/math-emu/driver.c
View File

@@ -103,9 +103,19 @@ handle_fpe(struct pt_regs *regs)
memcpy(regs->fr, frcopy, sizeof regs->fr);
if (signalcode != 0) {
force_sig_fault(signalcode >> 24, signalcode & 0xffffff,
(void __user *) regs->iaoq[0]);
return -1;
int sig = signalcode >> 24;
if (sig == SIGFPE) {
/*
* Clear floating point trap bit to avoid trapping
* again on the first floating-point instruction in
* the userspace signal handler.
*/
regs->fr[0] &= ~(1ULL << 38);
}
force_sig_fault(sig, signalcode & 0xffffff,
(void __user *) regs->iaoq[0]);
return -1;
}
return signalcode ? -1 : 0;

4
arch/powerpc/kernel/rtas.c
View File

@@ -25,6 +25,7 @@
#include <linux/reboot.h>
#include <linux/security.h>
#include <linux/syscalls.h>
#include <linux/nospec.h>
#include <linux/of.h>
#include <linux/of_fdt.h>
@@ -1178,6 +1179,9 @@ SYSCALL_DEFINE1(rtas, struct rtas_args __user *, uargs)
|| nargs + nret > ARRAY_SIZE(args.args))
return -EINVAL;
nargs = array_index_nospec(nargs, ARRAY_SIZE(args.args));
nret = array_index_nospec(nret, ARRAY_SIZE(args.args) - nargs);
/* Copy in args. */
if (copy_from_user(args.args, uargs->args,
nargs * sizeof(rtas_arg_t)) != 0)

9
arch/riscv/include/asm/kgdb.h
View File

@@ -19,16 +19,9 @@
#ifndef __ASSEMBLY__
void arch_kgdb_breakpoint(void);
extern unsigned long kgdb_compiled_break;
static inline void arch_kgdb_breakpoint(void)
{
asm(".global kgdb_compiled_break\n"
".option norvc\n"
"kgdb_compiled_break: ebreak\n"
".option rvc\n");
}
#endif /* !__ASSEMBLY__ */
#define DBG_REG_ZERO "zero"

7
arch/riscv/include/asm/syscall.h
View File

@@ -61,8 +61,11 @@ static inline void syscall_get_arguments(struct task_struct *task,
unsigned long *args)
{
args[0] = regs->orig_a0;
args++;
memcpy(args, &regs->a1, 5 * sizeof(args[0]));
args[1] = regs->a1;
args[2] = regs->a2;
args[3] = regs->a3;
args[4] = regs->a4;
args[5] = regs->a5;
}
static inline int syscall_get_arch(struct task_struct *task)

6
arch/riscv/kernel/kgdb.c
View File

@@ -273,6 +273,12 @@ void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long pc)
regs->epc = pc;
}
noinline void arch_kgdb_breakpoint(void)
{
asm(".global kgdb_compiled_break\n"
"kgdb_compiled_break: ebreak\n");
}
void kgdb_arch_handle_qxfer_pkt(char *remcom_in_buffer,
char *remcom_out_buffer)
{

36
arch/riscv/kernel/setup.c
View File

@@ -76,6 +76,9 @@ static struct resource bss_res = { .name = "Kernel bss", };
static struct resource elfcorehdr_res = { .name = "ELF Core hdr", };
#endif
static int num_standard_resources;
static struct resource *standard_resources;
static int __init add_resource(struct resource *parent,
struct resource *res)
{
@@ -149,7 +152,7 @@ static void __init init_resources(void)
struct resource *res = NULL;
struct resource *mem_res = NULL;
size_t mem_res_sz = 0;
int num_resources = 0, res_idx = 0;
int num_resources = 0, res_idx = 0, non_resv_res = 0;
int ret = 0;
/* + 1 as memblock_alloc() might increase memblock.reserved.cnt */
@@ -213,6 +216,7 @@ static void __init init_resources(void)
/* Add /memory regions to the resource tree */
for_each_mem_region(region) {
res = &mem_res[res_idx--];
non_resv_res++;
if (unlikely(memblock_is_nomap(region))) {
res->name = "Reserved";
@@ -230,6 +234,9 @@ static void __init init_resources(void)
goto error;
}
num_standard_resources = non_resv_res;
standard_resources = &mem_res[res_idx + 1];
/* Clean-up any unused pre-allocated resources */
if (res_idx >= 0)
memblock_free(mem_res, (res_idx + 1) * sizeof(*mem_res));
@@ -241,6 +248,33 @@ static void __init init_resources(void)
memblock_free(mem_res, mem_res_sz);
}
static int __init reserve_memblock_reserved_regions(void)
{
u64 i, j;
for (i = 0; i < num_standard_resources; i++) {
struct resource *mem = &standard_resources[i];
phys_addr_t r_start, r_end, mem_size = resource_size(mem);
if (!memblock_is_region_reserved(mem->start, mem_size))
continue;
for_each_reserved_mem_range(j, &r_start, &r_end) {
resource_size_t start, end;
start = max(PFN_PHYS(PFN_DOWN(r_start)), mem->start);
end = min(PFN_PHYS(PFN_UP(r_end)) - 1, mem->end);
if (start > mem->end || end < mem->start)
continue;
reserve_region_with_split(mem, start, end, "Reserved");
}
}
return 0;
}
arch_initcall(reserve_memblock_reserved_regions);
static void __init parse_dtb(void)
{

4
arch/s390/kvm/trace-s390.h
View File

@@ -56,7 +56,7 @@ TRACE_EVENT(kvm_s390_create_vcpu,
__entry->sie_block = sie_block;
),
TP_printk("create cpu %d at 0x%pK, sie block at 0x%pK",
TP_printk("create cpu %d at 0x%p, sie block at 0x%p",
__entry->id, __entry->vcpu, __entry->sie_block)
);
@@ -255,7 +255,7 @@ TRACE_EVENT(kvm_s390_enable_css,
__entry->kvm = kvm;
),
TP_printk("enabling channel I/O support (kvm @ %pK)\n",
TP_printk("enabling channel I/O support (kvm @ %p)\n",
__entry->kvm)
);

5
arch/sparc/mm/tlb.c
View File

@@ -52,8 +52,10 @@ out:
void arch_enter_lazy_mmu_mode(void)
{
struct tlb_batch *tb = this_cpu_ptr(&tlb_batch);
struct tlb_batch *tb;
preempt_disable();
tb = this_cpu_ptr(&tlb_batch);
tb->active = 1;
}
@@ -64,6 +66,7 @@ void arch_leave_lazy_mmu_mode(void)
if (tb->tlb_nr)
flush_tlb_pending();
tb->active = 0;
preempt_enable();
}
static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr,

2
arch/x86/entry/entry.S
View File

@@ -16,7 +16,7 @@
SYM_FUNC_START(entry_ibpb)
movl $MSR_IA32_PRED_CMD, %ecx
movl $PRED_CMD_IBPB, %eax
movl _ASM_RIP(x86_pred_cmd), %eax
xorl %edx, %edx
wrmsr

2
arch/x86/events/core.c
View File

@@ -621,7 +621,7 @@ int x86_pmu_hw_config(struct perf_event *event)
if (event->attr.type == event->pmu->type)
event->hw.config |= event->attr.config & X86_RAW_EVENT_MASK;
if (!event->attr.freq && x86_pmu.limit_period) {
if (is_sampling_event(event) && !event->attr.freq && x86_pmu.limit_period) {
s64 left = event->attr.sample_period;
x86_pmu.limit_period(event, &left);
if (left > event->attr.sample_period)

2
arch/x86/events/intel/core.c
View File

@@ -4177,7 +4177,7 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr, void *data)
arr[pebs_enable] = (struct perf_guest_switch_msr){
.msr = MSR_IA32_PEBS_ENABLE,
.host = cpuc->pebs_enabled & ~cpuc->intel_ctrl_guest_mask,
.guest = pebs_mask & ~cpuc->intel_ctrl_host_mask,
.guest = pebs_mask & ~cpuc->intel_ctrl_host_mask & kvm_pmu->pebs_enable,
};
if (arr[pebs_enable].host) {

8
arch/x86/events/intel/ds.c
View File

@@ -1149,8 +1149,10 @@ static u64 pebs_update_adaptive_cfg(struct perf_event *event)
* + precise_ip < 2 for the non event IP
* + For RTM TSX weight we need GPRs for the abort code.
*/
gprs = (sample_type & PERF_SAMPLE_REGS_INTR) &&
(attr->sample_regs_intr & PEBS_GP_REGS);
gprs = ((sample_type & PERF_SAMPLE_REGS_INTR) &&
(attr->sample_regs_intr & PEBS_GP_REGS)) ||
((sample_type & PERF_SAMPLE_REGS_USER) &&
(attr->sample_regs_user & PEBS_GP_REGS));
tsx_weight = (sample_type & PERF_SAMPLE_WEIGHT_TYPE) &&
((attr->config & INTEL_ARCH_EVENT_MASK) ==
@@ -1792,7 +1794,7 @@ static void setup_pebs_adaptive_sample_data(struct perf_event *event,
regs->flags &= ~PERF_EFLAGS_EXACT;
}
if (sample_type & PERF_SAMPLE_REGS_INTR)
if (sample_type & (PERF_SAMPLE_REGS_INTR | PERF_SAMPLE_REGS_USER))
adaptive_pebs_save_regs(regs, gprs);
}

107
arch/x86/events/intel/uncore_snbep.c
View File

@@ -4656,28 +4656,28 @@ static struct uncore_event_desc snr_uncore_iio_freerunning_events[] = {
INTEL_UNCORE_EVENT_DESC(ioclk, "event=0xff,umask=0x10"),
/* Free-Running IIO BANDWIDTH IN Counters */
INTEL_UNCORE_EVENT_DESC(bw_in_port0, "event=0xff,umask=0x20"),
INTEL_UNCORE_EVENT_DESC(bw_in_port0.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port0.scale, "3.0517578125e-5"),
INTEL_UNCORE_EVENT_DESC(bw_in_port0.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port1, "event=0xff,umask=0x21"),
INTEL_UNCORE_EVENT_DESC(bw_in_port1.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port1.scale, "3.0517578125e-5"),
INTEL_UNCORE_EVENT_DESC(bw_in_port1.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port2, "event=0xff,umask=0x22"),
INTEL_UNCORE_EVENT_DESC(bw_in_port2.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port2.scale, "3.0517578125e-5"),
INTEL_UNCORE_EVENT_DESC(bw_in_port2.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port3, "event=0xff,umask=0x23"),
INTEL_UNCORE_EVENT_DESC(bw_in_port3.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port3.scale, "3.0517578125e-5"),
INTEL_UNCORE_EVENT_DESC(bw_in_port3.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port4, "event=0xff,umask=0x24"),
INTEL_UNCORE_EVENT_DESC(bw_in_port4.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port4.scale, "3.0517578125e-5"),
INTEL_UNCORE_EVENT_DESC(bw_in_port4.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port5, "event=0xff,umask=0x25"),
INTEL_UNCORE_EVENT_DESC(bw_in_port5.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port5.scale, "3.0517578125e-5"),
INTEL_UNCORE_EVENT_DESC(bw_in_port5.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port6, "event=0xff,umask=0x26"),
INTEL_UNCORE_EVENT_DESC(bw_in_port6.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port6.scale, "3.0517578125e-5"),
INTEL_UNCORE_EVENT_DESC(bw_in_port6.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port7, "event=0xff,umask=0x27"),
INTEL_UNCORE_EVENT_DESC(bw_in_port7.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port7.scale, "3.0517578125e-5"),
INTEL_UNCORE_EVENT_DESC(bw_in_port7.unit, "MiB"),
{ /* end: all zeroes */ },
};
@@ -5250,37 +5250,6 @@ static struct freerunning_counters icx_iio_freerunning[] = {
[ICX_IIO_MSR_BW_IN] = { 0xaa0, 0x1, 0x10, 8, 48, icx_iio_bw_freerunning_box_offsets },
};
static struct uncore_event_desc icx_uncore_iio_freerunning_events[] = {
/* Free-Running IIO CLOCKS Counter */
INTEL_UNCORE_EVENT_DESC(ioclk, "event=0xff,umask=0x10"),
/* Free-Running IIO BANDWIDTH IN Counters */
INTEL_UNCORE_EVENT_DESC(bw_in_port0, "event=0xff,umask=0x20"),
INTEL_UNCORE_EVENT_DESC(bw_in_port0.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port0.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port1, "event=0xff,umask=0x21"),
INTEL_UNCORE_EVENT_DESC(bw_in_port1.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port1.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port2, "event=0xff,umask=0x22"),
INTEL_UNCORE_EVENT_DESC(bw_in_port2.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port2.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port3, "event=0xff,umask=0x23"),
INTEL_UNCORE_EVENT_DESC(bw_in_port3.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port3.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port4, "event=0xff,umask=0x24"),
INTEL_UNCORE_EVENT_DESC(bw_in_port4.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port4.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port5, "event=0xff,umask=0x25"),
INTEL_UNCORE_EVENT_DESC(bw_in_port5.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port5.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port6, "event=0xff,umask=0x26"),
INTEL_UNCORE_EVENT_DESC(bw_in_port6.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port6.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port7, "event=0xff,umask=0x27"),
INTEL_UNCORE_EVENT_DESC(bw_in_port7.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port7.unit, "MiB"),
{ /* end: all zeroes */ },
};
static struct intel_uncore_type icx_uncore_iio_free_running = {
.name = "iio_free_running",
.num_counters = 9,
@@ -5288,7 +5257,7 @@ static struct intel_uncore_type icx_uncore_iio_free_running = {
.num_freerunning_types = ICX_IIO_FREERUNNING_TYPE_MAX,
.freerunning = icx_iio_freerunning,
.ops = &skx_uncore_iio_freerunning_ops,
.event_descs = icx_uncore_iio_freerunning_events,
.event_descs = snr_uncore_iio_freerunning_events,
.format_group = &skx_uncore_iio_freerunning_format_group,
};
@@ -5857,69 +5826,13 @@ static struct freerunning_counters spr_iio_freerunning[] = {
[SPR_IIO_MSR_BW_OUT] = { 0x3808, 0x1, 0x10, 8, 48 },
};
static struct uncore_event_desc spr_uncore_iio_freerunning_events[] = {
/* Free-Running IIO CLOCKS Counter */
INTEL_UNCORE_EVENT_DESC(ioclk, "event=0xff,umask=0x10"),
/* Free-Running IIO BANDWIDTH IN Counters */
INTEL_UNCORE_EVENT_DESC(bw_in_port0, "event=0xff,umask=0x20"),
INTEL_UNCORE_EVENT_DESC(bw_in_port0.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port0.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port1, "event=0xff,umask=0x21"),
INTEL_UNCORE_EVENT_DESC(bw_in_port1.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port1.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port2, "event=0xff,umask=0x22"),
INTEL_UNCORE_EVENT_DESC(bw_in_port2.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port2.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port3, "event=0xff,umask=0x23"),
INTEL_UNCORE_EVENT_DESC(bw_in_port3.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port3.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port4, "event=0xff,umask=0x24"),
INTEL_UNCORE_EVENT_DESC(bw_in_port4.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port4.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port5, "event=0xff,umask=0x25"),
INTEL_UNCORE_EVENT_DESC(bw_in_port5.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port5.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port6, "event=0xff,umask=0x26"),
INTEL_UNCORE_EVENT_DESC(bw_in_port6.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port6.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_in_port7, "event=0xff,umask=0x27"),
INTEL_UNCORE_EVENT_DESC(bw_in_port7.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_in_port7.unit, "MiB"),
/* Free-Running IIO BANDWIDTH OUT Counters */
INTEL_UNCORE_EVENT_DESC(bw_out_port0, "event=0xff,umask=0x30"),
INTEL_UNCORE_EVENT_DESC(bw_out_port0.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_out_port0.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_out_port1, "event=0xff,umask=0x31"),
INTEL_UNCORE_EVENT_DESC(bw_out_port1.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_out_port1.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_out_port2, "event=0xff,umask=0x32"),
INTEL_UNCORE_EVENT_DESC(bw_out_port2.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_out_port2.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_out_port3, "event=0xff,umask=0x33"),
INTEL_UNCORE_EVENT_DESC(bw_out_port3.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_out_port3.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_out_port4, "event=0xff,umask=0x34"),
INTEL_UNCORE_EVENT_DESC(bw_out_port4.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_out_port4.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_out_port5, "event=0xff,umask=0x35"),
INTEL_UNCORE_EVENT_DESC(bw_out_port5.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_out_port5.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_out_port6, "event=0xff,umask=0x36"),
INTEL_UNCORE_EVENT_DESC(bw_out_port6.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_out_port6.unit, "MiB"),
INTEL_UNCORE_EVENT_DESC(bw_out_port7, "event=0xff,umask=0x37"),
INTEL_UNCORE_EVENT_DESC(bw_out_port7.scale, "3.814697266e-6"),
INTEL_UNCORE_EVENT_DESC(bw_out_port7.unit, "MiB"),
{ /* end: all zeroes */ },
};
static struct intel_uncore_type spr_uncore_iio_free_running = {
.name = "iio_free_running",
.num_counters = 17,
.num_freerunning_types = SPR_IIO_FREERUNNING_TYPE_MAX,
.freerunning = spr_iio_freerunning,
.ops = &skx_uncore_iio_freerunning_ops,
.event_descs = spr_uncore_iio_freerunning_events,
.event_descs = snr_uncore_iio_freerunning_events,
.format_group = &skx_uncore_iio_freerunning_format_group,
};

18
arch/x86/include/asm/kexec.h
View File

@@ -16,7 +16,6 @@
# define PAGES_NR 4
#endif
# define KEXEC_CONTROL_PAGE_SIZE 4096
# define KEXEC_CONTROL_CODE_MAX_SIZE 2048
#ifndef __ASSEMBLY__
@@ -45,6 +44,7 @@ struct kimage;
/* Maximum address we can use for the control code buffer */
# define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
# define KEXEC_CONTROL_PAGE_SIZE 4096
/* The native architecture */
# define KEXEC_ARCH KEXEC_ARCH_386
@@ -59,6 +59,9 @@ struct kimage;
/* Maximum address we can use for the control pages */
# define KEXEC_CONTROL_MEMORY_LIMIT (MAXMEM-1)
/* Allocate one page for the pdp and the second for the code */
# define KEXEC_CONTROL_PAGE_SIZE (4096UL + 4096UL)
/* The native architecture */
# define KEXEC_ARCH KEXEC_ARCH_X86_64
#endif
@@ -143,19 +146,6 @@ struct kimage_arch {
};
#else
struct kimage_arch {
/*
* This is a kimage control page, as it must not overlap with either
* source or destination address ranges.
*/
pgd_t *pgd;
/*
* The virtual mapping of the control code page itself is used only
* during the transition, while the current kernel's pages are all
* in place. Thus the intermediate page table pages used to map it
* are not control pages, but instead just normal pages obtained
* with get_zeroed_page(). And have to be tracked (below) so that
* they can be freed.
*/
p4d_t *p4d;
pud_t *pud;
pmd_t *pmd;

1
arch/x86/include/asm/kvm-x86-ops.h
View File

@@ -47,6 +47,7 @@ KVM_X86_OP(set_idt)
KVM_X86_OP(get_gdt)
KVM_X86_OP(set_gdt)
KVM_X86_OP(sync_dirty_debug_regs)
KVM_X86_OP(set_dr6)
KVM_X86_OP(set_dr7)
KVM_X86_OP(cache_reg)
KVM_X86_OP(get_rflags)

1
arch/x86/include/asm/kvm_host.h
View File

@@ -1499,6 +1499,7 @@ struct kvm_x86_ops {
void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);

2
arch/x86/kernel/cpu/amd.c
View File

@@ -787,7 +787,7 @@ static void init_amd_k8(struct cpuinfo_x86 *c)
* (model = 0x14) and later actually support it.
* (AMD Erratum #110, docId: 25759).
*/
if (c->x86_model < 0x14 && cpu_has(c, X86_FEATURE_LAHF_LM)) {
if (c->x86_model < 0x14 && cpu_has(c, X86_FEATURE_LAHF_LM) && !cpu_has(c, X86_FEATURE_HYPERVISOR)) {
clear_cpu_cap(c, X86_FEATURE_LAHF_LM);
if (!rdmsrl_amd_safe(0xc001100d, &value)) {
value &= ~BIT_64(32);

36
arch/x86/kernel/cpu/bugs.c
View File

@@ -1553,7 +1553,7 @@ static void __init spec_ctrl_disable_kernel_rrsba(void)
rrsba_disabled = true;
}
static void __init spectre_v2_determine_rsb_fill_type_at_vmexit(enum spectre_v2_mitigation mode)
static void __init spectre_v2_select_rsb_mitigation(enum spectre_v2_mitigation mode)
{
/*
* Similar to context switches, there are two types of RSB attacks
@@ -1577,27 +1577,30 @@ static void __init spectre_v2_determine_rsb_fill_type_at_vmexit(enum spectre_v2_
*/
switch (mode) {
case SPECTRE_V2_NONE:
return;
break;
case SPECTRE_V2_EIBRS_LFENCE:
case SPECTRE_V2_EIBRS:
if (boot_cpu_has_bug(X86_BUG_EIBRS_PBRSB)) {
setup_force_cpu_cap(X86_FEATURE_RSB_VMEXIT_LITE);
pr_info("Spectre v2 / PBRSB-eIBRS: Retire a single CALL on VMEXIT\n");
}
return;
case SPECTRE_V2_EIBRS_LFENCE:
case SPECTRE_V2_EIBRS_RETPOLINE:
if (boot_cpu_has_bug(X86_BUG_EIBRS_PBRSB)) {
pr_info("Spectre v2 / PBRSB-eIBRS: Retire a single CALL on VMEXIT\n");
setup_force_cpu_cap(X86_FEATURE_RSB_VMEXIT_LITE);
}
break;
case SPECTRE_V2_RETPOLINE:
case SPECTRE_V2_LFENCE:
case SPECTRE_V2_IBRS:
pr_info("Spectre v2 / SpectreRSB: Filling RSB on context switch and VMEXIT\n");
setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
setup_force_cpu_cap(X86_FEATURE_RSB_VMEXIT);
pr_info("Spectre v2 / SpectreRSB : Filling RSB on VMEXIT\n");
return;
}
break;
pr_warn_once("Unknown Spectre v2 mode, disabling RSB mitigation at VM exit");
dump_stack();
default:
pr_warn_once("Unknown Spectre v2 mode, disabling RSB mitigation\n");
dump_stack();
break;
}
}
/*
@@ -1822,10 +1825,7 @@ static void __init spectre_v2_select_mitigation(void)
*
* FIXME: Is this pointless for retbleed-affected AMD?
*/
setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
pr_info("Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch\n");
spectre_v2_determine_rsb_fill_type_at_vmexit(mode);
spectre_v2_select_rsb_mitigation(mode);
/*
* Retpoline protects the kernel, but doesn't protect firmware. IBRS

20
arch/x86/kernel/cpu/intel.c
View File

@@ -1204,7 +1204,13 @@ static void __split_lock_reenable(struct work_struct *work)
{
sld_update_msr(true);
}
static DECLARE_DELAYED_WORK(sl_reenable, __split_lock_reenable);
/*
* In order for each CPU to schedule its delayed work independently of the
* others, delayed work struct must be per-CPU. This is not required when
* sysctl_sld_mitigate is enabled because of the semaphore that limits
* the number of simultaneously scheduled delayed works to 1.
*/
static DEFINE_PER_CPU(struct delayed_work, sl_reenable);
/*
* If a CPU goes offline with pending delayed work to re-enable split lock
@@ -1225,7 +1231,7 @@ static int splitlock_cpu_offline(unsigned int cpu)
static void split_lock_warn(unsigned long ip)
{
struct delayed_work *work;
struct delayed_work *work = NULL;
int cpu;
if (!current->reported_split_lock)
@@ -1247,11 +1253,17 @@ static void split_lock_warn(unsigned long ip)
if (down_interruptible(&buslock_sem) == -EINTR)
return;
work = &sl_reenable_unlock;
} else {
work = &sl_reenable;
}
cpu = get_cpu();
if (!work) {
work = this_cpu_ptr(&sl_reenable);
/* Deferred initialization of per-CPU struct */
if (!work->work.func)
INIT_DELAYED_WORK(work, __split_lock_reenable);
}
schedule_delayed_work_on(cpu, work, 2);
/* Disable split lock detection on this CPU to make progress */

17
arch/x86/kernel/e820.c
View File

@@ -753,22 +753,21 @@ void __init e820__memory_setup_extended(u64 phys_addr, u32 data_len)
void __init e820__register_nosave_regions(unsigned long limit_pfn)
{
int i;
unsigned long pfn = 0;
u64 last_addr = 0;
for (i = 0; i < e820_table->nr_entries; i++) {
struct e820_entry *entry = &e820_table->entries[i];
if (pfn < PFN_UP(entry->addr))
register_nosave_region(pfn, PFN_UP(entry->addr));
pfn = PFN_DOWN(entry->addr + entry->size);
if (entry->type != E820_TYPE_RAM && entry->type != E820_TYPE_RESERVED_KERN)
register_nosave_region(PFN_UP(entry->addr), pfn);
continue;
if (pfn >= limit_pfn)
break;
if (last_addr < entry->addr)
register_nosave_region(PFN_DOWN(last_addr), PFN_UP(entry->addr));
last_addr = entry->addr + entry->size;
}
register_nosave_region(PFN_DOWN(last_addr), limit_pfn);
}
#ifdef CONFIG_ACPI

3
arch/x86/kernel/i8253.c
View File

@@ -46,7 +46,8 @@ bool __init pit_timer_init(void)
* VMMs otherwise steal CPU time just to pointlessly waggle
* the (masked) IRQ.
*/
clockevent_i8253_disable();
scoped_guard(irq)
clockevent_i8253_disable();
return false;
}
clockevent_i8253_init(true);

45
arch/x86/kernel/machine_kexec_64.c
View File

@@ -149,8 +149,7 @@ static void free_transition_pgtable(struct kimage *image)
image->arch.pte = NULL;
}
static int init_transition_pgtable(struct kimage *image, pgd_t *pgd,
unsigned long control_page)
static int init_transition_pgtable(struct kimage *image, pgd_t *pgd)
{
pgprot_t prot = PAGE_KERNEL_EXEC_NOENC;
unsigned long vaddr, paddr;
@@ -161,7 +160,7 @@ static int init_transition_pgtable(struct kimage *image, pgd_t *pgd,
pte_t *pte;
vaddr = (unsigned long)relocate_kernel;
paddr = control_page;
paddr = __pa(page_address(image->control_code_page)+PAGE_SIZE);
pgd += pgd_index(vaddr);
if (!pgd_present(*pgd)) {
p4d = (p4d_t *)get_zeroed_page(GFP_KERNEL);
@@ -220,7 +219,7 @@ static void *alloc_pgt_page(void *data)
return p;
}
static int init_pgtable(struct kimage *image, unsigned long control_page)
static int init_pgtable(struct kimage *image, unsigned long start_pgtable)
{
struct x86_mapping_info info = {
.alloc_pgt_page = alloc_pgt_page,
@@ -229,12 +228,12 @@ static int init_pgtable(struct kimage *image, unsigned long control_page)
.kernpg_flag = _KERNPG_TABLE_NOENC,
};
unsigned long mstart, mend;
pgd_t *level4p;
int result;
int i;
image->arch.pgd = alloc_pgt_page(image);
if (!image->arch.pgd)
return -ENOMEM;
level4p = (pgd_t *)__va(start_pgtable);
clear_page(level4p);
if (cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT)) {
info.page_flag |= _PAGE_ENC;
@@ -248,8 +247,8 @@ static int init_pgtable(struct kimage *image, unsigned long control_page)
mstart = pfn_mapped[i].start << PAGE_SHIFT;
mend = pfn_mapped[i].end << PAGE_SHIFT;
result = kernel_ident_mapping_init(&info, image->arch.pgd,
mstart, mend);
result = kernel_ident_mapping_init(&info,
level4p, mstart, mend);
if (result)
return result;
}
@@ -264,8 +263,8 @@ static int init_pgtable(struct kimage *image, unsigned long control_page)
mstart = image->segment[i].mem;
mend = mstart + image->segment[i].memsz;
result = kernel_ident_mapping_init(&info, image->arch.pgd,
mstart, mend);
result = kernel_ident_mapping_init(&info,
level4p, mstart, mend);
if (result)
return result;
@@ -275,19 +274,15 @@ static int init_pgtable(struct kimage *image, unsigned long control_page)
* Prepare EFI systab and ACPI tables for kexec kernel since they are
* not covered by pfn_mapped.
*/
result = map_efi_systab(&info, image->arch.pgd);
result = map_efi_systab(&info, level4p);
if (result)
return result;
result = map_acpi_tables(&info, image->arch.pgd);
result = map_acpi_tables(&info, level4p);
if (result)
return result;
/*
* This must be last because the intermediate page table pages it
* allocates will not be control pages and may overlap the image.
*/
return init_transition_pgtable(image, image->arch.pgd, control_page);
return init_transition_pgtable(image, level4p);
}
static void load_segments(void)
@@ -304,14 +299,14 @@ static void load_segments(void)
int machine_kexec_prepare(struct kimage *image)
{
unsigned long control_page;
unsigned long start_pgtable;
int result;
/* Calculate the offsets */
control_page = page_to_pfn(image->control_code_page) << PAGE_SHIFT;
start_pgtable = page_to_pfn(image->control_code_page) << PAGE_SHIFT;
/* Setup the identity mapped 64bit page table */
result = init_pgtable(image, control_page);
result = init_pgtable(image, start_pgtable);
if (result)
return result;
@@ -358,12 +353,13 @@ void machine_kexec(struct kimage *image)
#endif
}
control_page = page_address(image->control_code_page);
control_page = page_address(image->control_code_page) + PAGE_SIZE;
__memcpy(control_page, relocate_kernel, KEXEC_CONTROL_CODE_MAX_SIZE);
page_list[PA_CONTROL_PAGE] = virt_to_phys(control_page);
page_list[VA_CONTROL_PAGE] = (unsigned long)control_page;
page_list[PA_TABLE_PAGE] = (unsigned long)__pa(image->arch.pgd);
page_list[PA_TABLE_PAGE] =
(unsigned long)__pa(page_address(image->control_code_page));
if (image->type == KEXEC_TYPE_DEFAULT)
page_list[PA_SWAP_PAGE] = (page_to_pfn(image->swap_page)
@@ -582,7 +578,8 @@ static void kexec_mark_crashkres(bool protect)
/* Don't touch the control code page used in crash_kexec().*/
control = PFN_PHYS(page_to_pfn(kexec_crash_image->control_code_page));
kexec_mark_range(crashk_res.start, control - 1, protect);
/* Control code page is located in the 2nd page. */
kexec_mark_range(crashk_res.start, control + PAGE_SIZE - 1, protect);
control += KEXEC_CONTROL_PAGE_SIZE;
kexec_mark_range(control, crashk_res.end, protect);
}

60
arch/x86/kvm/svm/avic.c
View File

@@ -839,7 +839,7 @@ static int svm_ir_list_add(struct vcpu_svm *svm, struct amd_iommu_pi_data *pi)
* Allocating new amd_iommu_pi_data, which will get
* add to the per-vcpu ir_list.
*/
ir = kzalloc(sizeof(struct amd_svm_iommu_ir), GFP_KERNEL_ACCOUNT);
ir = kzalloc(sizeof(struct amd_svm_iommu_ir), GFP_ATOMIC | __GFP_ACCOUNT);
if (!ir) {
ret = -ENOMEM;
goto out;
@@ -915,6 +915,7 @@ int avic_pi_update_irte(struct kvm *kvm, unsigned int host_irq,
{
struct kvm_kernel_irq_routing_entry *e;
struct kvm_irq_routing_table *irq_rt;
bool enable_remapped_mode = true;
int idx, ret = 0;
if (!kvm_arch_has_assigned_device(kvm) ||
@@ -952,6 +953,8 @@ int avic_pi_update_irte(struct kvm *kvm, unsigned int host_irq,
kvm_vcpu_apicv_active(&svm->vcpu)) {
struct amd_iommu_pi_data pi;
enable_remapped_mode = false;
/* Try to enable guest_mode in IRTE */
pi.base = __sme_set(page_to_phys(svm->avic_backing_page) &
AVIC_HPA_MASK);
@@ -970,33 +973,6 @@ int avic_pi_update_irte(struct kvm *kvm, unsigned int host_irq,
*/
if (!ret && pi.is_guest_mode)
svm_ir_list_add(svm, &pi);
} else {
/* Use legacy mode in IRTE */
struct amd_iommu_pi_data pi;
/**
* Here, pi is used to:
* - Tell IOMMU to use legacy mode for this interrupt.
* - Retrieve ga_tag of prior interrupt remapping data.
*/
pi.prev_ga_tag = 0;
pi.is_guest_mode = false;
ret = irq_set_vcpu_affinity(host_irq, &pi);
/**
* Check if the posted interrupt was previously
* setup with the guest_mode by checking if the ga_tag
* was cached. If so, we need to clean up the per-vcpu
* ir_list.
*/
if (!ret && pi.prev_ga_tag) {
int id = AVIC_GATAG_TO_VCPUID(pi.prev_ga_tag);
struct kvm_vcpu *vcpu;
vcpu = kvm_get_vcpu_by_id(kvm, id);
if (vcpu)
svm_ir_list_del(to_svm(vcpu), &pi);
}
}
if (!ret && svm) {
@@ -1012,6 +988,34 @@ int avic_pi_update_irte(struct kvm *kvm, unsigned int host_irq,
}
ret = 0;
if (enable_remapped_mode) {
/* Use legacy mode in IRTE */
struct amd_iommu_pi_data pi;
/**
* Here, pi is used to:
* - Tell IOMMU to use legacy mode for this interrupt.
* - Retrieve ga_tag of prior interrupt remapping data.
*/
pi.prev_ga_tag = 0;
pi.is_guest_mode = false;
ret = irq_set_vcpu_affinity(host_irq, &pi);
/**
* Check if the posted interrupt was previously
* setup with the guest_mode by checking if the ga_tag
* was cached. If so, we need to clean up the per-vcpu
* ir_list.
*/
if (!ret && pi.prev_ga_tag) {
int id = AVIC_GATAG_TO_VCPUID(pi.prev_ga_tag);
struct kvm_vcpu *vcpu;
vcpu = kvm_get_vcpu_by_id(kvm, id);
if (vcpu)
svm_ir_list_del(to_svm(vcpu), &pi);
}
}
out:
srcu_read_unlock(&kvm->irq_srcu, idx);
return ret;

13
arch/x86/kvm/svm/svm.c
View File

@@ -1920,11 +1920,11 @@ static void new_asid(struct vcpu_svm *svm, struct svm_cpu_data *sd)
svm->asid = sd->next_asid++;
}
static void svm_set_dr6(struct vcpu_svm *svm, unsigned long value)
static void svm_set_dr6(struct kvm_vcpu *vcpu, unsigned long value)
{
struct vmcb *vmcb = svm->vmcb;
struct vmcb *vmcb = to_svm(vcpu)->vmcb;
if (svm->vcpu.arch.guest_state_protected)
if (vcpu->arch.guest_state_protected)
return;
if (unlikely(value != vmcb->save.dr6)) {
@@ -4035,10 +4035,8 @@ static __no_kcsan fastpath_t svm_vcpu_run(struct kvm_vcpu *vcpu)
* Run with all-zero DR6 unless needed, so that we can get the exact cause
* of a #DB.
*/
if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT))
svm_set_dr6(svm, vcpu->arch.dr6);
else
svm_set_dr6(svm, DR6_ACTIVE_LOW);
if (likely(!(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)))
svm_set_dr6(vcpu, DR6_ACTIVE_LOW);
clgi();
kvm_load_guest_xsave_state(vcpu);
@@ -4807,6 +4805,7 @@ static struct kvm_x86_ops svm_x86_ops __initdata = {
.set_idt = svm_set_idt,
.get_gdt = svm_get_gdt,
.set_gdt = svm_set_gdt,
.set_dr6 = svm_set_dr6,
.set_dr7 = svm_set_dr7,
.sync_dirty_debug_regs = svm_sync_dirty_debug_regs,
.cache_reg = svm_cache_reg,

28
arch/x86/kvm/vmx/posted_intr.c
View File

@@ -272,6 +272,7 @@ int vmx_pi_update_irte(struct kvm *kvm, unsigned int host_irq,
{
struct kvm_kernel_irq_routing_entry *e;
struct kvm_irq_routing_table *irq_rt;
bool enable_remapped_mode = true;
struct kvm_lapic_irq irq;
struct kvm_vcpu *vcpu;
struct vcpu_data vcpu_info;
@@ -310,21 +311,8 @@ int vmx_pi_update_irte(struct kvm *kvm, unsigned int host_irq,
kvm_set_msi_irq(kvm, e, &irq);
if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu) ||
!kvm_irq_is_postable(&irq)) {
/*
* Make sure the IRTE is in remapped mode if
* we don't handle it in posted mode.
*/
ret = irq_set_vcpu_affinity(host_irq, NULL);
if (ret < 0) {
printk(KERN_INFO
"failed to back to remapped mode, irq: %u\n",
host_irq);
goto out;
}
!kvm_irq_is_postable(&irq))
continue;
}
vcpu_info.pi_desc_addr = __pa(vcpu_to_pi_desc(vcpu));
vcpu_info.vector = irq.vector;
@@ -332,11 +320,12 @@ int vmx_pi_update_irte(struct kvm *kvm, unsigned int host_irq,
trace_kvm_pi_irte_update(host_irq, vcpu->vcpu_id, e->gsi,
vcpu_info.vector, vcpu_info.pi_desc_addr, set);
if (set)
ret = irq_set_vcpu_affinity(host_irq, &vcpu_info);
else
ret = irq_set_vcpu_affinity(host_irq, NULL);
if (!set)
continue;
enable_remapped_mode = false;
ret = irq_set_vcpu_affinity(host_irq, &vcpu_info);
if (ret < 0) {
printk(KERN_INFO "%s: failed to update PI IRTE\n",
__func__);
@@ -344,6 +333,9 @@ int vmx_pi_update_irte(struct kvm *kvm, unsigned int host_irq,
}
}
if (enable_remapped_mode)
ret = irq_set_vcpu_affinity(host_irq, NULL);
ret = 0;
out:
srcu_read_unlock(&kvm->irq_srcu, idx);

11
arch/x86/kvm/vmx/vmx.c
View File

@@ -5536,6 +5536,12 @@ static void vmx_sync_dirty_debug_regs(struct kvm_vcpu *vcpu)
set_debugreg(DR6_RESERVED, 6);
}
static void vmx_set_dr6(struct kvm_vcpu *vcpu, unsigned long val)
{
lockdep_assert_irqs_disabled();
set_debugreg(vcpu->arch.dr6, 6);
}
static void vmx_set_dr7(struct kvm_vcpu *vcpu, unsigned long val)
{
vmcs_writel(GUEST_DR7, val);
@@ -7220,10 +7226,6 @@ static fastpath_t vmx_vcpu_run(struct kvm_vcpu *vcpu)
vmx->loaded_vmcs->host_state.cr4 = cr4;
}
/* When KVM_DEBUGREG_WONT_EXIT, dr6 is accessible in guest. */
if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT))
set_debugreg(vcpu->arch.dr6, 6);
/* When single-stepping over STI and MOV SS, we must clear the
* corresponding interruptibility bits in the guest state. Otherwise
* vmentry fails as it then expects bit 14 (BS) in pending debug
@@ -8168,6 +8170,7 @@ static struct kvm_x86_ops vmx_x86_ops __initdata = {
.set_idt = vmx_set_idt,
.get_gdt = vmx_get_gdt,
.set_gdt = vmx_set_gdt,
.set_dr6 = vmx_set_dr6,
.set_dr7 = vmx_set_dr7,
.sync_dirty_debug_regs = vmx_sync_dirty_debug_regs,
.cache_reg = vmx_cache_reg,

10
arch/x86/kvm/x86.c
View File

@@ -10841,6 +10841,9 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
set_debugreg(vcpu->arch.eff_db[1], 1);
set_debugreg(vcpu->arch.eff_db[2], 2);
set_debugreg(vcpu->arch.eff_db[3], 3);
/* When KVM_DEBUGREG_WONT_EXIT, dr6 is accessible in guest. */
if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT))
static_call(kvm_x86_set_dr6)(vcpu, vcpu->arch.dr6);
} else if (unlikely(hw_breakpoint_active())) {
set_debugreg(0, 7);
}
@@ -11460,6 +11463,8 @@ int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
if (kvm_mpx_supported())
kvm_load_guest_fpu(vcpu);
kvm_vcpu_srcu_read_lock(vcpu);
r = kvm_apic_accept_events(vcpu);
if (r < 0)
goto out;
@@ -11473,6 +11478,8 @@ int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
mp_state->mp_state = vcpu->arch.mp_state;
out:
kvm_vcpu_srcu_read_unlock(vcpu);
if (kvm_mpx_supported())
kvm_put_guest_fpu(vcpu);
vcpu_put(vcpu);
@@ -13422,7 +13429,8 @@ int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
struct kvm_kernel_irq_routing_entry *new)
{
if (new->type != KVM_IRQ_ROUTING_MSI)
if (old->type != KVM_IRQ_ROUTING_MSI ||
new->type != KVM_IRQ_ROUTING_MSI)
return true;
return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));

6
arch/x86/mm/tlb.c
View File

@@ -385,9 +385,9 @@ static void cond_mitigation(struct task_struct *next)
prev_mm = this_cpu_read(cpu_tlbstate.last_user_mm_spec);
/*
* Avoid user/user BTB poisoning by flushing the branch predictor
* when switching between processes. This stops one process from
* doing Spectre-v2 attacks on another.
* Avoid user->user BTB/RSB poisoning by flushing them when switching
* between processes. This stops one process from doing Spectre-v2
* attacks on another.
*
* Both, the conditional and the always IBPB mode use the mm
* pointer to avoid the IBPB when switching between tasks of the

7
arch/x86/platform/pvh/head.S
View File

@@ -100,7 +100,12 @@ SYM_CODE_START_LOCAL(pvh_start_xen)
xor %edx, %edx
wrmsr
call xen_prepare_pvh
/* Call xen_prepare_pvh() via the kernel virtual mapping */
leaq xen_prepare_pvh(%rip), %rax
subq phys_base(%rip), %rax
addq $__START_KERNEL_map, %rax
ANNOTATE_RETPOLINE_SAFE
call *%rax
/* startup_64 expects boot_params in %rsi. */
mov $_pa(pvh_bootparams), %rsi

39
crypto/crypto_null.c
View File

@@ -17,10 +17,14 @@
#include <crypto/internal/skcipher.h>
#include <linux/init.h>
#include <linux/module.h>
#ifdef __GENKSYMS__ // CRC fix for e307c54ac819 ("crypto: null - Use spin lock instead of mutex")
#include <linux/mm.h>
#else
#include <linux/spinlock.h>
#endif
#include <linux/string.h>
static DEFINE_MUTEX(crypto_default_null_skcipher_lock);
static DEFINE_SPINLOCK(crypto_default_null_skcipher_lock);
static struct crypto_sync_skcipher *crypto_default_null_skcipher;
static int crypto_default_null_skcipher_refcnt;
@@ -152,23 +156,32 @@ MODULE_ALIAS_CRYPTO("cipher_null");
struct crypto_sync_skcipher *crypto_get_default_null_skcipher(void)
{
struct crypto_sync_skcipher *ntfm = NULL;
struct crypto_sync_skcipher *tfm;
mutex_lock(&crypto_default_null_skcipher_lock);
spin_lock_bh(&crypto_default_null_skcipher_lock);
tfm = crypto_default_null_skcipher;
if (!tfm) {
tfm = crypto_alloc_sync_skcipher("ecb(cipher_null)", 0, 0);
if (IS_ERR(tfm))
goto unlock;
spin_unlock_bh(&crypto_default_null_skcipher_lock);
crypto_default_null_skcipher = tfm;
ntfm = crypto_alloc_sync_skcipher("ecb(cipher_null)", 0, 0);
if (IS_ERR(ntfm))
return ntfm;
spin_lock_bh(&crypto_default_null_skcipher_lock);
tfm = crypto_default_null_skcipher;
if (!tfm) {
tfm = ntfm;
ntfm = NULL;
crypto_default_null_skcipher = tfm;
}
}
crypto_default_null_skcipher_refcnt++;
spin_unlock_bh(&crypto_default_null_skcipher_lock);
unlock:
mutex_unlock(&crypto_default_null_skcipher_lock);
crypto_free_sync_skcipher(ntfm);
return tfm;
}
@@ -176,12 +189,16 @@ EXPORT_SYMBOL_GPL(crypto_get_default_null_skcipher);
void crypto_put_default_null_skcipher(void)
{
mutex_lock(&crypto_default_null_skcipher_lock);
struct crypto_sync_skcipher *tfm = NULL;
spin_lock_bh(&crypto_default_null_skcipher_lock);
if (!--crypto_default_null_skcipher_refcnt) {
crypto_free_sync_skcipher(crypto_default_null_skcipher);
tfm = crypto_default_null_skcipher;
crypto_default_null_skcipher = NULL;
}
mutex_unlock(&crypto_default_null_skcipher_lock);
spin_unlock_bh(&crypto_default_null_skcipher_lock);
crypto_free_sync_skcipher(tfm);
}
EXPORT_SYMBOL_GPL(crypto_put_default_null_skcipher);

28
drivers/acpi/ec.c
View File

@@ -2260,6 +2260,34 @@ static const struct dmi_system_id acpi_ec_no_wakeup[] = {
DMI_MATCH(DMI_PRODUCT_FAMILY, "103C_5336AN HP ZHAN 66 Pro"),
},
},
/*
* Lenovo Legion Go S; touchscreen blocks HW sleep when woken up from EC
* https://gitlab.freedesktop.org/drm/amd/-/issues/3929
*/
{
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
DMI_MATCH(DMI_PRODUCT_NAME, "83L3"),
}
},
{
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
DMI_MATCH(DMI_PRODUCT_NAME, "83N6"),
}
},
{
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
DMI_MATCH(DMI_PRODUCT_NAME, "83Q2"),
}
},
{
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
DMI_MATCH(DMI_PRODUCT_NAME, "83Q3"),
}
},
{ },
};

20
drivers/acpi/platform_profile.c
View File

@@ -22,8 +22,8 @@ static const char * const profile_names[] = {
};
static_assert(ARRAY_SIZE(profile_names) == PLATFORM_PROFILE_LAST);
static ssize_t platform_profile_choices_show(struct device *dev,
struct device_attribute *attr,
static ssize_t platform_profile_choices_show(struct kobject *kobj,
struct kobj_attribute *attr,
char *buf)
{
int len = 0;
@@ -49,8 +49,8 @@ static ssize_t platform_profile_choices_show(struct device *dev,
return len;
}
static ssize_t platform_profile_show(struct device *dev,
struct device_attribute *attr,
static ssize_t platform_profile_show(struct kobject *kobj,
struct kobj_attribute *attr,
char *buf)
{
enum platform_profile_option profile = PLATFORM_PROFILE_BALANCED;
@@ -77,8 +77,8 @@ static ssize_t platform_profile_show(struct device *dev,
return sysfs_emit(buf, "%s\n", profile_names[profile]);
}
static ssize_t platform_profile_store(struct device *dev,
struct device_attribute *attr,
static ssize_t platform_profile_store(struct kobject *kobj,
struct kobj_attribute *attr,
const char *buf, size_t count)
{
int err, i;
@@ -115,12 +115,12 @@ static ssize_t platform_profile_store(struct device *dev,
return count;
}
static DEVICE_ATTR_RO(platform_profile_choices);
static DEVICE_ATTR_RW(platform_profile);
static struct kobj_attribute attr_platform_profile_choices = __ATTR_RO(platform_profile_choices);
static struct kobj_attribute attr_platform_profile = __ATTR_RW(platform_profile);
static struct attribute *platform_profile_attrs[] = {
&dev_attr_platform_profile_choices.attr,
&dev_attr_platform_profile.attr,
&attr_platform_profile_choices.attr,
&attr_platform_profile.attr,
NULL
};

4
drivers/acpi/pptt.c
View File

@@ -217,7 +217,7 @@ static int acpi_pptt_leaf_node(struct acpi_table_header *table_hdr,
node_entry = ACPI_PTR_DIFF(node, table_hdr);
entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr,
sizeof(struct acpi_table_pptt));
proc_sz = sizeof(struct acpi_pptt_processor *);
proc_sz = sizeof(struct acpi_pptt_processor);
while ((unsigned long)entry + proc_sz < table_end) {
cpu_node = (struct acpi_pptt_processor *)entry;
@@ -258,7 +258,7 @@ static struct acpi_pptt_processor *acpi_find_processor_node(struct acpi_table_he
table_end = (unsigned long)table_hdr + table_hdr->length;
entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr,
sizeof(struct acpi_table_pptt));
proc_sz = sizeof(struct acpi_pptt_processor *);
proc_sz = sizeof(struct acpi_pptt_processor);
/* find the processor structure associated with this cpuid */
while ((unsigned long)entry + proc_sz < table_end) {

2
drivers/ata/ahci.c
View File

@@ -592,6 +592,8 @@ static const struct pci_device_id ahci_pci_tbl[] = {
.driver_data = board_ahci_yes_fbs },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x91a3),
.driver_data = board_ahci_yes_fbs },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9215),
.driver_data = board_ahci_yes_fbs },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9230),
.driver_data = board_ahci_yes_fbs },
{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, 0x9235),

11
drivers/ata/libata-eh.c
View File

@@ -1510,8 +1510,15 @@ unsigned int atapi_eh_request_sense(struct ata_device *dev,
tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
tf.command = ATA_CMD_PACKET;
/* is it pointless to prefer PIO for "safety reasons"? */
if (ap->flags & ATA_FLAG_PIO_DMA) {
/*
* Do not use DMA if the connected device only supports PIO, even if the
* port prefers PIO commands via DMA.
*
* Ideally, we should call atapi_check_dma() to check if it is safe for
* the LLD to use DMA for REQUEST_SENSE, but we don't have a qc.
* Since we can't check the command, perhaps we should only use pio?
*/
if ((ap->flags & ATA_FLAG_PIO_DMA) && !(dev->flags & ATA_DFLAG_PIO)) {
tf.protocol = ATAPI_PROT_DMA;
tf.feature |= ATAPI_PKT_DMA;
} else {

6
drivers/ata/pata_pxa.c
View File

@@ -223,10 +223,16 @@ static int pxa_ata_probe(struct platform_device *pdev)
ap->ioaddr.cmd_addr = devm_ioremap(&pdev->dev, cmd_res->start,
resource_size(cmd_res));
if (!ap->ioaddr.cmd_addr)
return -ENOMEM;
ap->ioaddr.ctl_addr = devm_ioremap(&pdev->dev, ctl_res->start,
resource_size(ctl_res));
if (!ap->ioaddr.ctl_addr)
return -ENOMEM;
ap->ioaddr.bmdma_addr = devm_ioremap(&pdev->dev, dma_res->start,
resource_size(dma_res));
if (!ap->ioaddr.bmdma_addr)
return -ENOMEM;
/*
* Adjust register offsets

13
drivers/ata/sata_sx4.c
View File

@@ -1118,9 +1118,14 @@ static int pdc20621_prog_dimm0(struct ata_host *host)
mmio += PDC_CHIP0_OFS;
for (i = 0; i < ARRAY_SIZE(pdc_i2c_read_data); i++)
pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
pdc_i2c_read_data[i].reg,
&spd0[pdc_i2c_read_data[i].ofs]);
if (!pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
pdc_i2c_read_data[i].reg,
&spd0[pdc_i2c_read_data[i].ofs])) {
dev_err(host->dev,
"Failed in i2c read at index %d: device=%#x, reg=%#x\n",
i, PDC_DIMM0_SPD_DEV_ADDRESS, pdc_i2c_read_data[i].reg);
return -EIO;
}
data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4);
data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) |
@@ -1285,6 +1290,8 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host)
/* Programming DIMM0 Module Control Register (index_CID0:80h) */
size = pdc20621_prog_dimm0(host);
if (size < 0)
return size;
dev_dbg(host->dev, "Local DIMM Size = %dMB\n", size);
/* Programming DIMM Module Global Control Register (index_CID0:88h) */

9
drivers/auxdisplay/hd44780.c
View File

@@ -313,13 +313,13 @@ static int hd44780_probe(struct platform_device *pdev)
fail3:
kfree(hd);
fail2:
kfree(lcd);
charlcd_free(lcd);
fail1:
kfree(hdc);
return ret;
}
static int hd44780_remove(struct platform_device *pdev)
static void hd44780_remove(struct platform_device *pdev)
{
struct charlcd *lcd = platform_get_drvdata(pdev);
struct hd44780_common *hdc = lcd->drvdata;
@@ -328,8 +328,7 @@ static int hd44780_remove(struct platform_device *pdev)
kfree(hdc->hd44780);
kfree(lcd->drvdata);
kfree(lcd);
return 0;
charlcd_free(lcd);
}
static const struct of_device_id hd44780_of_match[] = {
@@ -340,7 +339,7 @@ MODULE_DEVICE_TABLE(of, hd44780_of_match);
static struct platform_driver hd44780_driver = {
.probe = hd44780_probe,
.remove = hd44780_remove,
.remove_new = hd44780_remove,
.driver = {
.name = "hd44780",
.of_match_table = hd44780_of_match,

7
drivers/base/devres.c
View File

@@ -684,6 +684,13 @@ int devres_release_group(struct device *dev, void *id)
spin_unlock_irqrestore(&dev->devres_lock, flags);
release_nodes(dev, &todo);
} else if (list_empty(&dev->devres_head)) {
/*
* dev is probably dying via devres_release_all(): groups
* have already been removed and are on the process of
* being released - don't touch and don't warn.
*/
spin_unlock_irqrestore(&dev->devres_lock, flags);
} else {
WARN_ON(1);
spin_unlock_irqrestore(&dev->devres_lock, flags);

9
drivers/block/loop.c
View File

@@ -441,7 +441,7 @@ static int lo_rw_aio(struct loop_device *lo, struct loop_cmd *cmd,
cmd->iocb.ki_filp = file;
cmd->iocb.ki_complete = lo_rw_aio_complete;
cmd->iocb.ki_flags = IOCB_DIRECT;
cmd->iocb.ki_ioprio = IOPRIO_PRIO_VALUE(IOPRIO_CLASS_NONE, 0);
cmd->iocb.ki_ioprio = req_get_ioprio(rq);
if (rw == ITER_SOURCE)
ret = call_write_iter(file, &cmd->iocb, &iter);
@@ -624,19 +624,20 @@ static int loop_change_fd(struct loop_device *lo, struct block_device *bdev,
* dependency.
*/
fput(old_file);
dev_set_uevent_suppress(disk_to_dev(lo->lo_disk), 0);
if (partscan)
loop_reread_partitions(lo);
error = 0;
done:
/* enable and uncork uevent now that we are done */
dev_set_uevent_suppress(disk_to_dev(lo->lo_disk), 0);
kobject_uevent(&disk_to_dev(lo->lo_disk)->kobj, KOBJ_CHANGE);
return error;
out_err:
loop_global_unlock(lo, is_loop);
out_putf:
fput(file);
dev_set_uevent_suppress(disk_to_dev(lo->lo_disk), 0);
goto done;
}
@@ -1104,8 +1105,8 @@ static int loop_configure(struct loop_device *lo, fmode_t mode,
if (partscan)
clear_bit(GD_SUPPRESS_PART_SCAN, &lo->lo_disk->state);
/* enable and uncork uevent now that we are done */
dev_set_uevent_suppress(disk_to_dev(lo->lo_disk), 0);
kobject_uevent(&disk_to_dev(lo->lo_disk)->kobj, KOBJ_CHANGE);
loop_global_unlock(lo, is_loop);
if (partscan)

2
drivers/bluetooth/btrtl.c
View File

@@ -817,6 +817,8 @@ out_free:
rtl_dev_err(hdev, "mandatory config file %s not found",
btrtl_dev->ic_info->cfg_name);
ret = btrtl_dev->cfg_len;
if (!ret)
ret = -EINVAL;
goto err_free;
}
}

19
drivers/bluetooth/hci_ldisc.c
View File

@@ -102,7 +102,8 @@ static inline struct sk_buff *hci_uart_dequeue(struct hci_uart *hu)
if (!skb) {
percpu_down_read(&hu->proto_lock);
if (test_bit(HCI_UART_PROTO_READY, &hu->flags))
if (test_bit(HCI_UART_PROTO_READY, &hu->flags) ||
test_bit(HCI_UART_PROTO_INIT, &hu->flags))
skb = hu->proto->dequeue(hu);
percpu_up_read(&hu->proto_lock);
@@ -124,7 +125,8 @@ int hci_uart_tx_wakeup(struct hci_uart *hu)
if (!percpu_down_read_trylock(&hu->proto_lock))
return 0;
if (!test_bit(HCI_UART_PROTO_READY, &hu->flags))
if (!test_bit(HCI_UART_PROTO_READY, &hu->flags) &&
!test_bit(HCI_UART_PROTO_INIT, &hu->flags))
goto no_schedule;
set_bit(HCI_UART_TX_WAKEUP, &hu->tx_state);
@@ -278,7 +280,8 @@ static int hci_uart_send_frame(struct hci_dev *hdev, struct sk_buff *skb)
percpu_down_read(&hu->proto_lock);
if (!test_bit(HCI_UART_PROTO_READY, &hu->flags)) {
if (!test_bit(HCI_UART_PROTO_READY, &hu->flags) &&
!test_bit(HCI_UART_PROTO_INIT, &hu->flags)) {
percpu_up_read(&hu->proto_lock);
return -EUNATCH;
}
@@ -582,7 +585,8 @@ static void hci_uart_tty_wakeup(struct tty_struct *tty)
if (tty != hu->tty)
return;
if (test_bit(HCI_UART_PROTO_READY, &hu->flags))
if (test_bit(HCI_UART_PROTO_READY, &hu->flags) ||
test_bit(HCI_UART_PROTO_INIT, &hu->flags))
hci_uart_tx_wakeup(hu);
}
@@ -608,7 +612,8 @@ static void hci_uart_tty_receive(struct tty_struct *tty, const u8 *data,
percpu_down_read(&hu->proto_lock);
if (!test_bit(HCI_UART_PROTO_READY, &hu->flags)) {
if (!test_bit(HCI_UART_PROTO_READY, &hu->flags) &&
!test_bit(HCI_UART_PROTO_INIT, &hu->flags)) {
percpu_up_read(&hu->proto_lock);
return;
}
@@ -709,12 +714,16 @@ static int hci_uart_set_proto(struct hci_uart *hu, int id)
hu->proto = p;
set_bit(HCI_UART_PROTO_INIT, &hu->flags);
err = hci_uart_register_dev(hu);
if (err) {
return err;
}
set_bit(HCI_UART_PROTO_READY, &hu->flags);
clear_bit(HCI_UART_PROTO_INIT, &hu->flags);
return 0;
}

1
drivers/bluetooth/hci_uart.h
View File

@@ -90,6 +90,7 @@ struct hci_uart {
#define HCI_UART_REGISTERED 1
#define HCI_UART_PROTO_READY 2
#define HCI_UART_NO_SUSPEND_NOTIFIER 3
#define HCI_UART_PROTO_INIT 4
/* TX states */
#define HCI_UART_SENDING 1

16
drivers/bus/mhi/host/main.c
View File

@@ -1201,11 +1201,16 @@ int mhi_gen_tre(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan,
struct mhi_ring_element *mhi_tre;
struct mhi_buf_info *buf_info;
int eot, eob, chain, bei;
int ret;
int ret = 0;
/* Protect accesses for reading and incrementing WP */
write_lock_bh(&mhi_chan->lock);
if (mhi_chan->ch_state != MHI_CH_STATE_ENABLED) {
ret = -ENODEV;
goto out;
}
buf_ring = &mhi_chan->buf_ring;
tre_ring = &mhi_chan->tre_ring;
@@ -1223,10 +1228,8 @@ int mhi_gen_tre(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan,
if (!info->pre_mapped) {
ret = mhi_cntrl->map_single(mhi_cntrl, buf_info);
if (ret) {
write_unlock_bh(&mhi_chan->lock);
return ret;
}
if (ret)
goto out;
}
eob = !!(flags & MHI_EOB);
@@ -1243,9 +1246,10 @@ int mhi_gen_tre(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan,
mhi_add_ring_element(mhi_cntrl, tre_ring);
mhi_add_ring_element(mhi_cntrl, buf_ring);
out:
write_unlock_bh(&mhi_chan->lock);
return 0;
return ret;
}
int mhi_queue_buf(struct mhi_device *mhi_dev, enum dma_data_direction dir,

20
drivers/char/tpm/tpm_tis_core.c
View File

@@ -104,11 +104,10 @@ again:
return 0;
/* process status changes without irq support */
do {
usleep_range(priv->timeout_min, priv->timeout_max);
status = chip->ops->status(chip);
if ((status & mask) == mask)
return 0;
usleep_range(priv->timeout_min,
priv->timeout_max);
} while (time_before(jiffies, stop));
return -ETIME;
}
@@ -433,7 +432,10 @@ static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
&priv->int_queue, false) < 0) {
rc = -ETIME;
if (test_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags))
rc = -EAGAIN;
else
rc = -ETIME;
goto out_err;
}
status = tpm_tis_status(chip);
@@ -450,7 +452,10 @@ static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
&priv->int_queue, false) < 0) {
rc = -ETIME;
if (test_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags))
rc = -EAGAIN;
else
rc = -ETIME;
goto out_err;
}
status = tpm_tis_status(chip);
@@ -505,9 +510,11 @@ static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
if (rc >= 0)
/* Data transfer done successfully */
break;
else if (rc != -EIO)
else if (rc != -EAGAIN && rc != -EIO)
/* Data transfer failed, not recoverable */
return rc;
usleep_range(priv->timeout_min, priv->timeout_max);
}
rc = tpm_tis_verify_crc(priv, len, buf);
@@ -1044,6 +1051,9 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
priv->timeout_max = TIS_TIMEOUT_MAX_ATML;
}
if (priv->manufacturer_id == TPM_VID_IFX)
set_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags);
if (is_bsw()) {
priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
ILB_REMAP_SIZE);

1
drivers/char/tpm/tpm_tis_core.h
View File

@@ -88,6 +88,7 @@ enum tpm_tis_flags {
TPM_TIS_INVALID_STATUS = 1,
TPM_TIS_DEFAULT_CANCELLATION = 2,
TPM_TIS_IRQ_TESTED = 3,
TPM_TIS_STATUS_VALID_RETRY = 4,
};
struct tpm_tis_data {

7
drivers/char/virtio_console.c
View File

@@ -1615,8 +1615,8 @@ static void handle_control_message(struct virtio_device *vdev,
break;
case VIRTIO_CONSOLE_RESIZE: {
struct {
__u16 rows;
__u16 cols;
__virtio16 rows;
__virtio16 cols;
} size;
if (!is_console_port(port))
@@ -1624,7 +1624,8 @@ static void handle_control_message(struct virtio_device *vdev,
memcpy(&size, buf->buf + buf->offset + sizeof(*cpkt),
sizeof(size));
set_console_size(port, size.rows, size.cols);
set_console_size(port, virtio16_to_cpu(vdev, size.rows),
virtio16_to_cpu(vdev, size.cols));
port->cons.hvc->irq_requested = 1;
resize_console(port);

4
drivers/clk/clk.c
View File

@@ -5193,6 +5193,10 @@ of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec)
if (!clkspec)
return ERR_PTR(-EINVAL);
/* Check if node in clkspec is in disabled/fail state */
if (!of_device_is_available(clkspec->np))
return ERR_PTR(-ENOENT);
mutex_lock(&of_clk_mutex);
list_for_each_entry(provider, &of_clk_providers, link) {
if (provider->node == clkspec->np) {

61
drivers/clk/qcom/gdsc.c
View File

@@ -290,6 +290,9 @@ static int gdsc_enable(struct generic_pm_domain *domain)
*/
udelay(1);
if (sc->flags & RETAIN_FF_ENABLE)
gdsc_retain_ff_on(sc);
/* Turn on HW trigger mode if supported */
if (sc->flags & HW_CTRL) {
ret = gdsc_hwctrl(sc, true);
@@ -306,9 +309,6 @@ static int gdsc_enable(struct generic_pm_domain *domain)
udelay(1);
}
if (sc->flags & RETAIN_FF_ENABLE)
gdsc_retain_ff_on(sc);
return 0;
}
@@ -418,13 +418,6 @@ static int gdsc_init(struct gdsc *sc)
goto err_disable_supply;
}
/* Turn on HW trigger mode if supported */
if (sc->flags & HW_CTRL) {
ret = gdsc_hwctrl(sc, true);
if (ret < 0)
goto err_disable_supply;
}
/*
* Make sure the retain bit is set if the GDSC is already on,
* otherwise we end up turning off the GDSC and destroying all
@@ -432,6 +425,14 @@ static int gdsc_init(struct gdsc *sc)
*/
if (sc->flags & RETAIN_FF_ENABLE)
gdsc_retain_ff_on(sc);
/* Turn on HW trigger mode if supported */
if (sc->flags & HW_CTRL) {
ret = gdsc_hwctrl(sc, true);
if (ret < 0)
goto err_disable_supply;
}
} else if (sc->flags & ALWAYS_ON) {
/* If ALWAYS_ON GDSCs are not ON, turn them ON */
gdsc_enable(&sc->pd);
@@ -463,6 +464,23 @@ err_disable_supply:
return ret;
}
static void gdsc_pm_subdomain_remove(struct gdsc_desc *desc, size_t num)
{
struct device *dev = desc->dev;
struct gdsc **scs = desc->scs;
int i;
/* Remove subdomains */
for (i = num - 1; i >= 0; i--) {
if (!scs[i])
continue;
if (scs[i]->parent)
pm_genpd_remove_subdomain(scs[i]->parent, &scs[i]->pd);
else if (!IS_ERR_OR_NULL(dev->pm_domain))
pm_genpd_remove_subdomain(pd_to_genpd(dev->pm_domain), &scs[i]->pd);
}
}
int gdsc_register(struct gdsc_desc *desc,
struct reset_controller_dev *rcdev, struct regmap *regmap)
{
@@ -507,30 +525,27 @@ int gdsc_register(struct gdsc_desc *desc,
if (!scs[i])
continue;
if (scs[i]->parent)
pm_genpd_add_subdomain(scs[i]->parent, &scs[i]->pd);
ret = pm_genpd_add_subdomain(scs[i]->parent, &scs[i]->pd);
else if (!IS_ERR_OR_NULL(dev->pm_domain))
pm_genpd_add_subdomain(pd_to_genpd(dev->pm_domain), &scs[i]->pd);
ret = pm_genpd_add_subdomain(pd_to_genpd(dev->pm_domain), &scs[i]->pd);
if (ret)
goto err_pm_subdomain_remove;
}
return of_genpd_add_provider_onecell(dev->of_node, data);
err_pm_subdomain_remove:
gdsc_pm_subdomain_remove(desc, i);
return ret;
}
void gdsc_unregister(struct gdsc_desc *desc)
{
int i;
struct device *dev = desc->dev;
struct gdsc **scs = desc->scs;
size_t num = desc->num;
/* Remove subdomains */
for (i = 0; i < num; i++) {
if (!scs[i])
continue;
if (scs[i]->parent)
pm_genpd_remove_subdomain(scs[i]->parent, &scs[i]->pd);
else if (!IS_ERR_OR_NULL(dev->pm_domain))
pm_genpd_remove_subdomain(pd_to_genpd(dev->pm_domain), &scs[i]->pd);
}
gdsc_pm_subdomain_remove(desc, num);
of_genpd_del_provider(dev->of_node);
}

28
drivers/clk/renesas/r9a07g043-cpg.c
View File

@@ -14,6 +14,17 @@
#include "rzg2l-cpg.h"
/* Specific registers. */
#define CPG_PL2SDHI_DSEL (0x218)
/* Clock select configuration. */
#define SEL_SDHI0 SEL_PLL_PACK(CPG_PL2SDHI_DSEL, 0, 2)
#define SEL_SDHI1 SEL_PLL_PACK(CPG_PL2SDHI_DSEL, 4, 2)
/* Clock status configuration. */
#define SEL_SDHI0_STS SEL_PLL_PACK(CPG_CLKSTATUS, 28, 1)
#define SEL_SDHI1_STS SEL_PLL_PACK(CPG_CLKSTATUS, 29, 1)
enum clk_ids {
/* Core Clock Outputs exported to DT */
LAST_DT_CORE_CLK = R9A07G043_CLK_P0_DIV2,
@@ -75,8 +86,12 @@ static const struct clk_div_table dtable_1_32[] = {
/* Mux clock tables */
static const char * const sel_pll3_3[] = { ".pll3_533", ".pll3_400" };
#ifdef CONFIG_ARM64
static const char * const sel_pll6_2[] = { ".pll6_250", ".pll5_250" };
static const char * const sel_shdi[] = { ".clk_533", ".clk_400", ".clk_266" };
#endif
static const char * const sel_sdhi[] = { ".clk_533", ".clk_400", ".clk_266" };
static const u32 mtable_sdhi[] = { 1, 2, 3 };
static const struct cpg_core_clk r9a07g043_core_clks[] __initconst = {
/* External Clock Inputs */
@@ -120,11 +135,18 @@ static const struct cpg_core_clk r9a07g043_core_clks[] __initconst = {
DEF_DIV("P2", R9A07G043_CLK_P2, CLK_PLL3_DIV2_4_2, DIVPL3A, dtable_1_32),
DEF_FIXED("M0", R9A07G043_CLK_M0, CLK_PLL3_DIV2_4, 1, 1),
DEF_FIXED("ZT", R9A07G043_CLK_ZT, CLK_PLL3_DIV2_4_2, 1, 1),
#ifdef CONFIG_ARM64
DEF_MUX("HP", R9A07G043_CLK_HP, SEL_PLL6_2, sel_pll6_2),
#endif
#ifdef CONFIG_RISCV
DEF_FIXED("HP", R9A07G043_CLK_HP, CLK_PLL6_250, 1, 1),
#endif
DEF_FIXED("SPI0", R9A07G043_CLK_SPI0, CLK_DIV_PLL3_C, 1, 2),
DEF_FIXED("SPI1", R9A07G043_CLK_SPI1, CLK_DIV_PLL3_C, 1, 4),
DEF_SD_MUX("SD0", R9A07G043_CLK_SD0, SEL_SDHI0, sel_shdi),
DEF_SD_MUX("SD1", R9A07G043_CLK_SD1, SEL_SDHI1, sel_shdi),
DEF_SD_MUX("SD0", R9A07G043_CLK_SD0, SEL_SDHI0, SEL_SDHI0_STS, sel_sdhi,
mtable_sdhi, 0, rzg2l_cpg_sd_clk_mux_notifier),
DEF_SD_MUX("SD1", R9A07G043_CLK_SD1, SEL_SDHI1, SEL_SDHI1_STS, sel_sdhi,
mtable_sdhi, 0, rzg2l_cpg_sd_clk_mux_notifier),
DEF_FIXED("SD0_DIV4", CLK_SD0_DIV4, R9A07G043_CLK_SD0, 1, 4),
DEF_FIXED("SD1_DIV4", CLK_SD1_DIV4, R9A07G043_CLK_SD1, 1, 4),
};

21
drivers/clk/renesas/r9a07g044-cpg.c
View File

@@ -15,6 +15,17 @@
#include "rzg2l-cpg.h"
/* Specific registers. */
#define CPG_PL2SDHI_DSEL (0x218)
/* Clock select configuration. */
#define SEL_SDHI0 SEL_PLL_PACK(CPG_PL2SDHI_DSEL, 0, 2)
#define SEL_SDHI1 SEL_PLL_PACK(CPG_PL2SDHI_DSEL, 4, 2)
/* Clock status configuration. */
#define SEL_SDHI0_STS SEL_PLL_PACK(CPG_CLKSTATUS, 28, 1)
#define SEL_SDHI1_STS SEL_PLL_PACK(CPG_CLKSTATUS, 29, 1)
enum clk_ids {
/* Core Clock Outputs exported to DT */
LAST_DT_CORE_CLK = R9A07G054_CLK_DRP_A,
@@ -95,9 +106,11 @@ static const struct clk_div_table dtable_16_128[] = {
static const char * const sel_pll3_3[] = { ".pll3_533", ".pll3_400" };
static const char * const sel_pll5_4[] = { ".pll5_foutpostdiv", ".pll5_fout1ph0" };
static const char * const sel_pll6_2[] = { ".pll6_250", ".pll5_250" };
static const char * const sel_shdi[] = { ".clk_533", ".clk_400", ".clk_266" };
static const char * const sel_sdhi[] = { ".clk_533", ".clk_400", ".clk_266" };
static const char * const sel_gpu2[] = { ".pll6", ".pll3_div2_2" };
static const u32 mtable_sdhi[] = { 1, 2, 3 };
static const struct {
struct cpg_core_clk common[56];
#ifdef CONFIG_CLK_R9A07G054
@@ -163,8 +176,10 @@ static const struct {
DEF_MUX("HP", R9A07G044_CLK_HP, SEL_PLL6_2, sel_pll6_2),
DEF_FIXED("SPI0", R9A07G044_CLK_SPI0, CLK_DIV_PLL3_C, 1, 2),
DEF_FIXED("SPI1", R9A07G044_CLK_SPI1, CLK_DIV_PLL3_C, 1, 4),
DEF_SD_MUX("SD0", R9A07G044_CLK_SD0, SEL_SDHI0, sel_shdi),
DEF_SD_MUX("SD1", R9A07G044_CLK_SD1, SEL_SDHI1, sel_shdi),
DEF_SD_MUX("SD0", R9A07G044_CLK_SD0, SEL_SDHI0, SEL_SDHI0_STS, sel_sdhi,
mtable_sdhi, 0, rzg2l_cpg_sd_clk_mux_notifier),
DEF_SD_MUX("SD1", R9A07G044_CLK_SD1, SEL_SDHI1, SEL_SDHI1_STS, sel_sdhi,
mtable_sdhi, 0, rzg2l_cpg_sd_clk_mux_notifier),
DEF_FIXED("SD0_DIV4", CLK_SD0_DIV4, R9A07G044_CLK_SD0, 1, 4),
DEF_FIXED("SD1_DIV4", CLK_SD1_DIV4, R9A07G044_CLK_SD1, 1, 4),
DEF_DIV("G", R9A07G044_CLK_G, CLK_SEL_GPU2, DIVGPU, dtable_1_8),

178
drivers/clk/renesas/rzg2l-cpg.c
View File

@@ -57,15 +57,37 @@
#define GET_REG_SAMPLL_CLK1(val) ((val >> 22) & 0xfff)
#define GET_REG_SAMPLL_CLK2(val) ((val >> 12) & 0xfff)
#define CPG_WEN_BIT BIT(16)
#define MAX_VCLK_FREQ (148500000)
struct sd_hw_data {
/**
* struct clk_hw_data - clock hardware data
* @hw: clock hw
* @conf: clock configuration (register offset, shift, width)
* @sconf: clock status configuration (register offset, shift, width)
* @priv: CPG private data structure
*/
struct clk_hw_data {
struct clk_hw hw;
u32 conf;
u32 sconf;
struct rzg2l_cpg_priv *priv;
};
#define to_sd_hw_data(_hw) container_of(_hw, struct sd_hw_data, hw)
#define to_clk_hw_data(_hw) container_of(_hw, struct clk_hw_data, hw)
/**
* struct sd_mux_hw_data - SD MUX clock hardware data
* @hw_data: clock hw data
* @mtable: clock mux table
*/
struct sd_mux_hw_data {
struct clk_hw_data hw_data;
const u32 *mtable;
};
#define to_sd_mux_hw_data(_hw) container_of(_hw, struct sd_mux_hw_data, hw_data)
struct rzg2l_pll5_param {
u32 pl5_fracin;
@@ -119,6 +141,76 @@ static void rzg2l_cpg_del_clk_provider(void *data)
of_clk_del_provider(data);
}
/* Must be called in atomic context. */
static int rzg2l_cpg_wait_clk_update_done(void __iomem *base, u32 conf)
{
u32 bitmask = GENMASK(GET_WIDTH(conf) - 1, 0) << GET_SHIFT(conf);
u32 off = GET_REG_OFFSET(conf);
u32 val;
return readl_poll_timeout_atomic(base + off, val, !(val & bitmask), 10, 200);
}
int rzg2l_cpg_sd_clk_mux_notifier(struct notifier_block *nb, unsigned long event,
void *data)
{
struct clk_notifier_data *cnd = data;
struct clk_hw *hw = __clk_get_hw(cnd->clk);
struct clk_hw_data *clk_hw_data = to_clk_hw_data(hw);
struct rzg2l_cpg_priv *priv = clk_hw_data->priv;
u32 off = GET_REG_OFFSET(clk_hw_data->conf);
u32 shift = GET_SHIFT(clk_hw_data->conf);
const u32 clk_src_266 = 3;
unsigned long flags;
int ret;
if (event != PRE_RATE_CHANGE || (cnd->new_rate / MEGA == 266))
return NOTIFY_DONE;
spin_lock_irqsave(&priv->rmw_lock, flags);
/*
* As per the HW manual, we should not directly switch from 533 MHz to
* 400 MHz and vice versa. To change the setting from 2’b01 (533 MHz)
* to 2’b10 (400 MHz) or vice versa, Switch to 2’b11 (266 MHz) first,
* and then switch to the target setting (2’b01 (533 MHz) or 2’b10
* (400 MHz)).
* Setting a value of '0' to the SEL_SDHI0_SET or SEL_SDHI1_SET clock
* switching register is prohibited.
* The clock mux has 3 input clocks(533 MHz, 400 MHz, and 266 MHz), and
* the index to value mapping is done by adding 1 to the index.
*/
writel((CPG_WEN_BIT | clk_src_266) << shift, priv->base + off);
/* Wait for the update done. */
ret = rzg2l_cpg_wait_clk_update_done(priv->base, clk_hw_data->sconf);
spin_unlock_irqrestore(&priv->rmw_lock, flags);
if (ret)
dev_err(priv->dev, "failed to switch to safe clk source\n");
return notifier_from_errno(ret);
}
static int rzg2l_register_notifier(struct clk_hw *hw, const struct cpg_core_clk *core,
struct rzg2l_cpg_priv *priv)
{
struct notifier_block *nb;
if (!core->notifier)
return 0;
nb = devm_kzalloc(priv->dev, sizeof(*nb), GFP_KERNEL);
if (!nb)
return -ENOMEM;
nb->notifier_call = core->notifier;
return clk_notifier_register(hw->clk, nb);
}
static struct clk * __init
rzg2l_cpg_div_clk_register(const struct cpg_core_clk *core,
struct clk **clks,
@@ -187,63 +279,44 @@ static int rzg2l_cpg_sd_clk_mux_determine_rate(struct clk_hw *hw,
static int rzg2l_cpg_sd_clk_mux_set_parent(struct clk_hw *hw, u8 index)
{
struct sd_hw_data *hwdata = to_sd_hw_data(hw);
struct rzg2l_cpg_priv *priv = hwdata->priv;
u32 off = GET_REG_OFFSET(hwdata->conf);
u32 shift = GET_SHIFT(hwdata->conf);
const u32 clk_src_266 = 2;
u32 msk, val, bitmask;
struct clk_hw_data *clk_hw_data = to_clk_hw_data(hw);
struct sd_mux_hw_data *sd_mux_hw_data = to_sd_mux_hw_data(clk_hw_data);
struct rzg2l_cpg_priv *priv = clk_hw_data->priv;
u32 off = GET_REG_OFFSET(clk_hw_data->conf);
u32 shift = GET_SHIFT(clk_hw_data->conf);
unsigned long flags;
u32 val;
int ret;
/*
* As per the HW manual, we should not directly switch from 533 MHz to
* 400 MHz and vice versa. To change the setting from 2’b01 (533 MHz)
* to 2’b10 (400 MHz) or vice versa, Switch to 2’b11 (266 MHz) first,
* and then switch to the target setting (2’b01 (533 MHz) or 2’b10
* (400 MHz)).
* Setting a value of '0' to the SEL_SDHI0_SET or SEL_SDHI1_SET clock
* switching register is prohibited.
* The clock mux has 3 input clocks(533 MHz, 400 MHz, and 266 MHz), and
* the index to value mapping is done by adding 1 to the index.
*/
bitmask = (GENMASK(GET_WIDTH(hwdata->conf) - 1, 0) << shift) << 16;
msk = off ? CPG_CLKSTATUS_SELSDHI1_STS : CPG_CLKSTATUS_SELSDHI0_STS;
val = clk_mux_index_to_val(sd_mux_hw_data->mtable, CLK_MUX_ROUND_CLOSEST, index);
spin_lock_irqsave(&priv->rmw_lock, flags);
if (index != clk_src_266) {
writel(bitmask | ((clk_src_266 + 1) << shift), priv->base + off);
ret = readl_poll_timeout_atomic(priv->base + CPG_CLKSTATUS, val,
!(val & msk), 10,
CPG_SDHI_CLK_SWITCH_STATUS_TIMEOUT_US);
if (ret)
goto unlock;
}
writel((CPG_WEN_BIT | val) << shift, priv->base + off);
writel(bitmask | ((index + 1) << shift), priv->base + off);
/* Wait for the update done. */
ret = rzg2l_cpg_wait_clk_update_done(priv->base, clk_hw_data->sconf);
ret = readl_poll_timeout_atomic(priv->base + CPG_CLKSTATUS, val,
!(val & msk), 10,
CPG_SDHI_CLK_SWITCH_STATUS_TIMEOUT_US);
unlock:
spin_unlock_irqrestore(&priv->rmw_lock, flags);
if (ret)
dev_err(priv->dev, "failed to switch clk source\n");
dev_err(priv->dev, "Failed to switch parent\n");
return ret;
}
static u8 rzg2l_cpg_sd_clk_mux_get_parent(struct clk_hw *hw)
{
struct sd_hw_data *hwdata = to_sd_hw_data(hw);
struct rzg2l_cpg_priv *priv = hwdata->priv;
u32 val = readl(priv->base + GET_REG_OFFSET(hwdata->conf));
struct clk_hw_data *clk_hw_data = to_clk_hw_data(hw);
struct sd_mux_hw_data *sd_mux_hw_data = to_sd_mux_hw_data(clk_hw_data);
struct rzg2l_cpg_priv *priv = clk_hw_data->priv;
u32 val;
val >>= GET_SHIFT(hwdata->conf);
val &= GENMASK(GET_WIDTH(hwdata->conf) - 1, 0);
val = readl(priv->base + GET_REG_OFFSET(clk_hw_data->conf));
val >>= GET_SHIFT(clk_hw_data->conf);
val &= GENMASK(GET_WIDTH(clk_hw_data->conf) - 1, 0);
return val ? val - 1 : 0;
return clk_mux_val_to_index(hw, sd_mux_hw_data->mtable, CLK_MUX_ROUND_CLOSEST, val);
}
static const struct clk_ops rzg2l_cpg_sd_clk_mux_ops = {
@@ -257,31 +330,40 @@ rzg2l_cpg_sd_mux_clk_register(const struct cpg_core_clk *core,
void __iomem *base,
struct rzg2l_cpg_priv *priv)
{
struct sd_hw_data *clk_hw_data;
struct sd_mux_hw_data *sd_mux_hw_data;
struct clk_init_data init;
struct clk_hw *clk_hw;
int ret;
clk_hw_data = devm_kzalloc(priv->dev, sizeof(*clk_hw_data), GFP_KERNEL);
if (!clk_hw_data)
sd_mux_hw_data = devm_kzalloc(priv->dev, sizeof(*sd_mux_hw_data), GFP_KERNEL);
if (!sd_mux_hw_data)
return ERR_PTR(-ENOMEM);
clk_hw_data->priv = priv;
clk_hw_data->conf = core->conf;
sd_mux_hw_data->hw_data.priv = priv;
sd_mux_hw_data->hw_data.conf = core->conf;
sd_mux_hw_data->hw_data.sconf = core->sconf;
sd_mux_hw_data->mtable = core->mtable;
init.name = GET_SHIFT(core->conf) ? "sd1" : "sd0";
init.ops = &rzg2l_cpg_sd_clk_mux_ops;
init.flags = 0;
init.flags = core->flag;
init.num_parents = core->num_parents;
init.parent_names = core->parent_names;
clk_hw = &clk_hw_data->hw;
clk_hw = &sd_mux_hw_data->hw_data.hw;
clk_hw->init = &init;
ret = devm_clk_hw_register(priv->dev, clk_hw);
if (ret)
return ERR_PTR(ret);
ret = rzg2l_register_notifier(clk_hw, core, priv);
if (ret) {
dev_err(priv->dev, "Failed to register notifier for %s\n",
core->name);
return ERR_PTR(ret);
}
return clk_hw->clk;
}

24
drivers/clk/renesas/rzg2l-cpg.h
View File

@@ -9,6 +9,8 @@
#ifndef __RENESAS_RZG2L_CPG_H__
#define __RENESAS_RZG2L_CPG_H__
#include <linux/notifier.h>
#define CPG_SIPLL5_STBY (0x140)
#define CPG_SIPLL5_CLK1 (0x144)
#define CPG_SIPLL5_CLK3 (0x14C)
@@ -19,7 +21,6 @@
#define CPG_PL2_DDIV (0x204)
#define CPG_PL3A_DDIV (0x208)
#define CPG_PL6_DDIV (0x210)
#define CPG_PL2SDHI_DSEL (0x218)
#define CPG_CLKSTATUS (0x280)
#define CPG_PL3_SSEL (0x408)
#define CPG_PL6_SSEL (0x414)
@@ -43,8 +44,6 @@
#define CPG_CLKSTATUS_SELSDHI0_STS BIT(28)
#define CPG_CLKSTATUS_SELSDHI1_STS BIT(29)
#define CPG_SDHI_CLK_SWITCH_STATUS_TIMEOUT_US 200
/* n = 0/1/2 for PLL1/4/6 */
#define CPG_SAMPLL_CLK1(n) (0x04 + (16 * n))
#define CPG_SAMPLL_CLK2(n) (0x08 + (16 * n))
@@ -69,9 +68,6 @@
#define SEL_PLL6_2 SEL_PLL_PACK(CPG_PL6_ETH_SSEL, 0, 1)
#define SEL_GPU2 SEL_PLL_PACK(CPG_PL6_SSEL, 12, 1)
#define SEL_SDHI0 DDIV_PACK(CPG_PL2SDHI_DSEL, 0, 2)
#define SEL_SDHI1 DDIV_PACK(CPG_PL2SDHI_DSEL, 4, 2)
#define EXTAL_FREQ_IN_MEGA_HZ (24)
/**
@@ -90,10 +86,13 @@ struct cpg_core_clk {
unsigned int mult;
unsigned int type;
unsigned int conf;
unsigned int sconf;
const struct clk_div_table *dtable;
const u32 *mtable;
const char * const *parent_names;
int flag;
int mux_flags;
notifier_fn_t notifier;
u32 flag;
u32 mux_flags;
int num_parents;
};
@@ -151,10 +150,11 @@ enum clk_types {
.parent_names = _parent_names, \
.num_parents = ARRAY_SIZE(_parent_names), \
.mux_flags = CLK_MUX_READ_ONLY)
#define DEF_SD_MUX(_name, _id, _conf, _parent_names) \
DEF_TYPE(_name, _id, CLK_TYPE_SD_MUX, .conf = _conf, \
#define DEF_SD_MUX(_name, _id, _conf, _sconf, _parent_names, _mtable, _clk_flags, _notifier) \
DEF_TYPE(_name, _id, CLK_TYPE_SD_MUX, .conf = _conf, .sconf = _sconf, \
.parent_names = _parent_names, \
.num_parents = ARRAY_SIZE(_parent_names))
.num_parents = ARRAY_SIZE(_parent_names), \
.mtable = _mtable, .flag = _clk_flags, .notifier = _notifier)
#define DEF_PLL5_FOUTPOSTDIV(_name, _id, _parent) \
DEF_TYPE(_name, _id, CLK_TYPE_SIPLL5, .parent = _parent)
#define DEF_PLL5_4_MUX(_name, _id, _conf, _parent_names) \
@@ -269,4 +269,6 @@ extern const struct rzg2l_cpg_info r9a07g044_cpg_info;
extern const struct rzg2l_cpg_info r9a07g054_cpg_info;
extern const struct rzg2l_cpg_info r9a09g011_cpg_info;
int rzg2l_cpg_sd_clk_mux_notifier(struct notifier_block *nb, unsigned long event, void *data);
#endif

4
drivers/clocksource/timer-stm32-lp.c
View File

@@ -168,9 +168,7 @@ static int stm32_clkevent_lp_probe(struct platform_device *pdev)
}
if (of_property_read_bool(pdev->dev.parent->of_node, "wakeup-source")) {
ret = device_init_wakeup(&pdev->dev, true);
if (ret)
goto out_clk_disable;
device_set_wakeup_capable(&pdev->dev, true);
ret = dev_pm_set_wake_irq(&pdev->dev, irq);
if (ret)

15
drivers/comedi/drivers/jr3_pci.c
View File

@@ -87,6 +87,7 @@ struct jr3_pci_poll_delay {
struct jr3_pci_dev_private {
struct timer_list timer;
struct comedi_device *dev;
bool timer_enable;
};
union jr3_pci_single_range {
@@ -596,10 +597,11 @@ static void jr3_pci_poll_dev(struct timer_list *t)
delay = sub_delay.max;
}
}
if (devpriv->timer_enable) {
devpriv->timer.expires = jiffies + msecs_to_jiffies(delay);
add_timer(&devpriv->timer);
}
spin_unlock_irqrestore(&dev->spinlock, flags);
devpriv->timer.expires = jiffies + msecs_to_jiffies(delay);
add_timer(&devpriv->timer);
}
static struct jr3_pci_subdev_private *
@@ -748,6 +750,7 @@ static int jr3_pci_auto_attach(struct comedi_device *dev,
devpriv->dev = dev;
timer_setup(&devpriv->timer, jr3_pci_poll_dev, 0);
devpriv->timer.expires = jiffies + msecs_to_jiffies(1000);
devpriv->timer_enable = true;
add_timer(&devpriv->timer);
return 0;
@@ -757,8 +760,12 @@ static void jr3_pci_detach(struct comedi_device *dev)
{
struct jr3_pci_dev_private *devpriv = dev->private;
if (devpriv)
if (devpriv) {
spin_lock_bh(&dev->spinlock);
devpriv->timer_enable = false;
spin_unlock_bh(&dev->spinlock);
del_timer_sync(&devpriv->timer);
}
comedi_pci_detach(dev);
}

2
drivers/cpufreq/cppc_cpufreq.c
View File

@@ -749,7 +749,7 @@ static unsigned int cppc_cpufreq_get_rate(unsigned int cpu)
int ret;
if (!policy)
return -ENODEV;
return 0;
cpu_data = policy->driver_data;

8
drivers/cpufreq/cpufreq.c
View File

@@ -2698,10 +2698,18 @@ EXPORT_SYMBOL(cpufreq_update_policy);
*/
void cpufreq_update_limits(unsigned int cpu)
{
struct cpufreq_policy *policy;
policy = cpufreq_cpu_get(cpu);
if (!policy)
return;
if (cpufreq_driver->update_limits)
cpufreq_driver->update_limits(cpu);
else
cpufreq_update_policy(cpu);
cpufreq_cpu_put(policy);
}
EXPORT_SYMBOL_GPL(cpufreq_update_limits);

10
drivers/cpufreq/scmi-cpufreq.c
View File

@@ -33,11 +33,17 @@ static const struct scmi_perf_proto_ops *perf_ops;
static unsigned int scmi_cpufreq_get_rate(unsigned int cpu)
{
struct cpufreq_policy *policy = cpufreq_cpu_get_raw(cpu);
struct scmi_data *priv = policy->driver_data;
struct cpufreq_policy *policy;
struct scmi_data *priv;
unsigned long rate;
int ret;
policy = cpufreq_cpu_get_raw(cpu);
if (unlikely(!policy))
return 0;
priv = policy->driver_data;
ret = perf_ops->freq_get(ph, priv->domain_id, &rate, false);
if (ret)
return 0;

13
drivers/cpufreq/scpi-cpufreq.c
View File

@@ -29,9 +29,16 @@ static struct scpi_ops *scpi_ops;
static unsigned int scpi_cpufreq_get_rate(unsigned int cpu)
{
struct cpufreq_policy *policy = cpufreq_cpu_get_raw(cpu);
struct scpi_data *priv = policy->driver_data;
unsigned long rate = clk_get_rate(priv->clk);
struct cpufreq_policy *policy;
struct scpi_data *priv;
unsigned long rate;
policy = cpufreq_cpu_get_raw(cpu);
if (unlikely(!policy))
return 0;
priv = policy->driver_data;
rate = clk_get_rate(priv->clk);
return rate / 1000;
}

7
drivers/crypto/atmel-sha204a.c
View File

@@ -107,7 +107,12 @@ static int atmel_sha204a_probe(struct i2c_client *client,
i2c_priv->hwrng.name = dev_name(&client->dev);
i2c_priv->hwrng.read = atmel_sha204a_rng_read;
i2c_priv->hwrng.quality = 1024;
/*
* According to review by Bill Cox [1], this HWRNG has very low entropy.
* [1] https://www.metzdowd.com/pipermail/cryptography/2014-December/023858.html
*/
i2c_priv->hwrng.quality = 1;
ret = devm_hwrng_register(&client->dev, &i2c_priv->hwrng);
if (ret)

6
drivers/crypto/caam/qi.c
View File

@@ -115,12 +115,12 @@ int caam_qi_enqueue(struct device *qidev, struct caam_drv_req *req)
qm_fd_addr_set64(&fd, addr);
do {
refcount_inc(&req->drv_ctx->refcnt);
ret = qman_enqueue(req->drv_ctx->req_fq, &fd);
if (likely(!ret)) {
refcount_inc(&req->drv_ctx->refcnt);
if (likely(!ret))
return 0;
}
refcount_dec(&req->drv_ctx->refcnt);
if (ret != -EBUSY)
break;
num_retries++;

15
drivers/crypto/ccp/sp-pci.c
View File

@@ -179,14 +179,17 @@ static bool sp_pci_is_master(struct sp_device *sp)
pdev_new = to_pci_dev(dev_new);
pdev_cur = to_pci_dev(dev_cur);
if (pdev_new->bus->number < pdev_cur->bus->number)
return true;
if (pci_domain_nr(pdev_new->bus) != pci_domain_nr(pdev_cur->bus))
return pci_domain_nr(pdev_new->bus) < pci_domain_nr(pdev_cur->bus);
if (PCI_SLOT(pdev_new->devfn) < PCI_SLOT(pdev_cur->devfn))
return true;
if (pdev_new->bus->number != pdev_cur->bus->number)
return pdev_new->bus->number < pdev_cur->bus->number;
if (PCI_FUNC(pdev_new->devfn) < PCI_FUNC(pdev_cur->devfn))
return true;
if (PCI_SLOT(pdev_new->devfn) != PCI_SLOT(pdev_cur->devfn))
return PCI_SLOT(pdev_new->devfn) < PCI_SLOT(pdev_cur->devfn);
if (PCI_FUNC(pdev_new->devfn) != PCI_FUNC(pdev_cur->devfn))
return PCI_FUNC(pdev_new->devfn) < PCI_FUNC(pdev_cur->devfn);
return false;
}

2
drivers/dma-buf/udmabuf.c
View File

@@ -186,7 +186,7 @@ static long udmabuf_create(struct miscdevice *device,
if (!ubuf)
return -ENOMEM;
pglimit = (size_limit_mb * 1024 * 1024) >> PAGE_SHIFT;
pglimit = ((u64)size_limit_mb * 1024 * 1024) >> PAGE_SHIFT;
for (i = 0; i < head->count; i++) {
if (!IS_ALIGNED(list[i].offset, PAGE_SIZE))
goto err;

6
drivers/dma/dmatest.c
View File

@@ -827,9 +827,9 @@ static int dmatest_func(void *data)
} else {
dma_async_issue_pending(chan);
wait_event_freezable_timeout(thread->done_wait,
done->done,
msecs_to_jiffies(params->timeout));
wait_event_timeout(thread->done_wait,
done->done,
msecs_to_jiffies(params->timeout));
status = dma_async_is_tx_complete(chan, cookie, NULL,
NULL);

9
drivers/edac/altera_edac.c
View File

@@ -98,7 +98,7 @@ static irqreturn_t altr_sdram_mc_err_handler(int irq, void *dev_id)
if (status & priv->ecc_stat_ce_mask) {
regmap_read(drvdata->mc_vbase, priv->ecc_saddr_offset,
&err_addr);
if (priv->ecc_uecnt_offset)
if (priv->ecc_cecnt_offset)
regmap_read(drvdata->mc_vbase, priv->ecc_cecnt_offset,
&err_count);
edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, err_count,
@@ -1015,9 +1015,6 @@ altr_init_a10_ecc_block(struct device_node *np, u32 irq_mask,
}
}
/* Interrupt mode set to every SBERR */
regmap_write(ecc_mgr_map, ALTR_A10_ECC_INTMODE_OFST,
ALTR_A10_ECC_INTMODE);
/* Enable ECC */
ecc_set_bits(ecc_ctrl_en_mask, (ecc_block_base +
ALTR_A10_ECC_CTRL_OFST));
@@ -2138,6 +2135,10 @@ static int altr_edac_a10_probe(struct platform_device *pdev)
return PTR_ERR(edac->ecc_mgr_map);
}
/* Set irq mask for DDR SBE to avoid any pending irq before registration */
regmap_write(edac->ecc_mgr_map, A10_SYSMGR_ECC_INTMASK_SET_OFST,
(A10_SYSMGR_ECC_INTMASK_SDMMCB | A10_SYSMGR_ECC_INTMASK_DDR0));
edac->irq_chip.name = pdev->dev.of_node->name;
edac->irq_chip.irq_mask = a10_eccmgr_irq_mask;
edac->irq_chip.irq_unmask = a10_eccmgr_irq_unmask;

2
drivers/edac/altera_edac.h
View File

@@ -249,6 +249,8 @@ struct altr_sdram_mc_data {
#define A10_SYSMGR_ECC_INTMASK_SET_OFST 0x94
#define A10_SYSMGR_ECC_INTMASK_CLR_OFST 0x98
#define A10_SYSMGR_ECC_INTMASK_OCRAM BIT(1)
#define A10_SYSMGR_ECC_INTMASK_SDMMCB BIT(16)
#define A10_SYSMGR_ECC_INTMASK_DDR0 BIT(17)
#define A10_SYSMGR_ECC_INTSTAT_SERR_OFST 0x9C
#define A10_SYSMGR_ECC_INTSTAT_DERR_OFST 0xA0

3
drivers/firmware/arm_ffa/driver.c
View File

@@ -225,7 +225,8 @@ __ffa_partition_info_get(u32 uuid0, u32 uuid1, u32 uuid2, u32 uuid3,
memcpy(buffer + idx, drv_info->rx_buffer + idx * sz,
buf_sz);
ffa_rx_release();
if (!(flags & PARTITION_INFO_GET_RETURN_COUNT_ONLY))
ffa_rx_release();
mutex_unlock(&drv_info->rx_lock);

3
drivers/firmware/arm_scmi/bus.c
View File

@@ -73,6 +73,9 @@ struct scmi_device *scmi_child_dev_find(struct device *parent,
if (!dev)
return NULL;
/* Drop the refcnt bumped implicitly by device_find_child */
put_device(dev);
return to_scmi_dev(dev);
}

25
drivers/gpio/gpio-tegra186.c
View File

@@ -753,6 +753,7 @@ static int tegra186_gpio_probe(struct platform_device *pdev)
struct gpio_irq_chip *irq;
struct tegra_gpio *gpio;
struct device_node *np;
struct resource *res;
char **names;
int err;
@@ -772,19 +773,19 @@ static int tegra186_gpio_probe(struct platform_device *pdev)
gpio->num_banks++;
/* get register apertures */
gpio->secure = devm_platform_ioremap_resource_byname(pdev, "security");
if (IS_ERR(gpio->secure)) {
gpio->secure = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(gpio->secure))
return PTR_ERR(gpio->secure);
}
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "security");
if (!res)
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
gpio->secure = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(gpio->secure))
return PTR_ERR(gpio->secure);
gpio->base = devm_platform_ioremap_resource_byname(pdev, "gpio");
if (IS_ERR(gpio->base)) {
gpio->base = devm_platform_ioremap_resource(pdev, 1);
if (IS_ERR(gpio->base))
return PTR_ERR(gpio->base);
}
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "gpio");
if (!res)
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
gpio->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(gpio->base))
return PTR_ERR(gpio->base);
err = platform_irq_count(pdev);
if (err < 0)

1
drivers/gpio/gpio-zynq.c
View File

@@ -1012,6 +1012,7 @@ static int zynq_gpio_remove(struct platform_device *pdev)
ret = pm_runtime_get_sync(&pdev->dev);
if (ret < 0)
dev_warn(&pdev->dev, "pm_runtime_get_sync() Failed\n");
device_init_wakeup(&pdev->dev, 0);
gpiochip_remove(&gpio->chip);
clk_disable_unprepare(gpio->clk);
device_set_wakeup_capable(&pdev->dev, 0);

10
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
View File

@@ -6186,6 +6186,7 @@ struct dma_fence *amdgpu_device_switch_gang(struct amdgpu_device *adev,
{
struct dma_fence *old = NULL;
dma_fence_get(gang);
do {
dma_fence_put(old);
rcu_read_lock();
@@ -6195,12 +6196,19 @@ struct dma_fence *amdgpu_device_switch_gang(struct amdgpu_device *adev,
if (old == gang)
break;
if (!dma_fence_is_signaled(old))
if (!dma_fence_is_signaled(old)) {
dma_fence_put(gang);
return old;
}
} while (cmpxchg((struct dma_fence __force **)&adev->gang_submit,
old, gang) != old);
/*
* Drop it once for the exchanged reference in adev and once for the
* thread local reference acquired in amdgpu_device_get_gang().
*/
dma_fence_put(old);
dma_fence_put(old);
return NULL;
}

2
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
View File

@@ -210,7 +210,7 @@ static void amdgpu_dma_buf_unmap(struct dma_buf_attachment *attach,
struct sg_table *sgt,
enum dma_data_direction dir)
{
if (sgt->sgl->page_link) {
if (sg_page(sgt->sgl)) {
dma_unmap_sgtable(attach->dev, sgt, dir, 0);
sg_free_table(sgt);
kfree(sgt);

44
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
View File

@@ -1662,7 +1662,6 @@ static const u16 amdgpu_unsupported_pciidlist[] = {
};
static const struct pci_device_id pciidlist[] = {
#ifdef CONFIG_DRM_AMDGPU_SI
{0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
{0x1002, 0x6784, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
{0x1002, 0x6788, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
@@ -1735,8 +1734,6 @@ static const struct pci_device_id pciidlist[] = {
{0x1002, 0x6665, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
{0x1002, 0x6667, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
{0x1002, 0x666F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
#endif
#ifdef CONFIG_DRM_AMDGPU_CIK
/* Kaveri */
{0x1002, 0x1304, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
{0x1002, 0x1305, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
@@ -1819,7 +1816,6 @@ static const struct pci_device_id pciidlist[] = {
{0x1002, 0x985D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
{0x1002, 0x985E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
{0x1002, 0x985F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
#endif
/* topaz */
{0x1002, 0x6900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
{0x1002, 0x6901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
@@ -2099,14 +2095,14 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
return -ENOTSUPP;
}
switch (flags & AMD_ASIC_MASK) {
case CHIP_TAHITI:
case CHIP_PITCAIRN:
case CHIP_VERDE:
case CHIP_OLAND:
case CHIP_HAINAN:
#ifdef CONFIG_DRM_AMDGPU_SI
if (!amdgpu_si_support) {
switch (flags & AMD_ASIC_MASK) {
case CHIP_TAHITI:
case CHIP_PITCAIRN:
case CHIP_VERDE:
case CHIP_OLAND:
case CHIP_HAINAN:
if (!amdgpu_si_support) {
dev_info(&pdev->dev,
"SI support provided by radeon.\n");
dev_info(&pdev->dev,
@@ -2114,16 +2110,18 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
);
return -ENODEV;
}
}
break;
#else
dev_info(&pdev->dev, "amdgpu is built without SI support.\n");
return -ENODEV;
#endif
case CHIP_KAVERI:
case CHIP_BONAIRE:
case CHIP_HAWAII:
case CHIP_KABINI:
case CHIP_MULLINS:
#ifdef CONFIG_DRM_AMDGPU_CIK
if (!amdgpu_cik_support) {
switch (flags & AMD_ASIC_MASK) {
case CHIP_KAVERI:
case CHIP_BONAIRE:
case CHIP_HAWAII:
case CHIP_KABINI:
case CHIP_MULLINS:
if (!amdgpu_cik_support) {
dev_info(&pdev->dev,
"CIK support provided by radeon.\n");
dev_info(&pdev->dev,
@@ -2131,8 +2129,14 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
);
return -ENODEV;
}
}
break;
#else
dev_info(&pdev->dev, "amdgpu is built without CIK support.\n");
return -ENODEV;
#endif
default:
break;
}
adev = devm_drm_dev_alloc(&pdev->dev, &amdgpu_kms_driver, typeof(*adev), ddev);
if (IS_ERR(adev))

10
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
View File

@@ -208,6 +208,11 @@ static int set_queue_properties_from_user(struct queue_properties *q_properties,
return -EINVAL;
}
if (args->ring_size < KFD_MIN_QUEUE_RING_SIZE) {
args->ring_size = KFD_MIN_QUEUE_RING_SIZE;
pr_debug("Size lower. clamped to KFD_MIN_QUEUE_RING_SIZE");
}
if (!access_ok((const void __user *) args->read_pointer_address,
sizeof(uint32_t))) {
pr_err("Can't access read pointer\n");
@@ -464,6 +469,11 @@ static int kfd_ioctl_update_queue(struct file *filp, struct kfd_process *p,
return -EINVAL;
}
if (args->ring_size < KFD_MIN_QUEUE_RING_SIZE) {
args->ring_size = KFD_MIN_QUEUE_RING_SIZE;
pr_debug("Size lower. clamped to KFD_MIN_QUEUE_RING_SIZE");
}
properties.queue_address = args->ring_base_address;
properties.queue_size = args->ring_size;
properties.queue_percent = args->queue_percentage;

17
drivers/gpu/drm/amd/amdkfd/kfd_process.c
View File

@@ -36,6 +36,7 @@
#include <linux/pm_runtime.h>
#include "amdgpu_amdkfd.h"
#include "amdgpu.h"
#include "amdgpu_reset.h"
struct mm_struct;
@@ -1114,6 +1115,17 @@ static void kfd_process_remove_sysfs(struct kfd_process *p)
p->kobj = NULL;
}
/*
* If any GPU is ongoing reset, wait for reset complete.
*/
static void kfd_process_wait_gpu_reset_complete(struct kfd_process *p)
{
int i;
for (i = 0; i < p->n_pdds; i++)
flush_workqueue(p->pdds[i]->dev->adev->reset_domain->wq);
}
/* No process locking is needed in this function, because the process
* is not findable any more. We must assume that no other thread is
* using it any more, otherwise we couldn't safely free the process
@@ -1127,6 +1139,11 @@ static void kfd_process_wq_release(struct work_struct *work)
kfd_process_dequeue_from_all_devices(p);
pqm_uninit(&p->pqm);
/*
* If GPU in reset, user queues may still running, wait for reset complete.
*/
kfd_process_wait_gpu_reset_complete(p);
/* Signal the eviction fence after user mode queues are
* destroyed. This allows any BOs to be freed without
* triggering pointless evictions or waiting for fences.

2
drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
View File

@@ -429,7 +429,7 @@ int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid)
pr_err("Pasid 0x%x destroy queue %d failed, ret %d\n",
pqm->process->pasid,
pqn->q->properties.queue_id, retval);
if (retval != -ETIME)
if (retval != -ETIME && retval != -EIO)
goto err_destroy_queue;
}

23
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
View File

@@ -2795,16 +2795,16 @@ static void dm_gpureset_commit_state(struct dc_state *dc_state,
for (k = 0; k < dc_state->stream_count; k++) {
bundle->stream_update.stream = dc_state->streams[k];
for (m = 0; m < dc_state->stream_status->plane_count; m++) {
for (m = 0; m < dc_state->stream_status[k].plane_count; m++) {
bundle->surface_updates[m].surface =
dc_state->stream_status->plane_states[m];
dc_state->stream_status[k].plane_states[m];
bundle->surface_updates[m].surface->force_full_update =
true;
}
update_planes_and_stream_adapter(dm->dc,
UPDATE_TYPE_FULL,
dc_state->stream_status->plane_count,
dc_state->stream_status[k].plane_count,
dc_state->streams[k],
&bundle->stream_update,
bundle->surface_updates);
@@ -4499,17 +4499,17 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
}
}
if (link_cnt > (MAX_PIPES * 2)) {
DRM_ERROR(
"KMS: Cannot support more than %d display indexes\n",
MAX_PIPES * 2);
goto fail;
}
/* loops over all connectors on the board */
for (i = 0; i < link_cnt; i++) {
struct dc_link *link = NULL;
if (i > AMDGPU_DM_MAX_DISPLAY_INDEX) {
DRM_ERROR(
"KMS: Cannot support more than %d display indexes\n",
AMDGPU_DM_MAX_DISPLAY_INDEX);
continue;
}
aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
if (!aconnector)
goto fail;
@@ -9358,6 +9358,9 @@ static bool should_reset_plane(struct drm_atomic_state *state,
if (adev->ip_versions[DCE_HWIP][0] < IP_VERSION(3, 2, 0) && state->allow_modeset)
return true;
if (amdgpu_in_reset(adev) && state->allow_modeset)
return true;
/* Exit early if we know that we're adding or removing the plane. */
if (old_plane_state->crtc != new_plane_state->crtc)
return true;

417
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
View File

@@ -39,10 +39,10 @@
static bool
lp_write_i2c(void *handle, uint32_t address, const uint8_t *data, uint32_t size)
{
struct dc_link *link = handle;
struct i2c_payload i2c_payloads[] = {{true, address, size, (void *)data} };
struct i2c_command cmd = {i2c_payloads, 1, I2C_COMMAND_ENGINE_HW, link->dc->caps.i2c_speed_in_khz};
struct i2c_command cmd = {i2c_payloads, 1, I2C_COMMAND_ENGINE_HW,
link->dc->caps.i2c_speed_in_khz};
return dm_helpers_submit_i2c(link->ctx, link, &cmd);
}
@@ -52,8 +52,10 @@ lp_read_i2c(void *handle, uint32_t address, uint8_t offset, uint8_t *data, uint3
{
struct dc_link *link = handle;
struct i2c_payload i2c_payloads[] = {{true, address, 1, &offset}, {false, address, size, data} };
struct i2c_command cmd = {i2c_payloads, 2, I2C_COMMAND_ENGINE_HW, link->dc->caps.i2c_speed_in_khz};
struct i2c_payload i2c_payloads[] = {{true, address, 1, &offset},
{false, address, size, data} };
struct i2c_command cmd = {i2c_payloads, 2, I2C_COMMAND_ENGINE_HW,
link->dc->caps.i2c_speed_in_khz};
return dm_helpers_submit_i2c(link->ctx, link, &cmd);
}
@@ -76,7 +78,6 @@ lp_read_dpcd(void *handle, uint32_t address, uint8_t *data, uint32_t size)
static uint8_t *psp_get_srm(struct psp_context *psp, uint32_t *srm_version, uint32_t *srm_size)
{
struct ta_hdcp_shared_memory *hdcp_cmd;
if (!psp->hdcp_context.context.initialized) {
@@ -96,13 +97,12 @@ static uint8_t *psp_get_srm(struct psp_context *psp, uint32_t *srm_version, uint
*srm_version = hdcp_cmd->out_msg.hdcp_get_srm.srm_version;
*srm_size = hdcp_cmd->out_msg.hdcp_get_srm.srm_buf_size;
return hdcp_cmd->out_msg.hdcp_get_srm.srm_buf;
}
static int psp_set_srm(struct psp_context *psp, uint8_t *srm, uint32_t srm_size, uint32_t *srm_version)
static int psp_set_srm(struct psp_context *psp,
u8 *srm, uint32_t srm_size, uint32_t *srm_version)
{
struct ta_hdcp_shared_memory *hdcp_cmd;
if (!psp->hdcp_context.context.initialized) {
@@ -119,7 +119,8 @@ static int psp_set_srm(struct psp_context *psp, uint8_t *srm, uint32_t srm_size,
psp_hdcp_invoke(psp, hdcp_cmd->cmd_id);
if (hdcp_cmd->hdcp_status != TA_HDCP_STATUS__SUCCESS || hdcp_cmd->out_msg.hdcp_set_srm.valid_signature != 1 ||
if (hdcp_cmd->hdcp_status != TA_HDCP_STATUS__SUCCESS ||
hdcp_cmd->out_msg.hdcp_set_srm.valid_signature != 1 ||
hdcp_cmd->out_msg.hdcp_set_srm.srm_version == PSP_SRM_VERSION_MAX)
return -EINVAL;
@@ -150,7 +151,6 @@ static void process_output(struct hdcp_workqueue *hdcp_work)
static void link_lock(struct hdcp_workqueue *work, bool lock)
{
int i = 0;
for (i = 0; i < work->max_link; i++) {
@@ -160,72 +160,69 @@ static void link_lock(struct hdcp_workqueue *work, bool lock)
mutex_unlock(&work[i].mutex);
}
}
void hdcp_update_display(struct hdcp_workqueue *hdcp_work,
unsigned int link_index,
struct amdgpu_dm_connector *aconnector,
uint8_t content_type,
u8 content_type,
bool enable_encryption)
{
struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
struct mod_hdcp_display *display = &hdcp_work[link_index].display;
struct mod_hdcp_link *link = &hdcp_work[link_index].link;
struct mod_hdcp_display_query query;
struct mod_hdcp_link_adjustment link_adjust;
struct mod_hdcp_display_adjustment display_adjust;
unsigned int conn_index = aconnector->base.index;
mutex_lock(&hdcp_w->mutex);
hdcp_w->aconnector = aconnector;
guard(mutex)(&hdcp_w->mutex);
drm_connector_get(&aconnector->base);
if (hdcp_w->aconnector[conn_index])
drm_connector_put(&hdcp_w->aconnector[conn_index]->base);
hdcp_w->aconnector[conn_index] = aconnector;
query.display = NULL;
mod_hdcp_query_display(&hdcp_w->hdcp, aconnector->base.index, &query);
memset(&link_adjust, 0, sizeof(link_adjust));
memset(&display_adjust, 0, sizeof(display_adjust));
if (query.display != NULL) {
memcpy(display, query.display, sizeof(struct mod_hdcp_display));
mod_hdcp_remove_display(&hdcp_w->hdcp, aconnector->base.index, &hdcp_w->output);
if (enable_encryption) {
/* Explicitly set the saved SRM as sysfs call will be after we already enabled hdcp
* (s3 resume case)
*/
if (hdcp_work->srm_size > 0)
psp_set_srm(hdcp_work->hdcp.config.psp.handle, hdcp_work->srm,
hdcp_work->srm_size,
&hdcp_work->srm_version);
hdcp_w->link.adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_0;
display_adjust.disable = MOD_HDCP_DISPLAY_NOT_DISABLE;
if (enable_encryption) {
/* Explicitly set the saved SRM as sysfs call will be after we already enabled hdcp
* (s3 resume case)
*/
if (hdcp_work->srm_size > 0)
psp_set_srm(hdcp_work->hdcp.config.psp.handle, hdcp_work->srm, hdcp_work->srm_size,
&hdcp_work->srm_version);
link_adjust.auth_delay = 2;
display->adjust.disable = MOD_HDCP_DISPLAY_NOT_DISABLE;
if (content_type == DRM_MODE_HDCP_CONTENT_TYPE0) {
hdcp_w->link.adjust.hdcp1.disable = 0;
hdcp_w->link.adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_0;
} else if (content_type == DRM_MODE_HDCP_CONTENT_TYPE1) {
hdcp_w->link.adjust.hdcp1.disable = 1;
hdcp_w->link.adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_1;
}
schedule_delayed_work(&hdcp_w->property_validate_dwork,
msecs_to_jiffies(DRM_HDCP_CHECK_PERIOD_MS));
} else {
display->adjust.disable = MOD_HDCP_DISPLAY_DISABLE_AUTHENTICATION;
hdcp_w->encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
cancel_delayed_work(&hdcp_w->property_validate_dwork);
if (content_type == DRM_MODE_HDCP_CONTENT_TYPE0) {
link_adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_0;
} else if (content_type == DRM_MODE_HDCP_CONTENT_TYPE1) {
link_adjust.hdcp1.disable = 1;
link_adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_1;
}
display->state = MOD_HDCP_DISPLAY_ACTIVE;
schedule_delayed_work(&hdcp_w->property_validate_dwork,
msecs_to_jiffies(DRM_HDCP_CHECK_PERIOD_MS));
} else {
display_adjust.disable = MOD_HDCP_DISPLAY_DISABLE_AUTHENTICATION;
hdcp_w->encryption_status[conn_index] = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
cancel_delayed_work(&hdcp_w->property_validate_dwork);
}
mod_hdcp_add_display(&hdcp_w->hdcp, link, display, &hdcp_w->output);
mod_hdcp_update_display(&hdcp_w->hdcp, conn_index, &link_adjust, &display_adjust, &hdcp_w->output);
process_output(hdcp_w);
mutex_unlock(&hdcp_w->mutex);
}
static void hdcp_remove_display(struct hdcp_workqueue *hdcp_work,
unsigned int link_index,
unsigned int link_index,
struct amdgpu_dm_connector *aconnector)
{
struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
struct drm_connector_state *conn_state = aconnector->base.state;
unsigned int conn_index = aconnector->base.index;
mutex_lock(&hdcp_w->mutex);
hdcp_w->aconnector = aconnector;
guard(mutex)(&hdcp_w->mutex);
/* the removal of display will invoke auth reset -> hdcp destroy and
* we'd expect the Content Protection (CP) property changed back to
@@ -236,28 +233,39 @@ static void hdcp_remove_display(struct hdcp_workqueue *hdcp_work,
conn_state->content_protection = DRM_MODE_CONTENT_PROTECTION_DESIRED;
DRM_DEBUG_DRIVER("[HDCP_DM] display %d, CP 2 -> 1, type %u, DPMS %u\n",
aconnector->base.index, conn_state->hdcp_content_type, aconnector->base.dpms);
aconnector->base.index, conn_state->hdcp_content_type,
aconnector->base.dpms);
}
mod_hdcp_remove_display(&hdcp_w->hdcp, aconnector->base.index, &hdcp_w->output);
if (hdcp_w->aconnector[conn_index]) {
drm_connector_put(&hdcp_w->aconnector[conn_index]->base);
hdcp_w->aconnector[conn_index] = NULL;
}
process_output(hdcp_w);
mutex_unlock(&hdcp_w->mutex);
}
void hdcp_reset_display(struct hdcp_workqueue *hdcp_work, unsigned int link_index)
{
struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
unsigned int conn_index;
mutex_lock(&hdcp_w->mutex);
guard(mutex)(&hdcp_w->mutex);
mod_hdcp_reset_connection(&hdcp_w->hdcp, &hdcp_w->output);
cancel_delayed_work(&hdcp_w->property_validate_dwork);
hdcp_w->encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_INDEX; conn_index++) {
hdcp_w->encryption_status[conn_index] =
MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
if (hdcp_w->aconnector[conn_index]) {
drm_connector_put(&hdcp_w->aconnector[conn_index]->base);
hdcp_w->aconnector[conn_index] = NULL;
}
}
process_output(hdcp_w);
mutex_unlock(&hdcp_w->mutex);
}
void hdcp_handle_cpirq(struct hdcp_workqueue *hdcp_work, unsigned int link_index)
@@ -267,17 +275,14 @@ void hdcp_handle_cpirq(struct hdcp_workqueue *hdcp_work, unsigned int link_index
schedule_work(&hdcp_w->cpirq_work);
}
static void event_callback(struct work_struct *work)
{
struct hdcp_workqueue *hdcp_work;
hdcp_work = container_of(to_delayed_work(work), struct hdcp_workqueue,
callback_dwork);
callback_dwork);
mutex_lock(&hdcp_work->mutex);
guard(mutex)(&hdcp_work->mutex);
cancel_delayed_work(&hdcp_work->callback_dwork);
@@ -285,54 +290,79 @@ static void event_callback(struct work_struct *work)
&hdcp_work->output);
process_output(hdcp_work);
mutex_unlock(&hdcp_work->mutex);
}
static void event_property_update(struct work_struct *work)
{
struct hdcp_workqueue *hdcp_work = container_of(work, struct hdcp_workqueue, property_update_work);
struct amdgpu_dm_connector *aconnector = hdcp_work->aconnector;
struct drm_device *dev = hdcp_work->aconnector->base.dev;
struct hdcp_workqueue *hdcp_work = container_of(work, struct hdcp_workqueue,
property_update_work);
struct amdgpu_dm_connector *aconnector = NULL;
struct drm_device *dev;
long ret;
unsigned int conn_index;
struct drm_connector *connector;
struct drm_connector_state *conn_state;
drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
mutex_lock(&hdcp_work->mutex);
for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_INDEX; conn_index++) {
aconnector = hdcp_work->aconnector[conn_index];
if (!aconnector)
continue;
if (aconnector->base.state && aconnector->base.state->commit) {
ret = wait_for_completion_interruptible_timeout(&aconnector->base.state->commit->hw_done, 10 * HZ);
if (!aconnector->base.index)
continue;
if (ret == 0) {
DRM_ERROR("HDCP state unknown! Setting it to DESIRED");
hdcp_work->encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
connector = &aconnector->base;
/* check if display connected */
if (connector->status != connector_status_connected)
continue;
conn_state = aconnector->base.state;
if (!conn_state)
continue;
dev = connector->dev;
if (!dev)
continue;
drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
guard(mutex)(&hdcp_work->mutex);
if (conn_state->commit) {
ret = wait_for_completion_interruptible_timeout(&conn_state->commit->hw_done,
10 * HZ);
if (ret == 0) {
DRM_ERROR("HDCP state unknown! Setting it to DESIRED\n");
hdcp_work->encryption_status[conn_index] =
MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
}
}
}
if (aconnector->base.state) {
if (hdcp_work->encryption_status != MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF) {
if (aconnector->base.state->hdcp_content_type ==
if (hdcp_work->encryption_status[conn_index] !=
MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF) {
if (conn_state->hdcp_content_type ==
DRM_MODE_HDCP_CONTENT_TYPE0 &&
hdcp_work->encryption_status <=
MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE0_ON)
drm_hdcp_update_content_protection(&aconnector->base,
DRM_MODE_CONTENT_PROTECTION_ENABLED);
else if (aconnector->base.state->hdcp_content_type ==
hdcp_work->encryption_status[conn_index] <=
MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE0_ON) {
DRM_DEBUG_DRIVER("[HDCP_DM] DRM_MODE_CONTENT_PROTECTION_ENABLED\n");
drm_hdcp_update_content_protection(connector,
DRM_MODE_CONTENT_PROTECTION_ENABLED);
} else if (conn_state->hdcp_content_type ==
DRM_MODE_HDCP_CONTENT_TYPE1 &&
hdcp_work->encryption_status ==
MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE1_ON)
drm_hdcp_update_content_protection(&aconnector->base,
DRM_MODE_CONTENT_PROTECTION_ENABLED);
hdcp_work->encryption_status[conn_index] ==
MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE1_ON) {
drm_hdcp_update_content_protection(connector,
DRM_MODE_CONTENT_PROTECTION_ENABLED);
}
} else {
drm_hdcp_update_content_protection(&aconnector->base,
DRM_MODE_CONTENT_PROTECTION_DESIRED);
DRM_DEBUG_DRIVER("[HDCP_DM] DRM_MODE_CONTENT_PROTECTION_DESIRED\n");
drm_hdcp_update_content_protection(connector,
DRM_MODE_CONTENT_PROTECTION_DESIRED);
}
drm_modeset_unlock(&dev->mode_config.connection_mutex);
}
mutex_unlock(&hdcp_work->mutex);
drm_modeset_unlock(&dev->mode_config.connection_mutex);
}
static void event_property_validate(struct work_struct *work)
@@ -340,22 +370,53 @@ static void event_property_validate(struct work_struct *work)
struct hdcp_workqueue *hdcp_work =
container_of(to_delayed_work(work), struct hdcp_workqueue, property_validate_dwork);
struct mod_hdcp_display_query query;
struct amdgpu_dm_connector *aconnector = hdcp_work->aconnector;
struct amdgpu_dm_connector *aconnector;
unsigned int conn_index;
if (!aconnector)
return;
guard(mutex)(&hdcp_work->mutex);
mutex_lock(&hdcp_work->mutex);
for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_INDEX;
conn_index++) {
aconnector = hdcp_work->aconnector[conn_index];
query.encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
mod_hdcp_query_display(&hdcp_work->hdcp, aconnector->base.index, &query);
if (query.encryption_status != hdcp_work->encryption_status) {
hdcp_work->encryption_status = query.encryption_status;
schedule_work(&hdcp_work->property_update_work);
if (!aconnector)
continue;
if (!aconnector->base.index)
continue;
/* check if display connected */
if (aconnector->base.status != connector_status_connected)
continue;
if (!aconnector->base.state)
continue;
query.encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
mod_hdcp_query_display(&hdcp_work->hdcp, aconnector->base.index,
&query);
DRM_DEBUG_DRIVER("[HDCP_DM] disp %d, connector->CP %u, (query, work): (%d, %d)\n",
aconnector->base.index,
aconnector->base.state->content_protection,
query.encryption_status,
hdcp_work->encryption_status[conn_index]);
if (query.encryption_status !=
hdcp_work->encryption_status[conn_index]) {
DRM_DEBUG_DRIVER("[HDCP_DM] encryption_status change from %x to %x\n",
hdcp_work->encryption_status[conn_index],
query.encryption_status);
hdcp_work->encryption_status[conn_index] =
query.encryption_status;
DRM_DEBUG_DRIVER("[HDCP_DM] trigger property_update_work\n");
schedule_work(&hdcp_work->property_update_work);
}
}
mutex_unlock(&hdcp_work->mutex);
}
static void event_watchdog_timer(struct work_struct *work)
@@ -363,10 +424,10 @@ static void event_watchdog_timer(struct work_struct *work)
struct hdcp_workqueue *hdcp_work;
hdcp_work = container_of(to_delayed_work(work),
struct hdcp_workqueue,
struct hdcp_workqueue,
watchdog_timer_dwork);
mutex_lock(&hdcp_work->mutex);
guard(mutex)(&hdcp_work->mutex);
cancel_delayed_work(&hdcp_work->watchdog_timer_dwork);
@@ -375,9 +436,6 @@ static void event_watchdog_timer(struct work_struct *work)
&hdcp_work->output);
process_output(hdcp_work);
mutex_unlock(&hdcp_work->mutex);
}
static void event_cpirq(struct work_struct *work)
@@ -386,17 +444,13 @@ static void event_cpirq(struct work_struct *work)
hdcp_work = container_of(work, struct hdcp_workqueue, cpirq_work);
mutex_lock(&hdcp_work->mutex);
guard(mutex)(&hdcp_work->mutex);
mod_hdcp_process_event(&hdcp_work->hdcp, MOD_HDCP_EVENT_CPIRQ, &hdcp_work->output);
process_output(hdcp_work);
mutex_unlock(&hdcp_work->mutex);
}
void hdcp_destroy(struct kobject *kobj, struct hdcp_workqueue *hdcp_work)
{
int i = 0;
@@ -413,10 +467,8 @@ void hdcp_destroy(struct kobject *kobj, struct hdcp_workqueue *hdcp_work)
kfree(hdcp_work);
}
static bool enable_assr(void *handle, struct dc_link *link)
{
struct hdcp_workqueue *hdcp_work = handle;
struct mod_hdcp hdcp = hdcp_work->hdcp;
struct psp_context *psp = hdcp.config.psp.handle;
@@ -430,11 +482,12 @@ static bool enable_assr(void *handle, struct dc_link *link)
dtm_cmd = (struct ta_dtm_shared_memory *)psp->dtm_context.context.mem_context.shared_buf;
mutex_lock(&psp->dtm_context.mutex);
guard(mutex)(&psp->dtm_context.mutex);
memset(dtm_cmd, 0, sizeof(struct ta_dtm_shared_memory));
dtm_cmd->cmd_id = TA_DTM_COMMAND__TOPOLOGY_ASSR_ENABLE;
dtm_cmd->dtm_in_message.topology_assr_enable.display_topology_dig_be_index = link->link_enc_hw_inst;
dtm_cmd->dtm_in_message.topology_assr_enable.display_topology_dig_be_index =
link->link_enc_hw_inst;
dtm_cmd->dtm_status = TA_DTM_STATUS__GENERIC_FAILURE;
psp_dtm_invoke(psp, dtm_cmd->cmd_id);
@@ -444,8 +497,6 @@ static bool enable_assr(void *handle, struct dc_link *link)
res = false;
}
mutex_unlock(&psp->dtm_context.mutex);
return res;
}
@@ -454,9 +505,10 @@ static void update_config(void *handle, struct cp_psp_stream_config *config)
struct hdcp_workqueue *hdcp_work = handle;
struct amdgpu_dm_connector *aconnector = config->dm_stream_ctx;
int link_index = aconnector->dc_link->link_index;
unsigned int conn_index = aconnector->base.index;
struct mod_hdcp_display *display = &hdcp_work[link_index].display;
struct mod_hdcp_link *link = &hdcp_work[link_index].link;
struct drm_connector_state *conn_state;
struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
struct dc_sink *sink = NULL;
bool link_is_hdcp14 = false;
@@ -476,7 +528,7 @@ static void update_config(void *handle, struct cp_psp_stream_config *config)
else if (aconnector->dc_em_sink)
sink = aconnector->dc_em_sink;
if (sink != NULL)
if (sink)
link->mode = mod_hdcp_signal_type_to_operation_mode(sink->sink_signal);
display->controller = CONTROLLER_ID_D0 + config->otg_inst;
@@ -498,19 +550,28 @@ static void update_config(void *handle, struct cp_psp_stream_config *config)
display->adjust.disable = MOD_HDCP_DISPLAY_DISABLE_AUTHENTICATION;
link->adjust.auth_delay = 3;
link->adjust.hdcp1.disable = 0;
conn_state = aconnector->base.state;
hdcp_w->encryption_status[display->index] = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
DRM_DEBUG_DRIVER("[HDCP_DM] display %d, CP %d, type %d\n", aconnector->base.index,
(!!aconnector->base.state) ? aconnector->base.state->content_protection : -1,
(!!aconnector->base.state) ? aconnector->base.state->hdcp_content_type : -1);
(!!aconnector->base.state) ?
aconnector->base.state->content_protection : -1,
(!!aconnector->base.state) ?
aconnector->base.state->hdcp_content_type : -1);
if (conn_state)
hdcp_update_display(hdcp_work, link_index, aconnector,
conn_state->hdcp_content_type, false);
guard(mutex)(&hdcp_w->mutex);
mod_hdcp_add_display(&hdcp_w->hdcp, link, display, &hdcp_w->output);
drm_connector_get(&aconnector->base);
if (hdcp_w->aconnector[conn_index])
drm_connector_put(&hdcp_w->aconnector[conn_index]->base);
hdcp_w->aconnector[conn_index] = aconnector;
process_output(hdcp_w);
}
/* NOTE: From the usermodes prospective you only need to call write *ONCE*, the kernel
/**
* DOC: Add sysfs interface for set/get srm
*
* NOTE: From the usermodes prospective you only need to call write *ONCE*, the kernel
* will automatically call once or twice depending on the size
*
* call: "cat file > /sys/class/drm/card0/device/hdcp_srm" from usermode no matter what the size is
@@ -521,23 +582,23 @@ static void update_config(void *handle, struct cp_psp_stream_config *config)
* sysfs interface doesn't tell us the size we will get so we are sending partial SRMs to psp and on
* the last call we will send the full SRM. PSP will fail on every call before the last.
*
* This means we don't know if the SRM is good until the last call. And because of this limitation we
* cannot throw errors early as it will stop the kernel from writing to sysfs
* This means we don't know if the SRM is good until the last call. And because of this
* limitation we cannot throw errors early as it will stop the kernel from writing to sysfs
*
* Example 1:
* Good SRM size = 5096
* first call to write 4096 -> PSP fails
* Second call to write 1000 -> PSP Pass -> SRM is set
* Good SRM size = 5096
* first call to write 4096 -> PSP fails
* Second call to write 1000 -> PSP Pass -> SRM is set
*
* Example 2:
* Bad SRM size = 4096
* first call to write 4096 -> PSP fails (This is the same as above, but we don't know if this
* is the last call)
* Bad SRM size = 4096
* first call to write 4096 -> PSP fails (This is the same as above, but we don't know if this
* is the last call)
*
* Solution?:
* 1: Parse the SRM? -> It is signed so we don't know the EOF
* 2: We can have another sysfs that passes the size before calling set. -> simpler solution
* below
* 1: Parse the SRM? -> It is signed so we don't know the EOF
* 2: We can have another sysfs that passes the size before calling set. -> simpler solution
* below
*
* Easy Solution:
* Always call get after Set to verify if set was successful.
@@ -546,20 +607,21 @@ static void update_config(void *handle, struct cp_psp_stream_config *config)
* +----------------------+
* PSP will only update its srm if its older than the one we are trying to load.
* Always do set first than get.
* -if we try to "1. SET" a older version PSP will reject it and we can "2. GET" the newer
* version and save it
* -if we try to "1. SET" a older version PSP will reject it and we can "2. GET" the newer
* version and save it
*
* -if we try to "1. SET" a newer version PSP will accept it and we can "2. GET" the
* same(newer) version back and save it
* -if we try to "1. SET" a newer version PSP will accept it and we can "2. GET" the
* same(newer) version back and save it
*
* -if we try to "1. SET" a newer version and PSP rejects it. That means the format is
* incorrect/corrupted and we should correct our SRM by getting it from PSP
* -if we try to "1. SET" a newer version and PSP rejects it. That means the format is
* incorrect/corrupted and we should correct our SRM by getting it from PSP
*/
static ssize_t srm_data_write(struct file *filp, struct kobject *kobj, struct bin_attribute *bin_attr, char *buffer,
static ssize_t srm_data_write(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr, char *buffer,
loff_t pos, size_t count)
{
struct hdcp_workqueue *work;
uint32_t srm_version = 0;
u32 srm_version = 0;
work = container_of(bin_attr, struct hdcp_workqueue, attr);
link_lock(work, true);
@@ -573,19 +635,19 @@ static ssize_t srm_data_write(struct file *filp, struct kobject *kobj, struct bi
work->srm_version = srm_version;
}
link_lock(work, false);
return count;
}
static ssize_t srm_data_read(struct file *filp, struct kobject *kobj, struct bin_attribute *bin_attr, char *buffer,
static ssize_t srm_data_read(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr, char *buffer,
loff_t pos, size_t count)
{
struct hdcp_workqueue *work;
uint8_t *srm = NULL;
uint32_t srm_version;
uint32_t srm_size;
u8 *srm = NULL;
u32 srm_version;
u32 srm_size;
size_t ret = count;
work = container_of(bin_attr, struct hdcp_workqueue, attr);
@@ -618,12 +680,12 @@ ret:
/* From the hdcp spec (5.Renewability) SRM needs to be stored in a non-volatile memory.
*
* For example,
* if Application "A" sets the SRM (ver 2) and we reboot/suspend and later when Application "B"
* needs to use HDCP, the version in PSP should be SRM(ver 2). So SRM should be persistent
* across boot/reboots/suspend/resume/shutdown
* if Application "A" sets the SRM (ver 2) and we reboot/suspend and later when Application "B"
* needs to use HDCP, the version in PSP should be SRM(ver 2). So SRM should be persistent
* across boot/reboots/suspend/resume/shutdown
*
* Currently when the system goes down (suspend/shutdown) the SRM is cleared from PSP. For HDCP we need
* to make the SRM persistent.
* Currently when the system goes down (suspend/shutdown) the SRM is cleared from PSP. For HDCP
* we need to make the SRM persistent.
*
* -PSP owns the checking of SRM but doesn't have the ability to store it in a non-volatile memory.
* -The kernel cannot write to the file systems.
@@ -633,8 +695,8 @@ ret:
*
* Usermode can read/write to/from PSP using the sysfs interface
* For example:
* to save SRM from PSP to storage : cat /sys/class/drm/card0/device/hdcp_srm > srmfile
* to load from storage to PSP: cat srmfile > /sys/class/drm/card0/device/hdcp_srm
* to save SRM from PSP to storage : cat /sys/class/drm/card0/device/hdcp_srm > srmfile
* to load from storage to PSP: cat srmfile > /sys/class/drm/card0/device/hdcp_srm
*/
static const struct bin_attribute data_attr = {
.attr = {.name = "hdcp_srm", .mode = 0664},
@@ -643,10 +705,9 @@ static const struct bin_attribute data_attr = {
.read = srm_data_read,
};
struct hdcp_workqueue *hdcp_create_workqueue(struct amdgpu_device *adev, struct cp_psp *cp_psp, struct dc *dc)
struct hdcp_workqueue *hdcp_create_workqueue(struct amdgpu_device *adev,
struct cp_psp *cp_psp, struct dc *dc)
{
int max_caps = dc->caps.max_links;
struct hdcp_workqueue *hdcp_work;
int i = 0;
@@ -655,14 +716,16 @@ struct hdcp_workqueue *hdcp_create_workqueue(struct amdgpu_device *adev, struct
if (ZERO_OR_NULL_PTR(hdcp_work))
return NULL;
hdcp_work->srm = kcalloc(PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE, sizeof(*hdcp_work->srm), GFP_KERNEL);
hdcp_work->srm = kcalloc(PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE,
sizeof(*hdcp_work->srm), GFP_KERNEL);
if (hdcp_work->srm == NULL)
if (!hdcp_work->srm)
goto fail_alloc_context;
hdcp_work->srm_temp = kcalloc(PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE, sizeof(*hdcp_work->srm_temp), GFP_KERNEL);
hdcp_work->srm_temp = kcalloc(PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE,
sizeof(*hdcp_work->srm_temp), GFP_KERNEL);
if (hdcp_work->srm_temp == NULL)
if (!hdcp_work->srm_temp)
goto fail_alloc_context;
hdcp_work->max_link = max_caps;
@@ -687,6 +750,13 @@ struct hdcp_workqueue *hdcp_create_workqueue(struct amdgpu_device *adev, struct
hdcp_work[i].hdcp.config.ddc.funcs.read_i2c = lp_read_i2c;
hdcp_work[i].hdcp.config.ddc.funcs.write_dpcd = lp_write_dpcd;
hdcp_work[i].hdcp.config.ddc.funcs.read_dpcd = lp_read_dpcd;
memset(hdcp_work[i].aconnector, 0,
sizeof(struct amdgpu_dm_connector *) *
AMDGPU_DM_MAX_DISPLAY_INDEX);
memset(hdcp_work[i].encryption_status, 0,
sizeof(enum mod_hdcp_encryption_status) *
AMDGPU_DM_MAX_DISPLAY_INDEX);
}
cp_psp->funcs.update_stream_config = update_config;
@@ -708,10 +778,5 @@ fail_alloc_context:
kfree(hdcp_work);
return NULL;
}

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