shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-07 03:15:31 +09:00
Code Issues Packages Projects Releases Wiki Activity

PM / devfreq: rockchip_dmc: clear the irq if waiting complt_irq timeout

Browse Source 
If waiting for wait_ctrl.complt_irq times out, clear the IRQ and stop the MCU by
sip_smc_dram(DRAM_POST_SET_RATE). Prevent the complt_irq which blocked from responding
in the next DDR frequency conversion flow.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I771ac2471dd1ef388f249c367d4f875ea0502e6c
This commit is contained in:
YouMin Chen
2022-06-16 10:06:45 +08:00
committed by Tao Huang
parent ed1e2d4c5b
commit 9f8075b8ae
1 changed files with 10 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/devfreq/rockchip_dmc.c
View File

@@ -1207,6 +1207,16 @@ int rockchip_dmcfreq_wait_complete(void)
wait_event_timeout(wait_ctrl.wait_wq, (wait_ctrl.wait_flag == 0),
msecs_to_jiffies(wait_ctrl.wait_time_out_ms));
/*
* If waiting for wait_ctrl.complt_irq times out, clear the IRQ and stop the MCU by
* sip_smc_dram(DRAM_POST_SET_RATE).
*/
if (wait_ctrl.dcf_en == 2 && wait_ctrl.wait_flag != 0) {
res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0, ROCKCHIP_SIP_CONFIG_DRAM_POST_SET_RATE);
if (res.a0)
pr_err("%s: dram post set rate error:%lx\n", __func__, res.a0);
}
cpu_latency_qos_update_request(&pm_qos, PM_QOS_DEFAULT_VALUE);
disable_irq(wait_ctrl.complt_irq);