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ODROID-XU4: drm/exynos/mixer: never blend the base layer

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On Exynos there is a solid color plane that is logically below all the other display planes.
This causes display artifacts due to alpha. The patch disables blending the base plane with
the solid color plane (no alpha).

Change-Id: Ibb2ada1d7a7be156d2f05ed477ee5972d63edd98
Reviewed-by: memeka <mihailescu2m@gmail.com>
Signed-off-by: memeka <mihailescu2m@gmail.com>
This commit is contained in:
OtherCrashOverride
2017-04-09 17:31:25 +00:00
committed by Dongjin Kim
parent 30f097c216
commit a2a0007743
1 changed files with 18 additions and 15 deletions
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33
drivers/gpu/drm/exynos/exynos_mixer.c
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@@ -315,23 +315,26 @@ static void mixer_cfg_gfx_blend(struct mixer_context *ctx, unsigned int win,
u32 val;
val = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */
switch (pixel_alpha) {
case DRM_MODE_BLEND_PIXEL_NONE:
break;
case DRM_MODE_BLEND_COVERAGE:
val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
break;
case DRM_MODE_BLEND_PREMULTI:
default:
val |= MXR_GRP_CFG_BLEND_PRE_MUL;
val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
break;
if (win) {
switch (pixel_alpha) {
case DRM_MODE_BLEND_PIXEL_NONE:
break;
case DRM_MODE_BLEND_COVERAGE:
val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
break;
case DRM_MODE_BLEND_PREMULTI:
default:
val |= MXR_GRP_CFG_BLEND_PRE_MUL;
val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
break;
}
if (alpha != DRM_BLEND_ALPHA_OPAQUE) {
val |= MXR_GRP_CFG_WIN_BLEND_EN;
val |= win_alpha;
}
}
if (alpha != DRM_BLEND_ALPHA_OPAQUE) {
val |= MXR_GRP_CFG_WIN_BLEND_EN;
val |= win_alpha;
}
mixer_reg_writemask(ctx, MXR_GRAPHIC_CFG(win),
val, MXR_GRP_CFG_MISC_MASK);
}